臺灣發展軟體科技股份有限公司

✅About Skymizer In Skymizer, we are currently working on a proprietary Language Processing Unit (LPU), a cutting-edge hardware solution aiming to run Large Language Models (LLMs) with high performance and power efficiency. We are seeking a passionate and experienced Senior System Software Engineer to join our Toolchain Team. As a key member of the team, you will be responsible for designing and developing the compiler and runtime for our LPU. ✅Key Responsibilities • Extend supports to more LLM and multimodal model architectures on the LPU. • Build the compiler infrastructure and optimize transformer models on the LPU, especially tiling computations to multiple cores and chips. • Maintain and enhance in-house profiling tools to meet our needs in performance optimization. • Design and develop runtime APIs to enable flexible workload distribution from higher-level AI ecosystems/frameworks. • Provide insights from a software’s perspective to co-design the next-generation LPU with the hardware team. ✅Qualifications • BS or MS degree in Computer Science / Computer Engineering / Electrical Engineering or a related field • 5+ year experience in system software development, including compiler, profiler, runtime, etc. • Solid C, C++ and Python programming skills • Experience in performance analysis and optimization • Ability to deliver independently with minimum supervision • Excellent communication skills, even with people with different technical backgrounds. ✅Nice to have • Deep understanding in transformer model architectures • Hands-on experience in LLM deployment on GPUs • Participation in the open-source community

✅About the job We're looking for a highly skilled and experienced Senior Project Manager to lead our critical ASIC and SoC development projects, with a strong emphasis on our groundbreaking LLM IP. The ideal candidate will possess deep expertise in the complete silicon development lifecycle, from initial concept and design through to successful tape-out and beyond. This role demands exceptional leadership, communication, and organizational skills to ensure projects are delivered on time, within budget, and to the highest quality standards. A solid understanding of SI/PI, package, and EVB considerations in project scheduling will be a significant advantage. ✅Responsibilities •Lead and manage the full lifecycle of complex LLM IP-centric ASIC and SoC development projects, from definition to tape-out and production ramp. •Develop, maintain, and track comprehensive project plans, schedules, and budgets, identifying critical paths and potential risks. •Drive cross-functional teams, including design, verification, DFT, physical design, CAD, and validation, to achieve project milestones for our LLM IP and related silicon. •Facilitate effective communication and collaboration between internal teams and external partners (e.g., foundries, IP vendors). •Proactively identify and mitigate project risks and issues, developing contingency plans as needed. •Manage change requests and their impact on project scope, schedule, and resources. •Establish and enforce robust project management processes and methodologies. •Provide regular and accurate project status updates to stakeholders, including executive leadership. •Ensure adherence to quality standards and best practices throughout the development process. •Oversee and integrate project schedules related to Signal Integrity (SI), Power Integrity (PI), package design, and Evaluation Board (EVB) development. •Collaborate with SI/PI, package, and EVB teams to ensure design for manufacturability and system-level performance. •Champion continuous improvement initiatives within the project management function. ✅Qualifications •Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field. •Minimum of 8+ years of experience in project management within the semiconductor industry, with a strong focus on ASIC/SoC development. •Minimum 2 years of experience as an IC TPM (Technical Program Manager). •In-depth knowledge of the entire ASIC/SoC development flow, including but not limited to: ○ Architecture definition ○ RTL design and verification ○ Synthesis and STA ○ Physical design (floorplanning, placement, routing, clock tree synthesis) ○ DFT (Design for Test) ○ IP integration ○ Formal verification and simulation ○ Gate-level simulation ○ Tape-out procedures and post-silicon validation. •Proven track record of successfully bringing complex silicon projects to tape-out. •Excellent leadership, communication (verbal and written), and interpersonal skills. •Strong analytical and problem-solving abilities. •Proficiency with project management tools (e.g., Jira, Monday.com, MS Project, Asana). •Ability to work effectively in a fast-paced, dynamic environment and manage multiple priorities. •Fluent in English. ✅Preferred Qualifications (Nice to Have) •PMP or equivalent project management certification. •Direct experience managing projects with significant SI/PI, package design, and EVB integration challenges. •Familiarity with various packaging technologies (e.g., BGA, QFN, Flip-Chip). •Experience with high-speed interface design considerations. •Exposure to AI accelerators or NPU (Neural Processing Unit) development, especially related to LLMs.

⚠️Important Notice – Read Before Applying This is not a model training or data science role. We are seeking a software engineer focused on AI framework development, not just using existing tools. ✅About the job Your primary responsibility will be to design and implement sophisticated APIs and runtime environments for our LPU hardware. This requires deep exploration of existing frameworks, coding complex integrations, and optimizing performance. If you are passionate about building the AI infrastructure that enables others to run models, this role is for you. We are looking for a highly skilled software engineer to design and optimize the LPU's AI software stack and runtime environment. ✅Key Responsibilities • Develop and optimize the LPU runtime and software stack, integrating with Hugging Face Transformers, llama.cpp, vllm, etc. • Design and implement APIs to enable efficient model execution on our hardware. • Explore and modify existing AI frameworks to ensure smooth adaptation for the LPU. • mprove runtime performance for heterogeneous computing environments. • Collaborate with hardware teams to optimize hardware-software interactions. • Contribute to the evolution of AI model deployment frameworks. ✅Qualifications • Bachelor's or Master's degree in Computer Science, Electrical Engineering, or related fields. • Strong proficiency in C++ and Python, with experience in performance-critical software. • Hands-on experience with AI frameworks (Hugging Face Transformers, llama.cpp, vllm), beyond just using them—modifying, extending, or integrating. • Understanding of runtime systems and heterogeneous computing. • Experience with low-level optimizations, memory management, and parallel execution. • Familiarity with software development tools (Docker, Git, CI/CD). • Analytical thinking and problem-solving skills. ✅Nice to have • 3+ years of experience in compiler technologies, runtime systems, or AI hardware acceleration. • Understanding of hardware-software co-design principles. • Experience with CUDA, ROCm, or other GPU programming frameworks. • Contributions to open-source AI/ML projects. ✅Any additions • Work on cutting-edge AI framework development. • Collaborative and high-caliber engineering team. • Competitive salary and benefits. • Career growth in AI software and system design. ✅How to Apply Send your resume and cover letter. If you have framework-related contributions (e.g., modifications to AI runtimes), please highlight them. Join us in building the AI infrastructure of the future.