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公司介紹
產業描述
SerDes IP Licensing、SerDes Chiplets、Line Card Solutions、Active Electrical Cable、Optical Solutions
電話
暫不提供
員工人數
140人
地址
新竹縣竹北市台元二街10號2樓之2 (台元科技園區)
公司簡介
我們的使命是不斷突破資料基礎設施市場中每個有線連接的頻寬壁壘，提供高速連接解決方案。Credo是提供安全、高速連接解決方案的創新者。隨著整個資料基礎設施市場對資料速率和相應頻寬需求呈指數級增長，Credo的解決方案可提供更低的功耗和更高的成本效用。 Credo持續專注研發SerDes技術。自2012年首先推出基於台積65nm的28G SerDes起，Credo持續往更先進的製程工藝、更高速的傳輸速率推進；並推出超長距離(ER，>40dB)、中距離(MR)與短距離(SR)的傳輸解決方案，以極低的功耗以滿足各種應用與需求。2014 年，Credo在IEEE及OFC兩個大會上成功地展示了世界第一顆56G NRZ SerDes；2015年，Credo更推出了符合IEEE/OIF標準的56G PAM4 SerDes，成為業界唯一能提供56G NRZ與PAM4兩種調變的領導廠商，並且成功地將其SerDes工藝推進到16nm；2016年，Credo再以單路112Gbps刷新SerDes的速度紀錄。 Credo可提供完整的28G NRZ、56G NRZ與PAM4以及112G PAM4單通道SerDes互連解決方案，以極佳的損耗處理能力、極低的功耗與面積、多種製程選擇(65nm、40nm、28HPM/HPC/HPC+、16FF+/FFC)，廣泛地得到業界的認可。自 2014 年以來，Credo被《電子工程專輯》（EE Times）評選為最受關注的TOP 60公司，並連續在2014年、2015年兩年獲選台積電(TSMC) Emerging Star Company殊榮。2017年更榮獲台積電開放創新平台專業IP技術獎。 Credo全球擁有數個研發設計中心，分別位於美國矽谷、上海、香港以及台灣新竹，全球員工數約500人。 Credo Technology Group Holding Ltd. 已於2022年1月27日於美國Nasdaq（Nasdaq代號: CRDO）成功上市。詳細資訊請參考: https://investors.credosemi.com/ Credo Semiconductor Inc. 獲得舊金山灣區最佳工作場所頒發的 2024 年最佳工作場所榮譽。詳細新聞稿請參考: https://credosemi.com/credo-semiconductor-inc-has-been-awarded-a-top-workplaces-2024-honor-by-san-francisco-bay-area-top-workplaces/
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主要商品 / 服務項目
Credo的產品均基於Credo在序列化/解串列（SerDes）和數位訊號處理器（DSP）上的專利技術。Credo的產品主要包括應用於光通訊以及Line card 市場的晶片、有源電纜（AEC）以及SerDes Chiplet；IP解決方案主要為SerDes IP授權。 光通訊產品相關影片與介紹: https://credosemi.com/products/optical/ AEC產品介紹: https://credosemi.com/products/hiwire-aec/
公司環境照片(7張)
福利制度
法定項目
其他福利
◆ 鼓勵負責、創新、自主管理 ◆ 順暢的升遷、獎勵制度 ◆ 出差受訓的機會 ◆ 優於勞基法的休假制度 ◆ 彈性上下班 ◆ 餐費補助 ◆ 勞保、健保以及勞工退休金提撥
企業動態
工作機會
10/22
We are seeking Firmware Engineers to develop and maintain firmware for transceiver modules.
The ideal candidate will have embedded systems expertise and a solid foundation in C programming.
1. Experience with C and ARM32 embedded system programming and architecture
2. Knowledge of I2C, SPI, UART, and other serial communication protocols
3. Write Python scripts for firmware testing, automation, and tooling
4. Familiarity with CMIS and has related working experience is a plus
10/21
Job Description:
We are seeking a Senior Security Analyst to join our cybersecurity team in Taiwan. This role is vital to protecting the organization from threats, managing security operations, and driving vulnerability and patch management programs. The ideal candidate has deep hands-on experience in security alert triage, incident response, vulnerability scanning, and is motivated to stay ahead of evolving cyber threats.
Responsibilities
Security Monitoring & Response
• Monitor security alerts using SIEM and other telemetry sources.
• Triage, investigate, and escalate potential threats and anomalies.
• Perform root cause analysis and document incident timelines.
Incident Handling & Threat Investigation
• Monitor security alerts using SIEM and other telemetry sources.
• Lead or support incident response processes and forensic investigations.
• Develop incident reports, post-incident reviews, and mitigation strategies.
• Collaborate with global SOC or MDR providers if applicable.
Patch Management & Vulnerability Assessment
• Coordinate and track system patching with IT/engineering teams.
• Perform regular vulnerability scans using Vulnerability Scanning tools.
• Prioritize vulnerabilities based on CVSS scores and business impact.
Security Tools & Process Improvement
• Maintain and enhance existing **CrowdStrike**, **Microsoft Defender**, and SIEM tooling.
• Participate in tool selection, testing, and integration.
• Contribute to security playbook creation and update SOPs.
Compliance & Documentation
• Support audits, compliance (e.g., ISO 27001, NIST, local Taiwan PDPA).
• Maintain accurate documentation of incidents, investigations, and mitigations.
• Assist in business continuity planning and tabletop exercises.
Required Skills
• Fluent in English; Mandarin fluency is preferred for local coordination.
• Proficiency in scripting (Python, Bash, PowerShell) is a plus.
• Understanding of fundamental security concepts and best practices.
• Knowledge of endpoint protection, firewalls, and intrusion detection systems.
• Basic knowledge of cloud platforms (AWS, Azure, GCP).
• Eagerness to learn and adapt to new technologies and security trends.
• Strong understanding of Windows, Linux, and networking fundamentals
• Good understanding of Windows and Unix basics
• Network communications and routing protocols (e.g., TCP, UDP, ICMP, BGP, MPLS, etc.)
• Common internet applications and standards (e.g., SMTP, DNS, DHCP, SQL, HTTP, HTTPS, etc.)
• Preferred certifications (e.g., CompTIA Security+, CEH, Microsoft SC-200, GIAC Certified Incident Handler (GCIH)) are a plus.
Preferred Skills(optional):
Experience working with products in the following categories
• Enterprise password vaults
• Vulnerability scanning and management
• SIEM
• PKI
• Application control
• Network micro-segmentation
• Virtualization
10/21
Overview:
As the HR Manager for Taiwan, you will serve as a strategic partner to both local and regional leadership. You will oversee the full spectrum of the HR function including recruitment, employee relations, performance management, employee engagement, and HR business partnering, while ensuring compliance with local labor laws and alignment with global HR strategies. This role requires a proactive leader who can lead locally while participating with the global HR team.
Key Responsibilities:
1. Lead end-to-end recruitment efforts including sourcing, interviewing, and offer management.
2. Partner with hiring managers to forecast talent needs and develop recruitment strategies.
3. Manage employee relations, conflict resolution, and performance improvement plans.
4. Support talent management initiatives including career development, succession planning, and performance reviews.
5. Act as an HR Business Partner to local leadership, providing guidance on organizational design, workforce planning, and change management.
6. Support the implementation and engagement of Talent Management programs such as performance review, development, etc.
7. Prepare HR reports and analytics for management.
8. Drive culture initiatives and internal communications.
9. Lead or support ad-hoc HR projects such as HRIS implementation or policy audits.
10. Oversee onboarding and offboarding processes to ensure a smooth employee experience.
11. Administer compensation, benefit, and leave programs in compliance with local regulations.
12. Maintain accurate HR records and support internal audits and reporting.
13. Collaborate with regional and global HR teams on cross-border initiatives and policy alignment.
14. Review and verify monthly payroll with accountancy firm and finance controller.
10/21
Overview:
The HR Coordinator will play a key role in supporting the HR Manager and hiring teams across Taiwan. This position focuses on talent acquisition coordination, onboarding and offboarding processes, and general HR administrative support. The ideal candidate is detail-oriented, proactive, and passionate about delivering a seamless employee experience.
Key Responsibilities:
1. Post job openings on local and global job boards and manage applicant tracking systems.
2. Coordinate interview scheduling between candidates and hiring managers.
3. Assist in sourcing candidates through LinkedIn, job boards, and referrals.
4. Support onboarding and offboarding processes, including document collection, system setup, and exit interviews.
5. Prepare offer letters and employment contracts in alignment with company policies.
6. Administer employee benefits, including enrollment, changes, and inquiries.
7. Maintain accurate employee records and assist with HR reporting.
8. Collaborate with the HR Manager on employee engagement initiatives and compliance tasks.
10/21
1. Manage the requirements of full digital CAD RTL-to-Silicon CAD tool flow in Credo products.
2. Implement best-in-class CAD digital design and physical implementation flows.
3. Work directly with project teams to actively resolve and fix issues.
4. Develop internal scripts/flows to –
o Improve design quality and consistent implementation via the best-known methodology.
o Enable meaningful design audit and progress/resource tracking.
5. Coordinate tool usage and training for designers.
6. Actively participate in CAD infrastructure planning with IT to improve productivity.
7. Support tool bugs and issues, working closely with world-wide design teams and EDA vendors.
(Report to English-speaking supervisor, please submit your English resume when you apply)
10/21
1. Develop the embedded firmware for various serdes products
2. Troubleshooting and debugging with customers or cross-team members.
3. Strong coding skill in Python, C and C++ language.
4. Good knowledge in micro processor
4. Good knowledge in operating system and software engineering
5. Good knowledge in hardware and chip design
6. Business trip for training, debugging or co-development with chip designers (To US headquarter or Shanghai office)
10/21
In your role as a Staff CAD Engineer (Infrastructure), you will support and improve CAD design tool usage and flows. Projects will have high visibility with a world-wide team of development engineers. This position emphasizes EDA compute infrastructure.
You will play a critical role in improving the engineering computer infrastructure for efficiency and scalability.
Responsibilities
1. Manage the EDA infrastructure and create/develop system monitors to support custom analog-mixed signal and digital design projects
2. Implement best-in-class CAD license and hardware resource monitors.
3. Develop benchmark and QA systems to qualify flows and to improve datacenter hardware specifications.
4. Enhance EDA tool performance through optimization of computing (CPU, GPU) and storage architecture.
5. Develop strategies for using load balancing and methodologies for bursting peak workloads into private cloud datacenters.
6. Actively participate in CAD infrastructure planning with IT to improve productivity.
7. Support tool bugs and issues, working closely with world-wide design teams and EDA vendors.
(Report to English-speaking supervisor, please submit your English resume when you apply)
10/21
DESCRIPTION:
1. Responsible for the physical design process of chip numbers from netlist to GDSII
2. Responsible for interaction with the front-end design team to realize the design convergence and optimization of the front and back ends; Comprehensive, static timing analysis
3. Floor planning, power planning and signoff, place and route, timing closure, chip static timing analysis and physical verification
4. IP integration, synthesis, verification and correction
5. Other Assigned Tasks delivered by the Line Manager
QUALIFICATIONS:
1. MS degree in EE or related.
2. Familiar with physical design flow, including hierarchical design and low power design is a plus
3. Familiar with EDA tools, such as SoC Encounter/INNOVUS/ICC/ICC2 is a plus
4. Familiar with computer languages such as Perl/TCL/C-shell
5. Self-motivated with good communication skills and team spirit
6. Ability to understand and articulate technical issues.
7. Fluent English is a plus.
8. Experience in 12/5nm design is a plus.
10/21
Responsibilities
• Regular attending technical reviews with design team
• Participation in new product testing and developing Python script
• Onsite debugging of issues
• Willingness to go above and beyond to resolve high priority issues
• Collaborate to develop test plans with multiple teams and disciplines
• Create customer-facing documentation like handbooks and Application Notes with reference designs
• Define, test and implement complex SERDES training algorithms for a multi-rack system involving wide variety of channels on boards, in systems, over copper backplanes, and optical fibers.
Skills and Qualifications
• Knowledge of adaptive signal processing, coding, and FEC algorithms a strong plus but not necessary.
• Knowledge of basic circuit is needed.
• Knowledge in Python and C programming to develop Serdes automation for link-up, training and diagnostics.
• Experience with high speed test equipment (Scopes, BERTs, Spectrum Analyzers)
• Good debug and data analysis skill is requested
• Energetic, self-driven, team oriented, and analytical
• Communication, organizational, project planning, and engineering skills.
• Ability to lead cross-functional teams to achieve objectives
10/28
Job Summary
Technical program management for Credo datacenter optical cables. Develop & maintain accurate, detailed GANTT charts throughout the NPI process from initial technical path development and down-selection through to release into high volume production. Anticipate risks and drive within the NPI team the timely down-selection of technical and supply chain options including through careful cultivation of relationships with internal and supplier engineering teams to deeply understand project risk profile.
Key Responsibilities
List 5+ core duties. Use action verbs and be specific about expectations.
1) Collaborate with global technical team on development and maintenance of a complex, multiple option NPI GANTT chart.
2) Drive the timely down-selection of technical options on a timeline consistent with overall team program goals.
3) Support the selection of key suppliers from the perspective of NPI GANTT chart and technical maturity.
4) Cultivate relationships internally and externally that enable anticipation of possible problems before they become crises and at a time well within the window for development of alternative lower risk paths.
5) Collaborate with global operations team to bring ALC products from R&D to high volume manufacturing.
10/21
1. PCIe retimer/AEC is getting more important in AI era; especially in GPU cluster application
2. Retimer/AEC helps to provide the best link stability during a heavy workload condition
3. It needs to understand the overall PCIe protocol; especially in the PHY layer
4. Not only the retimer/AEC validation, but also validation software/script development
5. Build & Implement PCIe RC-retimer/AEC-EP validation plan
6. Welcome aggressive he/she, who likes to hold AI opportunity and its application to join this big race
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