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員工人數
50人
地址
台北市內湖區瑞光路408號12樓之2
公司簡介
想與一群頂尖的技術狂人，齊聚投身最前線的 AI 加速技術領域嗎？ Skymizer (臺灣發展軟體科技股份有限公司) 是一家 AI 矽智財公司，專注於編譯器驅動的 LPU 技術，打造 Edge AI 與大型語言模型（LLM）推論解決方案，賦能全球 AI 晶片與跨時代的智能終端裝置。 我們相信，透過緊密的團隊合作與對技術的熱情探究，卓越的成就隨之而來。 在這裡，你會遇到一群對「LLM 模型效能」與「工具鏈優化」都有深入掌握的（可愛宅宅）工程師。 如果你對 AI 加速、語言模型、或晶片架構感興趣，歡迎來當同事，一起寫下 AI 未來的起點。
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主要商品 / 服務項目
主要產品是 LPU (Language Processing Unit) IP 跟 LISA (Language Instruction Set Architecture)。 • EdgeThought: Single-core LPU IP • HyperThought: Multi-core LPU IP • LISA v3
公司環境照片(3張)
福利制度
法定項目
其他福利
Skymizer追求並創造敏捷、靈活且自主的工作條件，你一定會愛上的!! 工作與生活平衡 Work-Life Balance • 專注產出的彈性工時：在這裡，你可以專注解決難題並自主安排你的工作節奏 • 打造專屬你的辦公室：Your Office, Your Way加入即享有1萬元環境佈置金 • 優於法令的好多休假：第一年即享有 14 天特休（依比例發放），每多一年多放1天 • 補班日不補班就是爽：每年還有額外的彈性休假，可自行安排放空,充電,旅行,耍廢...... 你的健康是我們的財富 Taking Care of YOU • 每年健檢：Annual health checkups 提供同仁健康檢查 • 團體保險：Comprehensive group insurance 提供意外團體保險 • 全薪病假：Paid Sick Leave全薪病假3天，女性同仁生理假13天 只想給你最好的Top-Notch Tools for Top-Notch Talent • 頂規人體工學設備：知名人體工學椅，搭配高級升降桌 • 頂優個人工作設備：護眼外接螢幕，自選 MacBook 筆電或其他愛用順手品牌 • 切磋磨練的好同事：鑽研最新的AI技術，切磋彼此的程式碼...從創造中得到快樂與滿足 在Skymizer，我們深信你的成功就是我們的成功，我們一起成長茁壯! 因此，我們專注於打造一個注重舒適、身心健康與個人特色的工作環境。 在這裡，你可以盡情享受推理解謎的迷人樂趣，並將之發揮到淋灕盡致。
企業動態
工作機會
9/24
✅About Skymizer
In Skymizer, we are currently working on a proprietary Language Processing Unit (LPU), a cutting-edge hardware solution aiming to run Large Language Models (LLMs) with high performance and power efficiency. We are seeking a passionate and experienced Senior System Software Engineer to join our Toolchain Team. As a key member of the team, you will be responsible for designing and developing the compiler and runtime for our LPU.
✅Key Responsibilities
• Project Management:
#Plan, execute, and oversee software development projects, ensuring they are delivered on time and
within scope.
#Collaborate with cross-functional teams, including UI/UX designers, developers, and system
integrators, to define project goals and deliverables.
#Identify and mitigate risks while maintaining a strong focus on quality and customer satisfaction.
• UI/UX Expertise:
#Work closely with the UI/UX team to ensure intuitive, user-friendly designs are integrated into all
software products.
#Review and approve UI/UX deliverables to align with project requirements and customer
expectations.
• C++ Programming Oversight:
#Provide technical guidance and oversight on projects requiring solid C++ programming expertise.
#Review code quality and ensure best practices are followed during development.
• System Integration:
#Coordinate and support system integration efforts, ensuring seamless collaboration between
hardware and software components.
• AI and Emerging Technologies:
#Leverage AI-related experience to incorporate advanced capabilities into projects, where applicable.
#Stay updated on industry trends and recommend innovations to enhance our product offerings.
• Documentation and Tutorials:
#Develop and deliver comprehensive software tutorial materials for internal teams and customers.
#Ensure documentation is clear, concise, and aligns with industry standards.
✅Qualifications
• BS or MS degree in Computer Science, Software Engineering, or a related field.
• 6–10 years of experience in software development, with at least 3 years in project management roles.
• 3 years in software technical project management.
• Proven experience in UI/UX design and implementation.
• Strong proficiency in C++ programming.
• Knowledge of scripting languages in Python.
✅Skills
• Exceptional project management skills, including task prioritization, scheduling, and stakeholder communication.
• Deep understanding of UI/UX principles and best practices.
• Solid grasp of system integration processes and methodologies.
• Excellent technical writing and presentation skills for tutorial creation.
✅Nice to have
• Experience in AI-related projects and technologies.
• Familiarity with IC design or semiconductor-related software solutions.
9/04
✅About Skymizer
In Skymizer, we are currently working on a proprietary Language Processing Unit (LPU), a cutting-edge hardware solution aiming to run Large Language Models (LLMs) with high performance and power efficiency. We are seeking a passionate and experienced Senior System Software Engineer to join our Toolchain Team. As a key member of the team, you will be responsible for designing and developing the compiler and runtime for our LPU.
✅Key Responsibilities
• Extend supports to more LLM and multimodal model architectures on the LPU.
• Build the compiler infrastructure and optimize transformer models on the LPU, especially tiling computations to multiple cores and chips.
• Maintain and enhance in-house profiling tools to meet our needs in performance optimization.
• Design and develop runtime APIs to enable flexible workload distribution from higher-level AI ecosystems/frameworks.
• Provide insights from a software’s perspective to co-design the next-generation LPU with the hardware team.
✅Qualifications
• BS or MS degree in Computer Science / Computer Engineering / Electrical Engineering or a related field
• 5+ year experience in system software development, including compiler, profiler, runtime, etc.
• Solid C, C++ and Python programming skills
• Experience in performance analysis and optimization
• Ability to deliver independently with minimum supervision
• Excellent communication skills, even with people with different technical backgrounds.
✅Nice to have
• Deep understanding in transformer model architectures
• Hands-on experience in LLM deployment on GPUs
• Participation in the open-source community
9/10
⚠️Important Notice – Read Before Applying
This is not a model training or data science role.
We are seeking a software engineer focused on AI framework development, not just using existing tools.
✅About the job
Your primary responsibility will be to design and implement sophisticated APIs and runtime environments for our LPU hardware. This requires deep exploration of existing frameworks, coding complex integrations, and optimizing performance.
If you are passionate about building the AI infrastructure that enables others to run models, this role is for you.
We are looking for a highly skilled software engineer to design and optimize the LPU's AI software stack and runtime environment.
✅Key Responsibilities
• Develop and optimize the LPU runtime and software stack, integrating with Hugging Face Transformers, llama.cpp, vllm, etc.
• Design and implement APIs to enable efficient model execution on our hardware.
• Explore and modify existing AI frameworks to ensure smooth adaptation for the LPU.
• mprove runtime performance for heterogeneous computing environments.
• Collaborate with hardware teams to optimize hardware-software interactions.
• Contribute to the evolution of AI model deployment frameworks.
✅Qualifications
• Bachelor's or Master's degree in Computer Science, Electrical Engineering, or related fields.
• Strong proficiency in C++ and Python, with experience in performance-critical software.
• Hands-on experience with AI frameworks (Hugging Face Transformers, llama.cpp, vllm), beyond just using them—modifying, extending, or integrating.
• Understanding of runtime systems and heterogeneous computing.
• Experience with low-level optimizations, memory management, and parallel execution.
• Familiarity with software development tools (Docker, Git, CI/CD).
• Analytical thinking and problem-solving skills.
✅Nice to have
• 3+ years of experience in compiler technologies, runtime systems, or AI hardware acceleration.
• Understanding of hardware-software co-design principles.
• Experience with CUDA, ROCm, or other GPU programming frameworks.
• Contributions to open-source AI/ML projects.
✅Any additions
• Work on cutting-edge AI framework development.
• Collaborative and high-caliber engineering team.
• Competitive salary and benefits.
• Career growth in AI software and system design.
✅How to Apply
Send your resume and cover letter. If you have framework-related contributions (e.g., modifications to AI runtimes), please highlight them.
Join us in building the AI infrastructure of the future.
6/11
⚠️特別說明：此職位需on-site在新竹清大創新育成中心辦公室，無提供遠端工作條件。
✅主要職責：
1. 高效能記憶體子系統（DDR/LPDDR Subsystem）之整合、開發與驗證。
2. 參與GenAI SoC設計，包括架構規劃、RTL設計、模擬與驗證。
3. 配合後端設計團隊，進行時序分析與設計優化。
5. 進行設計文件撰寫與維護，確保設計過程符合公司開發流程。
6. 針對客戶需求，進行系統分析與客製化設計開發。
✅基本要求：
1. 電機、電子、資訊工程相關科系畢業，學士以上學歷。
2. 具備5年以上數位IC設計經驗。
3. 熟悉 DDR PHY 架構、控制器、timing calibration與 training 流程
4. 熟悉SoC Bus Fabric設計，具備AXI、AHB等匯流排介面經驗。
5. 熟悉RTL設計 (Verilog / System Verilog)。
6. 了解前端設計流程，包括模擬、合成、時序分析等。
7. 良好的問題分析能力，具備團隊合作精神。
✅加分條件：
1. 有參與過 LPDDR Subsystem Integration與Silicon Tape-out 並成功量產
2. 熟悉 Synopsys LPDDR、Cadence GDDR IP/Subsystem
3. 熟悉 UPF、低功耗設計流程
4. 熟悉 DFT 、Scan、BIST
✅ Why Join Us
1. 與頂尖技術團隊共事，參與高效能 AI/高速記憶體解決方案開發
2. 自主創新文化，提供技術發揮與產品影響力兼具的工作環境
9/01
⚠️特別說明：此職位需on-site在新竹清大創新育成中心辦公室，無提供遠端工作條件。
✅About the job
• 負責數位IC設計的功能驗證，確保設計符合規格要求。
• 建立UVM驗證平台，撰寫測試案例，進行模組與整合驗證。
• 熟悉AMBA (AXI/AHB/APB) 匯流排協定，應用於驗證環境。
• 使用C語言或SystemVerilog撰寫測試程式，進行功能覆蓋率分析與除錯。
• 與設計團隊，協同解決設計問題。
• 參與測試計畫制定、驗證策略設計及驗證報告撰寫。
✅基本要求：
• 電機、電子、資訊工程相關科系畢業，學士以上學歷。
• 具備3-5年數位IC設計驗證經驗。
• 熟悉AMBA (AXI/AHB/APB) 匯流排協定。
• 熟悉UVM驗證方法學，具備搭建UVM平台經驗。
• 熟悉SystemVerilog或C語言，能撰寫驗證測試程式。
• 熟悉模擬工具 (如VCS、NC-Verilog、ModelSim等)。
• 良好的問題分析與解決能力，具備團隊合作精神。
✅加分條件：
• 具備SoC驗證經驗。
• 熟悉FPGA驗證流程或原型驗證經驗。
• 熟悉低功耗驗證或性能分析經驗。
• 具備腳本開發能力 (Perl、Python、TCL等)。
✅需具備技能：
• AMBA (AXI/AHB/APB) Protocol
• UVM驗證方法學(必要)
• System Verilog / C 語言
• 功能驗證平台建置
• 模擬工具使用 (VCS / NC-Verilog / ModelSim 等)
• 問題分析與除錯能力
• 驗證策略與覆蓋率分析
9/10
⚠️ **Important Notice – Please Read Before Applying** We are a coding-intensive team. This role requires writing and reviewing substantial amounts of code regularly. If you're not passionate about writing real code and transforming innovative ideas into practical, proof-of-concept implementations, this position may not suit you. Please read the requirements carefully before applying.
✅ **About the Role**
We develop system software — including toolchains, compilers, runtime libraries, and other performance-critical components — to maximize the capabilities of our specialized LPU hardware. You will actively engage in hands-on development and must adapt swiftly to evolving project requirements. If you thrive on solving complex, system-level challenges with clean and efficient code, this role offers an opportunity for substantial and visible impact.
✅ **Requirements**
- **Strong Coding Skills**: Proficiency in C or Python required; familiarity with modern C++ or advanced Python is advantageous.
- **Growth & Problem-Solving Mindset
**: Deep understanding of fundamental data structures and algorithms, with a continuous drive for improvement.
- **Systems Knowledge**: Solid grasp of system software, operating system fundamentals, and performance-driven development practices.
- **Open-source Contributions**: Demonstrated experience contributing to recognized open-source projects and familiarity with associated development methodologies.
✅ **Responsibilities**
- **Problem-Solving & Execution**: Identify technical challenges, propose practical solutions, and deliver robust implementations.
- **System Software Engineering**: Design, develop, and maintain low-level system software components.
- **Collaboration & Communication**: Work closely with cross-functional teams, communicate clearly, and contribute proactively.
✅ **Why Join Us**
- **Real Impact**: Directly contribute to software enabling high-performance, real-world applications.
- **Rapid Professional Growth**: Engage in diverse tasks that challenge and significantly expand your technical skillset.
- **Team Culture**: Become part of a collaborative team environment that emphasizes open dialogue, knowledge sharing, and collective problem-solving.
9/05
✅About the job
此角色需具備專業財會知識與實務經驗，負責日常帳務、報表編製、稅務申報及股務處理等事務，確保財務數據的正確性、即時性。熟悉內外部流程及法規，並具備跨部門溝通能力，能協助公司營運管理及決策需求。
✅Key Responsibilities
1、 日常帳務處理
2、 自編財務報告
3、 年度預算編製及追蹤
4、 營業稅及營所稅申報
5、 各類所得扣繳申報
6、 股務相關處理 (董事會、股東會召集等…)
7、 工商相關處理 (變更登記變更、僑外投資處理、股權移轉申報等…)
8、 會計師、法人股東及國稅局窗口
9、 協助內部流程建立及改善
10、 其他主管交辦事項
✅Qualifications
1、 具備前四大會計師事務所 ( 如：Deloitte、KPMG、PWC、EY ) 4 年以上經驗
2、 熟悉國際財務報導準則（IFRS）與企業處理準則等相關會計準則、公司法、稅法等相關法規。
3、 熟練使用財務系統（如 文中、鼎新等）及office軟體應用（如 Excel、PowerPoint）
4、 須細心、主動積極、抗壓性高、負責、肯學習且能獨立作業者
5、 具跨部門溝通的能力
✅Nice to have
1. 曾任職半導體產業成本經驗者尤佳
4/18
⚠️特別說明：此職位需on-site在新竹清大創新育成中心辦公室，無提供遠端工作條件。
✅主要職責：
1. 負責DDR Controller、DMA Controller模組開發與整合。
2. 設計SoC Bus Fabric，確保各模組間資料傳輸效能最佳化。
3. 參與數位IC設計流程，包括架構規劃、RTL設計、模擬與驗證。
4. 配合後端設計團隊，進行時序分析與設計優化。
5. 進行設計文件撰寫與維護，確保設計過程符合公司開發流程。
6. 針對客戶需求，進行系統分析與客製化設計開發。
✅基本要求：
1. 電機、電子、資訊工程相關科系畢業，學士以上學歷。
2. 具備3-5年數位IC設計經驗。
3. 熟悉DDR Controller、DMA Controller設計與整合。
4. 熟悉SoC Bus Fabric設計，具備AXI、AHB等匯流排介面經驗。
5. 熟悉RTL設計 (Verilog / SystemVerilog)。
6. 了解前端設計流程，包括模擬、合成、時序分析等。
7. 良好的問題分析能力，具備團隊合作精神。
✅加分條件：
1. 具備多時脈域 (Clock Domain Crossing, CDC) 與低功耗設計經驗。
2. 熟悉ARM AMBA架構，如AXI、APB、AHB等匯流排標準。
3. 具備FPGA原型設計驗證經驗。
4. 熟悉腳本撰寫 (Perl、Python、TCL等)。
5. 具備SoC整合經驗或大規模數位電路設計開發經驗。
需具備技能：
• DDR Controller / DMA Controller 設計整合
• SoC Bus Fabric 設計
• RTL 設計 (Verilog / SystemVerilog)
• 匯流排協定 (AXI / AHB / APB)
• 前端設計流程 (模擬、合成、時序分析)
• 問題分析與解決能力
特別說明：此工作職位需on-site在新竹清大創新育成中心辦公室，無提供遠端工作條件。
9/19
✅About the job
Skymizer 正在招募一位具備經驗的行銷經理，專注於 AI 加速器 ASIC IP 的 B2B產業 。此職位的核心任務是提升公司品牌能見度並吸引目標客戶群 (Ideal Customer Profile, ICP) 。
✅Key Responsibilities
策略制定：制定符合公司目標的 B2B 行銷策略
潛在客戶開發：執行多渠道活動（如數位行銷、實體活動、內容行銷）
內容製作：撰寫行銷素材（白皮書、案例研究、部落格、簡報等）
市場分析：調研市場趨勢、客戶需求與競品資訊，支援策略調整
業務支援：與銷售團隊協作，提供行銷工具以提升轉換率
活動管理：規劃管理展會與線上研討會，增強曝光與互動
效能追蹤：分析行銷活動成果，導入數據回饋以優化成效
✅Qualifications
1. CS/EE等相關學士或碩士學位
2. 對半導體或/AI 與 B2B 行銷有熱情
3. 理解 AI 加速技術與 ASIC IP
4. 中英文書面與口語表達能力佳
5. 有成功推動行銷活動與 lead generation 的經驗
6. 熟悉數位行銷工具（Google Ads、LinkedIn Ads、SEO、GA）
7. 跨部門溝通協作與多任務管理能力
✅Nice to have
1. 有B2B專業展與國際展覽的全面策劃與執行經驗
2. 英文多益成績 850 分（或同等托福、雅思成績）以上
3. 投遞履歷時，請附上策展企劃作品
8/28
✅About the job
This role seeks a highly driven individual to collaborate with Skymizer's clients in effectively integrating and utilizing Skymizer LPU IP within their ASIC SoCs/systems for cutting-edge products.
This position presents exciting opportunities to engage with cutting-edge Skymizer IP and the latest industry standards alongside industry-leading clients.
✅Key Responsibilities
Key responsibilities include providing technical guidance to clients throughout their SoC development process to overcome integration challenges, conducting integration reviews, and offering support during silicon/system bring-up and troubleshooting phases.
• Resolving complex technical challenges related to homogeneous and heterogeneous multi-core processors.
• Providing technical support to customers utilizing Skymizer LPU IP and SoC platforms.
• Guiding customers in transitioning to the latest generation of processors and optimizing their usage.
• Creating and publishing technical articles, application notes, and white papers.
• Conducting hardware benchmarks on Skymizer LPU and SoC platforms. The candidate who is familiar with software benchmarking is a plus.
• Communicating customer feedback on emerging IP requirements to Skymizer's Research & Development and product teams.
✅Qualifications
Working experience in any of the following areas:
• ASIC/SoC design flow and FPGA prototyping
• Large Language Model frameworks
• Familiarity with industry-standard IP and protocols (NoC, CMN, DDR/HBM, PCIe/CXL, UCIe)
• CISC/RISC/SIMD/VLIW/CGRA/GPU processor architectures is a plus
• Audio/VIdeo/Speech DSP IP is a plus
• Programming for SoC systems
• Hardware digital design using Verilog or SystemVerilog
• Familiar with EDA tool including Verdi, VCS, nWave, PTPX, DC
✅Nice to have
• Hands on RTL / FPGA design and debugging.
• Exceptional debugging and troubleshooting abilities, with proven experience in identifying and resolving customer issues across both hardware and software domains (e.g., system integration, performance optimization, compatibility, and usability).
• A creative and results-driven approach with the ability to effectively manage multiple projects simultaneously.
• Excellent verbal and written communication skills in English, enabling seamless interaction with global customers.
• High levels of self-motivation and a strong sense of personal responsibility.
10/02
✅About the job
在 Fabless 模式下，高度依賴外部供應商處理生產與運籌管理，需要有經驗的專人負責。此角色同時需承擔採購管理，確保供應鏈在品質、成本、交期與風險上達到最佳平衡。
✅Key Responsibilities
(1)供應商管理與關係維護：
o 負責評估、選擇、稽核和管理設計服務廠商(Design Service) 、晶圓代工廠 (Foundry)、封裝測試廠及其他相關零組件供應商 (如光罩廠、材料供應商)。
o 建立並維護與關鍵供應商的長期合作夥伴關係。
o 定期評估供應商的表現 (品質、成本、交期、服務)。
(2)訂單與生產排程管理：
o 根據銷售預測和庫存水準，制定並執行採購與生產計畫。
o 與協力廠商協調生產排程，確保產品準時交付。
o 監控生產進度，及時發現並解決潛在的交期延遲風險。
(3)採購與成本控制：
o 與供應商進行價格談判，爭取最具競爭力的成本。
o 識別並推動供應鏈各環節的成本優化機會。
(4)庫存管理：
o 制定並實施庫存策略，平衡庫存成本與供貨穩定性。
o 監控庫存水準，避免過度庫存或缺貨。處理呆滯庫存和報廢。
(5)品質管理協調：
o 保供應商產品和服務符合公司標準。
o 處理供應商的品質異常，並推動根本原因分析和改進措施。
(6)風險管理：
o 識別並評估供應鏈中的潛在風險 (如地緣政治、自然災害、單一供應商依賴等)。
o 制定風險應對計畫，確保供應鏈的韌性。
✅Qualifications
1. 學歷： 學士學位或以上，主修供應鏈管理、工業工程、電子工程、商學等相關領域。
2. 經歷： 5年以上半導體產業供應鏈管理經驗，特別是 Fabless 或 IDM 背景。
o 具備與設計服務廠商(Design Service)、晶圓代工廠 (Foundry) 或封裝測試廠 (OSAT) 合作的實務經驗。
o 熟悉半導體製造、封裝、測試流程。
3. 專業知識：
o 深入了解半導體供應鏈管理原則、策略與最佳實踐。
o 熟悉半導體產業的運作模式和生態系統。
o 熟悉契約管理、採購、物流、庫存管理等相關知識。
4. 技能：
o 優秀的談判和溝通能力： 能有效地與內部團隊和外部供應商進行溝通和協商。
o 數據分析能力： 能夠使用數據分析工具進行供應鏈數據分析和決策。
o 專案管理能力： 能夠同時管理多個供應鏈專案。
o 熟練使用 ERP系統和Microsoft Office 套件。
o 流利的英語溝通能力 (口語和書面)，能與國際供應商溝通與合作。
5. 個人特質：
o 具備策略思維和問題解決能力。
o 抗壓性高，能在快速變化的環境中工作。
o 細心、負責任，具備良好的團隊合作精神。
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