鴻軒科技股份有限公司

1. 研究V2X與人機介面可能面臨之安全攻擊 2. 研究底層實體網路可能面臨之安全攻擊 3. 研究重要資料與軟體/韌體之可能安全漏洞 4. 針對車用所需網路安全提出防護機制 5. 實作關鍵防護機制之軟硬體

1. 類比IP相關功能的設計與實現 ADC, DAC, OSC, PLL, high speed interface...etc. 2. 類比IP設計方法和品質改進 3. 類比IP仿真與分析 4. 與第三方類比 IP 供應商合作 5. 與數位電路作co-sim

1. 數位IP相關功能的設計與實現 2. 數位IP設計方法和品質改進 3. 數位IP仿真與分析 4. 與第三方數位 IP 供應商合作 5. 開發車用專用DIP (例如: 馬達控制IC, 高速介面 …等)

Join our Automotive SoC design team and drive the development of Design-for-Test (DFT) architecture for next-generation automotive system-on-chips. You will own DFT methodology definition, design, and implementation, collaborating closely with RTL, physical-design, and test-engineering teams to deliver high-quality, ISO 26262-compliant silicon. 1. MCU/DSP系統架構及數位電路設計 2. 數位SoC設計/集成，包括 (1) Foorplan、pinmux 和測試模式 (2) RTL、SDC 集成和相關檢查，包括 CDC、CCD、nLint 和 CLP (3) 依據架構定義之Physical-aware clock / reset / mixed-mode / DFT進行設計和驗證 (4) Chip-level synthesis、DFT (SCAN / MBIST) insertion, LEC and STA

Join our Automotive SoC design team and drive the development of Design-for-Test (DFT) architecture for next-generation automotive system-on-chips. You will own DFT methodology definition, design, and implementation, collaborating closely with RTL, physical-design, and test-engineering teams to deliver high-quality, ISO 26262-compliant silicon. 1. Define and implement SoC-level DFT architecture (SCAN, MBIST, LBIST, boundary scan, JTAG, etc.). 2. Support the full product life-cycle from new-product introduction (NPI) through mass production (MP): * Develop and debug ATE test programs. * Drive test-coverage closure and yield improvement. * Optimize test time and cost. 3. Interface with IP owners, test engineers, board-design, and process teams to ensure CP/FT/SLT test requirements are met. 4. Provide technical leadership on automotive functional-safety (ISO 26262) DFT flows and documentation.

1. 功能安全相關功能的設計與實現 2. ISO 26262 FMEDA 設計和品質改進 3. 功能安全仿真、驗證與分析 4. 與產品團隊合作進行ISO 26262認證 5. 與產品團隊合作制定安全目標和符合安全需求

Job Summary: This role is responsible for defining the architectural and functional specifications of custom integrated circuits to meet the requirements of specific applications. It collaborates with cross-functional teams to ensure the successful development of ASICs, from concept to production. Responsibilities: 1. Architectural Design: Define the high-level architecture of ASICs, considering the requirements and constraints of the target application. Determine the system's functionality and performance goals 2. Specification Development: Create detailed specifications for ASIC components, including microarchitecture, logic design, memory hierarchy, and interface requirements 3. Feasibility Analysis: Evaluate the feasibility of the proposed architecture by performing modeling, simulations, and trade-off analysis 4. Collaboration: Work closely with cross-functional teams, including ASIC designers, hardware engineers, software engineers, and product managers, to ensure the ASIC meets the application's requirements 5. Design Review: Participate in design reviews and provide input on architectural decisions, trade-offs, and optimizations 6. Performance Optimization: Identify and implement performance enhancements and optimizations to meet the target specifications 7. Risk Assessment: Assess potential risks and challenges in the architecture design and propose mitigation strategies

Job Summary: This role is in charge of designing the high-level architecture of SoC software, ensuring the scenarios, requirements, and constraints are fulfilled by the combination of hardware and software architecture, and ensuring the feasibility and competitiveness of final products. Responsibilities: 1. Competitor Analysis, IP evaluation, Scenario analysis, and Requirement evaluation 2. Design system architecture and propose HW/SW partition. 3. Evaluate, identify and develop software architecture and solutions. 4. Design software control flow and data flow of hardware IP and ASIC. 5. Evaluation low power, performance, latency, computing power, bandwidth, and throughput and propose optimized solutions. 6. Monitor pre-silicon and post-silicon development to ensure the consistency of function, power, performance, and stability of products.

Job Summary: This role is responsible for defining and designing the high-level architecture of complex systems, ensuring that all components, hardware, and software work harmoniously to achieve specific goals and requirements. It collaborates with cross-functional teams to provide architectural guidance throughout the system development lifecycle. Responsibilities: 1. Architectural Design: Define the high-level architecture of complex systems, considering the system's requirements, performance objectives, scalability, and flexibility 2. Requirements Analysis: Collaborate with stakeholders to gather and analyze system requirements, ensuring that architectural decisions align with business and technical goals 3. Component Integration: Ensure that various hardware and software components are integrated effectively within the system architecture, promoting interoperability and reliability 4. Technology Selection: Evaluate and select appropriate technologies, frameworks, and platforms for implementing system components, considering factors such as cost, performance, and scalability 5. System Modeling: Create system models and diagrams to visualize and communicate architectural concepts and designs to cross-functional teams and stakeholders 6. Performance Optimization: Identify and address performance bottlenecks and make recommendations for system-level optimizations

Job Summary: This role is responsible for defining the architectural and functional specifications of custom integrated circuits to meet the requirements of specific applications. It collaborates with cross-functional teams to ensure the successful development of ASICs, from concept to production. Responsibilities: 1. Architectural Design: Define the high-level architecture of ASICs, considering the requirements and constraints of the target application. Determine the system's functionality and performance goals 2. Specification Development: Create detailed specifications for ASIC components, including microarchitecture, logic design, memory hierarchy, and interface requirements 3. Feasibility Analysis: Evaluate the feasibility of the proposed architecture by performing modeling, simulations, and trade-off analysis 4. Collaboration: Work closely with cross-functional teams, including ASIC designers, hardware engineers, software engineers, and product managers, to ensure the ASIC meets the application's requirements 5. Design Review: Participate in design reviews and provide input on architectural decisions, trade-offs, and optimizations 6. Performance Optimization: Identify and implement performance enhancements and optimizations to meet the target specifications 7. Risk Assessment: Assess potential risks and challenges in the architecture design and propose mitigation strategies

Job Summary: This role is in charge of designing the high-level architecture of SoC software, ensuring the scenarios, requirements, and constraints are fulfilled by the combination of hardware and software architecture, and ensuring the feasibility and competitiveness of final products. Responsibilities: 1. Competitor Analysis, IP evaluation, Scenario analysis, and Requirement evaluation 2. Design system architecture and propose HW/SW partition. 3. Evaluate, identify and develop software architecture and solutions. 4. Design software control flow and data flow of hardware IP and ASIC. 5. Evaluation low power, performance, latency, computing power, bandwidth, and throughput and propose optimized solutions. 6. Monitor pre-silicon and post-silicon development to ensure the consistency of function, power, performance, and stability of products.

Job Summary: This role is responsible for defining and designing the high-level architecture of complex systems, ensuring that all components, hardware, and software work harmoniously to achieve specific goals and requirements. It collaborates with cross-functional teams to provide architectural guidance throughout the system development lifecycle. Responsibilities: 1. Architectural Design: Define the high-level architecture of complex systems, considering the system's requirements, performance objectives, scalability, and flexibility 2. Requirements Analysis: Collaborate with stakeholders to gather and analyze system requirements, ensuring that architectural decisions align with business and technical goals 3. Component Integration: Ensure that various hardware and software components are integrated effectively within the system architecture, promoting interoperability and reliability 4. Technology Selection: Evaluate and select appropriate technologies, frameworks, and platforms for implementing system components, considering factors such as cost, performance, and scalability 5. System Modeling: Create system models and diagrams to visualize and communicate architectural concepts and designs to cross-functional teams and stakeholders 6. Performance Optimization: Identify and address performance bottlenecks and make recommendations for system-level optimizations

1.規劃並主導 EVB/EMC/SLT/SIP/FPGA等硬體平台架構設計，包含系統架構、測試方法、Pin-mux 規劃及關鍵零件選型。 2.負責 EVB、EMC、SLT 、FPGA等測試板之電路設計、PCB Layout、DRC/PI simulation、製造與驗證。 3.建立硬體規格文件、使用手冊、測試計畫與測試報告，確保設計與驗證具備完整性。 4.規劃並執行晶片相關測試（SIV、Performance、I/O Conformance、Characterization（AC/DC), and System validation)。 5.與團隊跨部門協作，定義測試案例、驗證規範與測試工具。 6.Reference Design Board，提出開發套件、應用平台或reference design 的設計方案，包含規格鎖定、Layout Guidelines 與 BOM 成本評估。 7.負責 Configuration Management，建立並追蹤 HW/SYS CI 清單，確保設計版本與測試一致性。 8.帶領並培養硬體與系統驗證團隊，包括人員招募、技術指導與資源規劃。

1.規劃並主導 EVB/EMC/SLT/SIP/FPGA等硬體平台架構設計，包含系統架構、測試方法、Pin-mux 規劃及關鍵零件選型。 2.負責 EVB、EMC、SLT 、FPGA等測試板之電路設計、PCB Layout、DRC/PI simulation、製造與驗證。 3.建立硬體規格文件、使用手冊、測試計畫與測試報告，確保設計與驗證具備完整性。 4.規劃並執行晶片相關測試（SIV、Performance、I/O Conformance、Characterization（AC/DC), and System validation)。 5.與團隊跨部門協作，定義測試案例、驗證規範與測試工具。 6.Reference Design Board，提出開發套件、應用平台或reference design 的設計方案，包含規格鎖定、Layout Guidelines 與 BOM 成本評估。 7.負責 Configuration Management，建立並追蹤 HW/SYS CI 清單，確保設計版本與測試一致性。 8.帶領並培養硬體與系統驗證團隊，包括人員招募、技術指導與資源規劃。

ASIC Physical / Backend Designer 將負責數位電路的後端實體設計，包括規劃與優化晶片的布局（Floorplan）、電源網格設計（Power Grid Design）、自動布局與繞線（Place and Route）、時脈樹合成（Clock Tree Synthesis）、靜態時序分析（Static Timing Analysis, STA）、物理驗證（Physical Verification）等工作。 主要職責 1. 熟悉以下製程：22nm,16/12nm, 7/5nm Automotive process及其Signoff Criteria. 2. 晶片布局設計：根據Design Specification, Pin Table, Netlist，執行Floorplan規劃及設計。 3. 熟悉Safety Specification Format (SSF)及其實作流程。 4. 時序分析和優化：進行靜態時序分析，熟悉CTS相關技術，確保晶片具備必要的性能，並解決潛在的Timing Violations. 5. 電源架構規劃：熟悉UPF流程，具備Multi-Voltage設計經驗。 6. 功耗分析及優化：熟悉IR分析流程，進行Power Grid優化以符合設計要求。 7. 面積優化：在滿足設計約束條件的前提下，優化晶片布局以達到最小化面積目標。 8. 設計驗證：執行物理驗證(PV)工作，包括DRC（設計規則檢查）、LVS（佈局與網表檢查）等，確保設計符合製造要求。 9. 了解製造相關流程，包括封裝設計和製造約束條件。 10. 與團隊協作：與前/中端設計工程師、製造工程師及測試團隊緊密合作，確保設計符合需求。

Join our Automotive SoC design team and drive the development of Design-for-Test (DFT) architecture for next-generation automotive system-on-chips. You will own DFT methodology definition, design, and implementation, collaborating closely with RTL, physical-design, and test-engineering teams to deliver high-quality, ISO 26262-compliant silicon. 1. Define and implement SoC-level DFT architecture (SCAN, MBIST, LBIST, boundary scan, JTAG, etc.). 2. Support the full product life-cycle from new-product introduction (NPI) through mass production (MP): * Develop and debug ATE test programs. * Drive test-coverage closure and yield improvement. * Optimize test time and cost. 3. Interface with IP owners, test engineers, board-design, and process teams to ensure CP/FT/SLT test requirements are met. 4. Provide technical leadership on automotive functional-safety (ISO 26262) DFT flows and documentation.

1. 數位IP相關功能的設計與實現 2. 數位IP設計方法和品質改進 3. 數位IP仿真與分析 4. 與第三方數位 IP 供應商合作 5. 開發車用專用DIP (例如: 馬達控制IC, 高速介面 …等)

1. 功能安全相關功能的設計與實現 2. ISO 26262 FMEDA 設計和品質改進 3. 功能安全仿真、驗證與分析 4. 與產品團隊合作進行ISO 26262認證 5. 與產品團隊合作制定安全目標和符合安全需求

1. 類比IP相關功能的設計與實現 ADC, DAC, OSC, PLL, high speed interface...etc. 2. 類比IP設計方法和品質改進 3. 類比IP仿真與分析 4. 與第三方類比 IP 供應商合作 5. 與數位電路作co-sim

1. Strategic Composition: -Conduct research to decipher the harmonious desires of our customers and end users. What resonates with them? What chords of functionality do they crave? -Develop an overarching product strategy—a grand symphony that aligns with business goals and user needs. 2. Product Score Creation: -Define product specifications and requirements. Imagine these as musical notes—the building blocks of our masterpiece. -Collaborate with cross-functional teams—engineering, marketing, and design. Together, you’ll compose a symphony that dazzles. 3. Launch Overture: -Guide and oversee the design, development, and launch of our IC products. Picture yourself on stage, conducting the debut performance. -Ensure the product hits the right notes—quality, functionality, and user experience. 4. Visionary Baton: -Define the long-term vision for our products. Where do we want to be in five acts? Ten? -Lead the execution of that vision. Rally the orchestra—developers, designers, and testers—to play in harmony.