【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=343&source=104 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibility: 1. Design CMOS Image Sensor (CIS) & depth sensor related test chips for process development 2. Design CIS or non-CIS test lines or test chips for process monitoring and improvement 3. Data acquisition and analysis: CIS key performance indices and random noises characterization
待遇面議
(經常性薪資達 4 萬元或以上)
不拘
1. Master of Science in Electrical Engineering is preferred but not required; major in Electrical Engineering or closely related fields is required 2. Analog design skills: schematic entry, SPICE and mixed-mode simulation, layout supervision ▫ Experience in one or more of the following designs: ADC’s, DAC’s, comparators, amplifiers, regulators, LVDS ▫ Familiar with CMOS transistor operations, devices physics, and basic semiconductor processes 3. Experience: 1~5 years in related fields, e.g., test chips, products ▫ Experience in full-chip verification, custom layout, tapeout, and silicon validation 4. Knowledge of PCB schematic and layout design for chip validation is preferred 5. Direct experience in CMOS image sensor is highly preferred 6. Hands-on capabilities in data acquisition, analysis, and reporting are required
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