Principal Engineer, Digital IC Design_STA

10/05更新

Marvell_邁威爾科技有限公司本公司其他工作

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應徵

應徵人數 0~5 人

工作內容

ASIC design engineer responsible for post-RTL design flow. He/She will be responsible for block and /or chip level synthesis, timing closure, DFT generation, and ECOs. The responsibilities include but are not limited to. • Improve the design methodology and flow. • Synthesis, timing closure, and DFT support for various types of SerDes IPs ranging from 10Gbps to 224Gbps data rates for different applications. • Collaborate with Analog/Digital design teams to deliver competitive SerDes IP solutions for all the Marvell product lines. • Provide support to the product teams, for both pre and post-silicon

職務類別

工作待遇

待遇面議

（經常性薪資達 4 萬元或以上）

工作性質

全職

上班地點

新竹縣竹北市

遠端工作

管理責任

不需負擔管理責任

出差外派

無需出差外派

上班時段

日班

休假制度

週休二日

可上班日

一個月內

需求人數

1~2人

條件要求

工作經歷

7年以上

學歷要求

碩士以上

科系要求

電機電子工程相關

語文條件

英文 -- 聽 /精通、說 /精通、讀 /精通、寫 /精通

擅長工具

不拘

工作技能

電子電路設計、數位晶片產品開發、數位電路驗證

其他條件

Master’s degree and/or PhD in EE, CS or related fields and 3+ years of experience. Good personal communication skills and team working spirit. Hardworking and motivated to be part of a highly competent design team. Must have good post-RTL experience including synthesis, timing analysis and physical design. Able to perform custom placement and routing for mixed-signal designs. Flexible to move between all post-RTL design activities as required. Good understanding of block and top-level physical timing closure. Must be proficient in the following skills: • Logic or physical synthesis using Synopsys or Cadence tools • DFT generation and verification • Static timing analysis using Primetime • Physical design for 28nm and beyond • Strong Perl and Tcl scripting skill Highly desirable skills: • Low power design • Circuit level or custom design experience • Floorplanning, clock-tree synthesis and power planning/analysis • Signal integrity and physical verification

顯示全部

福利制度

Marvell hires the best of the best. We are the most innovative company working in the semiconductor industry today. We have an outstanding history of delivering next generation products that are revolutionizing the way the world works, and we’re looking for smart, talented, like-minded people to join us on the adventure. If you want to achieve great things, then we want to talk with you. And we want to reward you for striving for the best. We not only push the envelope in terms of product development, we foster your personal and professional growth by providing an advanced research environment where your work can really make a difference. You’ll be shoulder to shoulder with some of the most talented people in the world and offered the opportunity to help set the standard that other companies want to follow. At Marvell, we attract the top talent in the industry. And we know that top talent expects and deserves stellar benefits. We offer one of the most robust benefits packages available today, designed with your particular needs in mind. Of course you’ll be offered a competitive salary, plus incentive stock options, but that’s just the start. You’ll also be offered: * Insurance Coverage: Labor Insurance, National Health Insurance, Group Insurance * Pension Plan * Incentive Plan * Employee Stock Purchase Plan * Employee Stock Option Plan * Restricted Stock Option Plan * Good Vacation and Leave Plan * Medical/Health Club Reimbursement Plan * Competitive Training and Education Plan * Employee Welfare Committee Benefits * More...

聯絡方式

聯絡人

Selena Yu

其他

https://marvell.wd1.myworkdayjobs.com/MarvellCareers/job/TW---Hsinchu---Zhubei-City/Principal-Engineer--Digital-IC-Design_2501741

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