Join our verification team to ensure the quality and reliability of SoC-level IP used in next-generation automotive systems. You will develop UVM-based environments, drive functional and safety verification, and collaborate with cross-disciplinary teams to deliver ISO 26262-compliant silicon. 1. Plan & execute verification of automotive-grade IP at block, subsystem, and full-chip levels 2. Develop UVM test environments, scoreboards, and coverage to meet quality and safety goals 3. Create diagnostic and stress tests for pre-silicon and post-silicon validation, ensuring performance and robustness under corner conditions 4. Collaborate with design, DV, and safety teams to define verification strategies, close code/functional coverage. 5. Drive continuous automation of regression, data mining, and result visualization to accelerate tape-out readiness
待遇面議
(經常性薪資達 4 萬元或以上)
必要條件 1. B.S. in EE, CE, CS, or related field (or equivalent experience) 2. 3+years hands-on verification experience with SystemVerilog / UVM 3. Proven track record building and maintaining testbenches, stimuli, and checkers for complex IP blocks or subsystems 加分條件 1. M.S. in EE, CE, or CS 2. Scripting skills (Python, Perl, Shell, or Bash) to automate regressions and data analysis 3. Working knowledge of Linux-based development flows and ARM-based SoCs 4. Familiarity with automotive safety standards (ISO 26262, ASIL), CAN/LIN/, and functional safety analysis. (工作地點: 新竹)
◆薪酬待遇 保14個月(第一年年終會依到職比例計算) 年度績效 / 營運獎金 (視當年度營運及個人績效表現給予相應的鼓勵) 暢通之晉升管道 ◆保險 勞保/健保/勞退 優質員工團體保險計劃 (對象包含 : 配偶及子女) ◆優於法令之假別 給薪之家庭照顧假、年度體檢假、旅遊準備假、新人假3天、彈性休假、10天不扣薪病假 ◆多元關懷與員工照顧福利 開工/元宵/端午/中秋/生日禮金 結婚/生育禮金 高額度年度健康檢查補助 高額度員工旅遊補助 部門聚餐補助 員工子女獎學金 年終尾牙及尾牙抽獎 新春伴手禮金 餐費補助 停車費補助 不定期豐富多元之福利活動 ◆教育訓練 包含實體課程、線上e-Learning與工作中的OJT訓練資源 -內訓外訓:專業類/管理類/通識類/E-Learning