找頭鹿 智能客服
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Working Location : Taipei / HsinChu Job Description 1. SoC chip integration from RTL to gate level including timing closure and DFT 2. Digital design methodology integration and QC flow improvement
待遇面議
(經常性薪資達 4 萬元或以上)
不拘
Requirement 1. Cell base IC design flow knowledge and experience 2. Digital IC design EDA tool and flow development experience 3. Basic RTL design experience and Timing/CTS/Physical concept 4. good script skill i.e. Per/Python/Tcl interested in programming 5. DFT knowledge and integration experience is plus