Job Description:
This role will support digital circuit design of mixed-signal ICs, such as sensors, motor drivers, data converters.
Key Responsibilities:
1. RTL design, including micro-architecture, serial interface or digital signal
processing for mixed-signal products.
2. Use Static timing analysis tools and formal verification tools to verify a digital
design.
3. Understand the design specification for developing the coverage-driven
verification.
4. Build reusable functional models, monitors and checkers for the design
verification
5. Collaborate closely with internal product development teams and support
digital circuit design
Qualifications:
1. Experience with mixed-signal verification language, such as SystemVerilog and
Verilog-AMS.
2. Experience with UVM design is a strong plus.
3. Demonstrate strong analytical and problem-solving skills
4. Strong time management skills that enable on-time project delivery
5. Self-starter. Passionate about the creative work. Good communication skills and
team player. Able to take the initiative and drive for results.
【本職缺優先審核至高通官網投遞人選】請至高通官網上傳英文履歷表:https://qualcomm.wd12.myworkdayjobs.com/External/job/Hsinchu-City-TWN/GPU-Compiler-Development-Engineer--up-to-Sr-Staff--Hsinchu-_3057774
【Talents who apply job through Qualcomm Career Website will be reviewed and considered as top priority】
https://qualcomm.wd12.myworkdayjobs.com/External/job/Hsinchu-City-TWN/GPU-Compiler-Development-Engineer--up-to-Sr-Staff--Hsinchu-_3057774
【Job Description】
The largest provider of premium mobile SoC (system on chip) solutions. Adreno GPU has been driving the mobile industry toward rich graphics and gaming experience on smartphones. Now its power efficient GPU technology becomes fundamental to enable some new exciting markets beyond the smartphone like VR/AR, IoT, AI, drone, autonomous driving. GPU compiler is a key component of overall graphics technology, especially in terms of its influence on application’s performance on GPU. We are looking for talented engineers to create world class GPU compiler products to enable high performance graphics and compute with low power consumption.
【Responsibilities】
This position will be responsible for research, development and delivery of Qualcomm's Adreno GPU compiler products to our worldwide customers. At same time, there will be opportunities to influence GPU hardware design based on experience on how our GPU compiler has been used by real world users.
【Minimum Qualifications】
* Good C/C++ programming skills
* Good communication skills and teamwork spirit, reliable and self-motivated
【Preferred Qualifications】
* Compiler development. For example, LLVM or GCC
* Graphics knowledge or graphics/game software development
* DirectX, OpenGL/Vulkan, OpenCL, or CUDA compiler development
* D3D/OpenGL/Vulkan/OpenCL/CUDA driver development
[job description]
Wolley is seeking candidates for a digital design engineer position. You will join an experienced team designing next-generation memory, storage controllers, and high-speed interface standard.
You will also contribute to design concept discussion, architecture definition, as well as design implementation.
‧ Architecture design and RTL implementation
‧ System bus and related peripheral designs
‧ SoC and emulation platform design
‧ SoC system performance analysis
[Requirement]
1. Bachelor's or Master's degree in Electrical Engineering or related fields
2. Familiar with RTL design, SystemVerilog, front-end design flow
3. The following working knowledge is desired:
* Python programming
* TCL scripting
* Universal Verification Methodology (UVM)
* Low power design and analysis
Andes Custom Extension™ (ACE) is an innovative technology that lets customers create their own powerful custom instructions for domain-specific applications. See more information here: http://www.andestech.com/en/products-solutions/andes-custom-extension/.
You will develop functional verification infrastructure and create test patterns to ensure functional correctness of a design. You will learn and use CPU domain knowledge as well as ACE specifications to develop test plans for various verification environments, such as self-check UVM environment for custom instructions and block-level UVM environment for the generated ACE design. You will be involved in the new ACE feature specification discussion. You will work closely with the design engineers to ensure functional correctness.
===================
Responsibilities
===================
Design verification for ACE.
Build functional verification infrastructure, which includes various verification environments.
Produce test plans and patterns regarding advanced ACE features.
Job Description
· Become a trusted advisor to the customer for EDA tools
· Coordinate with sales and marketing to find new opportunities, position ICV for success, and increase ICV business
· Influence the buying decisions through technical success (product demos, tapeouts, evaluations, etc)
· Enable customers to use product successfully and autonomously (installation, script assistance, training, etc)
· Deploy and train customers on new and advanced product features
· Solve customer problems to build trust with product
· Manage issues (bugs) to resolution with customer and product team
· Drive product enhancements as needed to support business
· Develop workarounds to meet customer deliverables
· Educate product team and peers about technical trends and opportunities
Key Qualification
· Master Degree in Electrical Engineering,/ Computer Science
· Experience in digital design/ physical design or physical verification of
semiconductors is a plus
· UNIX navigation and scripting (Perl, Tcl and Python)
· Presentation skills