「電性模擬工程師-新竹」的相似工作

1.依客戶需求設計PCB (Load board/BIB) 達成客戶所需交期 2.整合與改進Layout and PCB simulation 3.協助客戶解決PCB問題與技術支援 4.BOM表維護, PCB生產問題排除與追蹤 5.具良好團隊合作、溝通能力與學習力

1.PCB測試板工程變更/Debug/Maintain(需要焊接) 2.PCB測試板上機驗証(需PCB維修相關經驗，維修過LB、PC、BIB尤佳) 3.面對客戶、與客戶溝通工程內容

1. Ensure PKG design is optimized with SI/PI/Thermal requirements. 2. Create the PKG/RDL/Subtract SI 3D modeling and perform extraction of S-Parameters and RLGC model. 3. Full-wave modeling of VIAs, Connectors, Package and PCB channels, components using 3D full-wave EM tools. 4. Provide the CM(Construction rules) and Design Rules(guidelines) for the PKG/RDL/Subtract design. 5. Provide the Substrate manufacturing process and material property. 6. SI(Signal integrity) simulation and optimization on package stack-up, power/ ground plane assignment and optimization, decoupling cap locations to minimize power ground noise. 7. PI(Power integrity) analysis for state of art package/system designs, which include but not limited to package layout model extraction, transient noise analysis to meet the silicon noise spec, decoupling strategy and analysis. 8. CTK(Crosstalk) analysis and reduction on-package considering mutual-effect by on-die, on-silicon interposer and on-PCB. 9. SSN(Simultaneous Switching Noise)/SSO analysis for I/O (DDR5/4/3, LPDDR5/4/3, etc.) power domain. 10. Eye diagram(ZRZ/PAM4) and jitter analysis for CPS(Die Chip-PKG-System PCB) co-simulations. 11. Familiar with trade-offs among package cost, technologies, design, performance, power, and thermal requirements. 12. Familiar with assembly and substrate manufacturing process is a plus. 13. Familiar with programming/scripting in Java, VBScript, PERL, TCL, MatLab and/or equivalent. 14. Experienced in SI PI automation tool development with Python or PyAEDT is a plus. 15. Working with ASIC/HW/Production team.

- Job Description - We are looking for a highly motivated SI/PI Engineer to join our technical team. You will play a key role in simulating and analyzing high-speed signal and power integrity in next-generation probe card systems. Using advanced 3D modeling and full-wave simulation tools, you will help push the boundaries of traditional limitations and enable breakthrough designs supported by our proprietary processes. - Responsibilities - • Develop and optimize 3D SI/PI models for high-speed test interfaces • Perform system-level simulations using tools such as Ansys HFSS, SIwave, ADS • Explore new layout and structural ideas enabled by our in-house fabrication capabilities • Evaluate the impact of materials and design configurations on SI/PI performance • Collaborate with R&D and manufacturing teams to improve PDN and signal routing reliability - Qualifications - • Master’s degree or above in Electrical Engineering, Electronics, Telecommunications, Physics, Materials Science, Mechanical Engineering, or related fields • 1+ years of experience in SI/PI simulation and modeling; background in probe card, PCB, or advanced packaging is a plus • Proficient in 3D modeling and simulation tools (e.g., HFSS, CST, COMSOL) • Strong analytical thinking and self-driven problem-solving capabilities • Good command of technical English (reading and documentation) - What We Offer - • Opportunity to develop next-generation probe card platforms that lead the industry • Collaborative and innovation-driven work environment with Taiwan & U.S. teams • Fast learning curve, strong technical exposure, and room for individual impact

1. Electromagnetic simulation and electrical modeling by using Ansys EM suite. 2. SI/PI high frequency / high speed signal integrity / power integrity / antenna radiation with Ansys EM/ADS systems. 3. 3D full wave FEM/FDTD large-scale simulation and validation with EMpro and HFSS HPC. 4. Signal emulation and performance simulation in PCB/Substrat of optical module.

Layout Design 協助專案佈線,文字面等後續處理事宜

1.負責電路板維修,電子電機系畢業 2.熟電子電路者尤佳

1.依客戶需求設計PCB (Load board) 達成客戶所需交期 2.整合與改進Layout and PCB simulation 3.協助客戶解決PCB問題與技術支援 4.BOM表維護, PCB生產問題排除與追蹤 5.具良好團隊合作、溝通能力與學習力

1. 針對高速介面進行信號完整性模擬。 SI simulation : TDR, S parameter,Eye diagram,Crosstalk.. 2. 對於佈局圖給予改良建議。 3. 信號完整性異常除錯。 溫馨提醒：只有經過台郡授權的人員才能處理您的個人簡歷，台郡亦將遵守相關法規與政策，保護您的個人資料。投遞簡歷視同您同意台郡收集您的個人資訊。

1. 數位、類比信號PI/SI模擬及設計優化。 2. VNA、TDR、oscilloscope儀器量測及操作 。 3. 其他主管交辦事項。

[General Summary] As a forward-thinking technology company, Augentix advances the limits of innovation in "Industrial and Embedded IoT" to deliver next-generation experiences and accelerate digital transformation toward a smarter, more seamlessly connected world. We are seeking a PCB Design Engineer with strong theoretical foundation and simulation driven design methodology to lead high speed board level development. You will be responsible for defining and verifying board level electrical design, ensuring optimal signal integrity across multiple high speed interfaces. You will be supported by experienced layout engineers capable of implementing your design guidance and constraints, allowing you to focus on PCB circuit design and system validation. This position offers the opportunity to build structured PCB design practices, improve team capability, and drive electrical excellence through direct ownership of simulation and cross team collaboration. [Responsibilities] ★ Lead system level PCB electrical design for interfaces such as LPDDR4/5, USB 3.x, SDIO 3.x, MIPI and Ethernet. ★ Define PCB stack up and routing strategy to meet signal integrity objectives. ★ Perform circuit level simulations using tools such as PSpice. ★ Own schematic level electrical planning and define layout constraints for critical signal groups. ★ Provide guidance to supporting layout engineers to ensure adherence to electrical rules and best practices. ★ Correlate simulation results with lab measurements and assist in electrical issue root cause analysis. ★ Document simulation methodology constraint guidelines and validation reports. ★ Occasional business travel across APAC and other regions may be required. [Minimum Qualifications] ★ Familiarity with differential and single ended routing across LPDDR4/5, USB 3.x, SDIO 3.x, MIPI and Ethernet. ★ Proficiency with layout tools such as Allegro. ★ Exposure to EMI mitigation techniques and hands on experience in EMI pre compliance testing. ★ Demonstrated ability to lead layout teams or mentor junior engineers in constraint based PCB design. ★ Ability to create structured documentation and design guidelines to scale internal processes. ★ Strong debugging and problem solving skills with working knowledge of firmware and software to support system level root cause analysis. ★ Comfortable working in a globally distributed, cross-disciplinary engineering team.

工作內容 1. 負責Ansys SIwave/HFSS/Q3D 等高頻軟體技術支援，包含售前/售後支援、教育訓練 2. 拜訪客戶介紹、推廣軟體以及解決方案 3. 與原廠技術團隊對接，協助溝通/解決客戶問題、學習軟體新功能 4. 高頻相關工程專案規劃與執行 5. 支援公司市場行銷活動 ---------------------------------------------------- 本公司具備Ansys產品專業技術人員，擁有廣大的技術資源供學習， 市場遍及台灣、中國及東協等地。 我們不斷地開拓新技術及市場，誠摯希望有志一同的你加入~ 歡迎光學、電磁學、電子電路、電磁干擾、光波導、矽光子各領域專家加入我們的團隊!! 思渤科技培養的不只只針對工作需求的專業工程技術人才， 更是培養技術人才自身技術品牌的職涯延伸， 讓你不單只是單一技術在此發展， 而是廣闊長遠的打造出個人技術品牌知名度， 讓你在專業領域中與更多佼佼者一起發光發亮!! ｜遠距辦公。節省通勤成本。溝通不斷線｜ ☆業務試用期三個月通過後，即可申請遠距辦公方式！ ☆每週只需進公司辦公一天，剩下四天靈活運用外勤出差或在家辦公，節省塞車通勤時間，線上溝通快速不斷線。 ｜舒適好開公務車。公務拜訪便利又安全｜ ☆提供三年內新車預約公務拜訪使用，安全又舒適。 ☆不需自己養車，找車位，公司定期保養管理，外勤無負擔。 ｜薪獎優渥。輕鬆get百萬年薪！｜ ☆業績獎金 ☆盈餘獎金 ☆年終獎金 ☆中秋、端午獎金 ☆配發公務機 ☆結婚禮金/生育津貼 ☆推薦人才獎金 ☆近3年平均調薪幅度3~5%

1. RF天線最佳化模擬。 2. 電磁元件設計模擬。 3. 相關量測(RF天線)。 4. 能獨立工作及專案執行。

【產品範疇】 1.DDI / TP / TDDI/ TCON/ Power等顯示相關產品 【工作內容】 1. SI/PI/EM issue solving, performance optimization, and design rule development 2. Chip/PKG/Board simulation and measurement for SI/PI/EM issue. 3. Co-work with system engineers, IC designers, and customers on product design-in tasks.

1.飛針機機台操作 2.飛針機程式撰寫 3.元件焊接 4.產品維修

【工作內容】 1. 進行電性故障分析實驗及相關測試設備操作。 2. 工程實驗討論及技術諮詢，實驗結果判定與分析報告撰寫。 3.年薪依個人表現而異，表現優異之工程師年薪可達85萬，表現優異之副工程師年薪可達75萬。 4.班別津貼優於業界。

1.電子專業本科及以上學歷 ； 2.熟悉模擬/數位電路設計,能獨立完成原理圖設計（如Altium Designer、PADS等工具）； 3.精通分析電子電路，ICT測試原理以及數字器件datasheet，bsdl檔解讀； 4.精通TRI8100/keysight3070平臺的程式開發和調試，3年以上開發調試經驗； 5.精通JTAG，FLASH，EEPROM，I2C，SPI等數字器件調試及測試邏輯原理； 6.嵌入式開發：熟悉單片機（如STM32、51系列）； 7.根據客戶需求，提供給客戶專業的ICT測試意見及解決方案，提升測試覆蓋率； 8.能適應國內外出差；

Purpose of this Position 深入研究高速訊號，在高速硬體電路Signal Integrity上提供最佳設計且確保生產品質 Major Areas of Responsibility 專案研發 - Perform high speed signal integrity simulation including 10G/40G、25G/100G、PCIE、SATA、DP、USB、DDR3/DDR4/DDR5. - Perform pre-layout, layout constraint, and post-layout simulation processes. - PCB stackup design and layout review for high speed signal and PDN. - Build component models to ensure the correlation between SI/PI simulation and measurement. - Solid SI experience in resolving technical issues and performing detailed analysis. 團隊合作 - Collaborating with EE teams to refine high-speed signal performance. - Collaborate with the layout engineer to provide clear layout guidelines and enhance footprint optimization.

如果你很懂： 1. Signal Integrity (信號完整性)分析/設計/測試，高頻測試版/測試系統設計與分析 2. CST 相關高頻模擬軟體 3. 高頻cable或零組件之訊號/雜訊設計/測試與debug 4. 會IEEE 802.3 系列或PCI-e規格 期待你可以： 1.跨部門溝通確認機構/客戶需求與高頻特性 2.針對連接器/線材高頻特性提出設計改善方向與模擬結果 3.協助分析PCB高頻特性與提出設計改善方案 4.能進行高頻分析,並建立模型讓模擬與實品盡可能趨近

1. PH產品維修檢測及協助提升作業品質。 2. 客端案件處理、工程DOE及維修建議。 3. 配合上機，確認相關參數設定或線上解決使用的問題。 4. 撰寫維修驗證報告，蒐集所需資訊提供給客戶及公司內部。 5. 配合假日排班值班，配合外派或出差。