「(台南)類比IC設計工程師 (穿載式整合)」的相似工作

1. PLL design 2. High speed receiver design (1.5Gbps/4Gbps/5.4Gbps/8.1Gbps/12Gbps) 3. High speed transmitter design (1.5Gbps/4Gbps/5.4Gbps/8.1Gbps/12Gbps) 4. eDP receiver 5. V-by-One receiver 6. MIPI D-PHY 7. HDMI Receiver 8. HDMI Transmitter 9. LCD P2P interface Transmitter 10. LDO and DCDC design 工作地點:新竹/台南

1.SERDES CMOS Circuit Design ( HDMI,DisplayPort, or USB3.0 ). 2.All Digital PLL Circuit Design.

1. 從事以下其中一種電路的設計/模擬/除錯工作: a. Touch Sensor, ADC circuit design. b. Charge Pump include flying cap & capless circuit design. c. Memory circuit design. d. High Speed Interface, PLL circuit design. e. Band Gap, LDO circuit design. f. Source & Gate Driver circuit design. 2. 熟悉類比子電路專業知識如OP-AMP的設計。 3. 熟悉工作站與EDA軟體的使⽤。 4. 個性主動積極、樂觀、熱誠。

1. 面板及手機應用的電源管理, 背光驅動晶片開發 2. 需求條件: 2-1. 可獨立完成Buck, Boost, Buck-Boost 等DC/DC電路設計 2-2. 可獨立完成Charge Pump, LDO, OP等類比電路設計 2-3. 熟悉Battery Charger, Battery Protector尤佳 2-4. 熟悉ADC(Sigma-Delta, SAR), PLL尤佳 【共創A+聯詠】 穩健踏實、專家精神、創造優勢 驅動科技、開發創新、引領未來 邀請優秀人才，共創A+聯詠

參與全球顯示技術領域領先企業的驅動IC產品開發專案，負責佈局設計與驗證工作，並與電路設計團隊密切協作，提升產品品質與開發效率。此職務涵蓋先進製程節點、高階模擬設計與整合驗證流程，適合希望在 IC Layout 領域持續精進並拓展技術視野的工程人才。 【工作內容】 • 使用 Virtuoso 或 Laker 進行 Analog / Mixed-Signal 電路之版圖設計 • 使用 Calibre 進行 DRC / LVS 驗證 • 負責 0.18um ~ 0.11um CMOS 製程之版圖規劃與實作 • 與電路設計工程師密切合作，確保版圖設計符合電性與製程需求 【職務條件】 • 具備 2~3 年以上 IC Layout 設計經驗 • 熟悉 IC 版圖設計工具：Virtuoso 或 Laker • 熟悉版圖驗證工具：Calibre（DRC / LVS） • 具備 Analog Layout 經驗者尤佳 • 有 IP 整合經驗者佳

*大學月薪33800元 / 碩士月薪38600元 1.申請與執行研究計畫。 2.負責報帳、經費申請、物品建檔等行政工作。 3.操作並維護計劃或實驗相關的設備與儀器。 4.協助資料收集和資料分析。 5.編輯、撰寫計畫報告書。

IC驗證及協助客戶設計導入 具有下列任一經驗或認證者優先錄用 1. 熟悉FPGA / 8051 / 嵌入式系統 2. 熟悉LCD / AMOLED驅動原理 3. 觸控 / 指紋辨識，相關工作經驗

Job description Join our innovative team specializing in cutting-edge embedded memory solutions. We are seeking Analog Circuit Engineers to play a key role in the design and development of high-performance embedded DRAM and associated peripheral circuits. In this position, you will be responsible for the complete cycle of DRAM circuit design and simulation verification. Your tasks will involve developing novel circuit topologies, transistor-level design, optimizing performance metrics, and ensuring robust functionality through extensive simulations using industry-standard EDA tools. Required qualifications include a strong technical background in Electrical Engineering, Electronics Engineering, Computer Engineering, Physics, or a closely related field. Candidates must possess demonstrated, significant experience in DRAM circuit design and comprehensive simulation verification methodologies. Ideally, candidates will have proven design experience in specific DRAM-related circuit blocks, including but not limited to: Row and Column Decoder circuits Control path logic DC-DC converters, Charge Pumps, and Bandgap References Delay Locked Loops (DLLs) and Phase Locked Loops (PLLs) Negative voltage generators (NVG) and other critical peripheral circuits This is an excellent opportunity to contribute to state-of-the-art embedded memory designs in a dynamic, collaborative environment. If you are a skilled analog designer passionate about solving complex challenges in DRAM circuitry, we encourage you to apply and help shape the future of embedded memory technology.

1. 具有數位電路設計以及RTL coding基礎者 2. 熟悉EDA tool

1.Design the test tooling for the function test or In-circuit test. 2.Develop and implement automated test scripts using scripting language, such as C/C++/Python/shell/batch. 3.Evaluate the product designs and build the manufacturing test processes, fixtures. 4.Improve test processes and enhance efficiency, consistency, cost avoidance. 5.Deploy new device test capabilities and provide training at manufacturing sites. 6.Develop manufacturing test equipment specifications; lead equipment build and validation 7.Research and develop test solutions to enable new technology on new product introductions. 8.Collaborate with Electrical Engineering during product bring-up to create and develop test plans and automated test sequences or scripts for testing products at Printed Circuit Board Assembly (PCBA) level 9.Provide hardware debug mentorship to Test engineers and Product engineers.

1. 觸控IC、TDDI或指紋辨識 IC 開發經驗 2. ADC或sensor IP 開發經驗 3. TFT-LCD或OLED Display driver IC 開發經驗 4. Charge pump、LDO、Source driver、Gate driver、High speed interface、OSC、BGR 相關開發經驗 5. 工作地點：【台南、新竹、台北】 以上其中任何一項相關者佳。

Digital IC design engineer - Familiar with Verilog RTL coding - Familiar with digital design flow (pre-layout simulation, timing constraint, synthesis, post-layout simulation) - Will be working on high speed Serdes IPs - Experience or interest in all-digital PLLs or clock-data recovery circuits is a big plus

Job Description: As a team member of analog product business group, this role will support Analog IC circuit design of mixed-signal ICs, such as sensors, motor drivers, data converters. Key Responsibilities: 1. Co-work with talented design teams to develop high performance sensor related integrated circuits and products, such as Hall effect sensor, temperature sensor. 2. Contribute to chip architecture and circuit design decisions 3. Collaborate with validation, product engineering and test engineering teams to enable successful transfer to production 4. Also, will be responsible for circuit requirements definition, design, simulation and analysis, layout/test support, documentation and customer support for sensor applications. Qualifications: 1. Demonstrate strong analytical and problem-solving skills 2. Strong time management skills that enable on-time project delivery 3. In depth working experience with Cadence composer and Virtuoso, Spectre, HSpice and mixed-signal design flow. 4. Experience in lab measurement and equipment. 5. Self-starter. Passionate about creative work. Good communication skills and team player. Able to take the initiative and drive for results.

1. Main responsibility is to design analog IPs in MCU such as adc/dac, pll, osc, por, ldo 2. 具備DC-DC Converter, Buck相關電路設計 2. Responsible for analog IP design, verification plan, test plan, document 3. Communicate with system, layout and digital engineer to ensure high quality --------------------------------------------------------------------------------------- 雅特力科技創立於2016年，為智原科技子公司。 【Artery雅特力】即將在台上市的IC設計公司，主要產品為32bit ARM core base MCU 公司網址：https://www.arterychip.com 關於雅特力：https://www.104.com.tw/company/1a2x6blojm

1. SAR ADC / Current steering DAC/ SDM ADC/ DAC related 2. Analog Baseband related 3. 據有類比整合相關經驗佳

負責類比電路創新及設計。 專長: 1.專精DC/DC converter 相關電路設計。 2.熟知 DC/DC系統架構，並可使用simplis驗證者佳。

1. 熟單晶片內部架構、韌體撰寫、應用電路 2. 車用系統開發(帶CAN 與 LIN系統) 3. 硬體線路設計與LAYOUT

1.類比訊號分析及電路設計。 2.小信號低雜訊放大線路的設計、模擬、量測及驗證。 3.熟悉OPAMP, Filter, ADC/DAC,… 規格, 性能特性及應用。 4.電子電路硬體的設計、驗證，失效分析和故障排除 5.萬潤熱烈招募有意投入設備產業的菁英，如未具備本項職缺所需相關技能與工作資歷者 亦歡迎投遞，薪資另議。 6.上班地點 新竹：新竹市工業東四路24-2號2樓 /新竹縣竹北市保泰三路 78 號 台中：台中市西屯區工業區37路18號 高雄：高雄市路竹區路科十路1號

我們是全球知名的AI伺服器電源領域的專家，在雲端運算電源憑藉著先進的電源管理實力，並以Green Data Centers為成長引擎，立基全球。 現在，我們正在尋找一位硬體研發工程師，加入我們的精英團隊。你將會從事下列工作： 【工作職責】 1. AI Server/Cloud Service等相關電源產品，電路升級及技術創新之前期研究開發。 2.新型電路架構之電路設計、模擬、實作及測試驗證。 3. 磁性元件設計、模擬及實作驗證。 4. 申請安規之測試驗證及文件準備。 5. 導入量產之軟硬體規劃，文件準備及工廠生產事宜之協調及問題排除。 【職務要求】 1.熟悉使用PSIM, Simplis, Mathcad, ORCAD, PROTEL, PADS, MS office 等software。(擇二) 2.俱有電源產品設計5年以上工作經驗，熟悉磁性元件設計，並實際執行產品開發、測試驗證及導入量產之工作。 3.熟悉各種電源轉換拓撲架構和控制技術， 尤俱有高頻小型化、高功率密度之產品開發經驗更佳。 4. 樂於創新研究，開發新技術，俱獨立思考、勇於承擔責任，及團隊合作溝通協調能力。 【我們提供】 •充足的升遷、學習及成長機會，和光寶一同成長。 •具有競爭力的薪酬、獎金及福利待遇。 •充滿活力的工作環境、開放的企業文化和豐富的員工活動。 加入光寶，你將會和世界頂尖的技術人才一起合作，踏實穩健地發揮自己的技能，對業務有實際的貢獻，並展開一段讓人興奮不已的事業之旅。如果你對電源硬體工程師職缺感到興趣，相信自己符合我們的要求，請馬上投遞簡歷，我們期待你的加入！

1. 進行電子產品硬體系統之研發與設計。 2. 規劃、執行產品控制單元設計，並控制設計進度。 3. 負責產品量產導入工廠計劃。 4. 負責產品技術轉移，並導入量產。 5. 提供其他部門相關技術支援。