1.Support Design Engineer on Signal Integrity testing and Debugging on Chip and Demo Board
2.Support Customer projects design-in stage to mass-production.
3.Support Customer projects design review (Schematics, layout, CTS report)
4.Team work with RD, AE and QA on debugging and problems solve.
1.Develop validation plans, execute system-level qualification tasks, and conduct stress tests to evaluate product reliability.
2.Support compatibility testing for PD, HUB, and related products.
3.Analyze root causes and provide relevant debugging information to assist R&D in resolving issues.
4.Summarize qualification results and compile the final QA report.
5.Support the marketing and FAE team in analyzing field failures and provide feasible solutions based on findings.
Skill
• Familiar with Jenkins setup and configuration for automated image builds
• Proficient in Python & Shell scripting to integrate testing cases and set up environments.
• Skilled with Git commands for environment setup and debugging.
• Linux experience preferred (e.g., Ubuntu OS, kernel driver installation/debugging.
• Knowledge of camera imaging fields (e.g., V4L2 or multimedia subsystems) is a plus.
Nice to have
• Jenkins experience: installing and setting up Jenkins.
• CI/CD experience: setting up automated build systems to maintain image quality
• Automation support: supporting and maintaining the automated validation system.
• Camera-related software development: Working on drivers, tools, and/or scripts.
Job Description
This role is responsible for applying Program Managing methodology in delivering the deliverables for a pan HP application that serves as a data repository that stores the mandatory data for HP Products such as and offers the functionalities that are required to accommodate the business process for various BUs as well as our HP partners. The role engages with the application users and works with the development team to plan, define, execute and deliver quality products to ensure customer satisfaction as well as business accommodations. This is a “hands-on” position requiring solid technical skills, as well as excellent interpersonal and communication skills and is capable of working independently and collaboratively.
Responsibilities
-Interact with users to understand their requests and pain points.
-Manage Product Backlog.
-Submit PBIs\Bugs on TFS with all the necessary details for the development team to comprehend.
-Host Issue Review Meeting to review any outstanding issue\ticket and drive issue resolution.
-Bridge the gap between user expectation and development feasibility.
-Interact with customers and the development team to gather and define requirements.
-Analyze and studies customer requirements to determine the most effective software and web technologies to satisfy their needs.
Skills and Qualifications
The candidate should meet the developers qualifications.
-5 years of project management experience for a massive scale legacy Product.
-Bachelor’s degree or higher in Computer Science, Computer Engineering, -Mathematics, Information Management or other related major.
-Ability to plan, execute and deliver quality products in a timely manner.
-Excellent project management skills.
-Passion for building great user experiences and a proven skill to work closely with engineering team.
-Great problem solving, strategic thinking and technical skills.
-Deep customer empathy and ability to identify customer needs.
-Excellent communication skills in interpersonal and cross group.
-Technical experiences with software engineering and Microsoft development technology.
Nice to have but not mandatory Skills and Qualifications
-Familiarity with .NET or SQL.
-Knowledge of Product Development Lifecycle.
-Experience in System Administration and Data Maintenance.
-Experience in Web Development.
-Experience with Azure DevOps.
-Experience in Cloud Application Development.
The Staff Engineer, FW will be based in Taiwan Taipei Wugu Site. The Staff Engineer, FW performs the responsibility for software design in Tier 1 customer's PSU/BBU/ESS Projects request.
Here is a glimpse of what you'll do
1. The Firmware engineer will work with Battery Management System (BMS) software and hardware circuits, Switching Power supplies (SMPS) software and hardware circuits.
2. Candidate will define and develop BMS requirements for software and control algorithms, development, release and execution of test plans and builds.
3. Team player, work cross functionally with different teams to verify software meets system needs and requirements.
4. Track and troubleshoot issues and test systems on benches, actual systems and on ATE systems.
Here is some of what you’ll need:
1. Minimum 5 years of engineering experience in software development for battery systems (BBU, UPS), SMPS, Pure-Sine Inverters and related industries.
2. Experience with BMS/SMPS software creation, debugging and control algorithms.
3. Experience with software development tools, debugging tools, test tools creation and diagnostics tools. (e.g., scripts, i2c analyzer, python, etc.)
4. Experience with software change and update cycle management.
5. Experience with electrical circuits used in BMS hardware and in SMPS (Switch-mode power supplies) hardware.
6. Excellent communication skills. (verbal and written)
7. Problem solving and organizational skills.
8. Can work beyond normal working hours and work on overseas trips for build support.
The information we collect:
We may collect personal information that you choose to submit to us through the Website or otherwise provide to us. This may include your contact details; information provided in online questionnaires, feedback forms, or applications for employment; and information you provide such as CV/Resume. We will use your information for legitimate business purposes such as responding to comments or queries or answering questions; progressing applications for employment; allowing you to choose to share web content with others or; where you represent one of our customers or suppliers, administering the business relationship with that customer or supplier.
1. System integration on HIMAX chip for NB customer(USB camera)
2. Focus on UVC(USB video class) related function
3. support Windows Hello certicifation
4. Technical support for NB customer design In
【About Us】
VICI Holdings' Hardware team is seeking a Senior Digital Design Engineer to join our dynamic group. In this role, you will be pivotal in advancing our trading systems, contributing to the development and enhancement of cutting-edge technologies. We boast the leading digital hardware development team in Taiwan and possess FPGA design technology in parallel with wall street trading firms. This expertise enables us to build ultra-low-latency, fully automated trading systems. Our trading strategies cover stocks, futures, and derivatives, achieving a daily global trading volume in the hundreds of millions dollars.
【Roles/ Responsibilities】
• Micro-architecture, design and implement high-performance digital circuits optimized for low-latency application
• Develop high speed data paths, ensuring minimal logic depth and efficient pipeline
• Optimize critical paths and combinational logic to reduce propagation delays and improve throughput
• Work with Verilog/ SystemVerilog to implement RTL design
• Apply parallelism and resource sharing techniques to enhance performance and throughput
• Develop latency-aware micro-architectures for real-time processing and networking applications
• Debug, optimize and iterate on designs using FPGA platform and cycle-accurate simulation
• Work closely with digital/system verification engineers to ensure functional correctness and performance validation
• Take ownership of FPGA verification tasks to ensure design correctness and performance.
• Develop and execute verification plans for high-speed IPs such as PCIe, Ethernet, and Switches.
• Support system validation engineer to debug FPGA issue
Design Collaboration:
• Collaborate closely with Algorithm, software, design validation and application team to define micro-architecture
Performance Analysis:
• Conduct performance testing and analysis, ensuring the low-latency goals are met across various use cases.
• Capability to solve routing timing issue and analysis FPGA timing report result.
【Candidate Requirements】
• Master’s degree or above in EE, CE, or CS, plus 3–8 years of high-speed digital-design experience
• Hands-on experience in IP-level digital-circuit design or IP integration (preferred)
• Proficient in debugging and optimization with VCS and Verdi simulation tools
• Comfortable working in Linux/Unix environments
• Strong analytical and problem-solving skills with a performance-driven mindset
【Other Requirements】
• Proven ability to solve complex design challenges and deliver robust solutions
• Experience designing ultra-low-latency data paths—arithmetic units, multiplexers, FIFOs, registers—for high-performance applications (preferred)
• Familiarity with FPGA verification tools such as Quartus or Vivado (a plus)
• Knowledge of high-bandwidth memory interfaces (DDR, HBM, etc.)
• Understanding of networking protocols (Ethernet, PCIe, etc.)
【Interview Process】
• Resume Screening → HR Phone Screen → Face-to-Face Interview (with 30-60mins on-site coding test)
韌體團隊開發範疇:
1. 研究電池特性(例如:鋰電池),開發新的電池電瓶分析演算法。
2. 完成電池測試儀器、電池充電器功能開發。
專案執行過程的常態性工作:
1. 使用MCU開發工具及程式語言,主要是C語言。
2. 進行單元功能程式整合。
3. 單元功能程式撰寫及驗證。
4. 撰寫工程規格 / 技術文件 (包含測試計畫)。
5. 韌體版本管控 (Git)。
Our FW team is responsible for:
1. Developing the functionalities of battery diagnosis/charging products.
2. Investigating new diagnosis algorithm for batteries is part of our job.
Regular duties in project execution:
1. Use MCU development tools and programming languages, primarily C language.
2. Perform unit function program integration.
3. Write and verify unit function programs.
4. Write engineering specifications / technical documentation (including test plans).
5. Firmware version control (Git).
職務介紹:
ESG Server Software Team是一個充滿活力並且在軟體領域中不斷創新進取的團隊。我們致力於開發高易用性、高可靠性的BMC韌體及其軟體生態系統。自2008年開始自主研發 BMC 韌體以來,我們憑藉領先業界的韌體架構和體系化的周邊硬體設計,BMC 已成為 ESG 伺服器產品的主要賣點之一。
認識我們: https://campaign.advantech.online/en/Cloud-IoT/software/
主要工作內容:
1.Develop and maintain Server BMC firmware during the HW product lifecycle.
2.Hands-on alpha, beta, and production BMC firmware during the product NPI (New Product Introduction) phase.
3.Coordinate with functional engineering teams to identify root causes and verify solutions for issues.
4.Document technical specifications and functional user manuals.
5.Collaborate as a team player, grow with the team, and contribute to its success.
人才需具備:
Preferred qualifications
1.Bachelor's degree or higher, with 3 years of embedded system development experience.
2.Familiar with embedded Linux development and C programming language.
3.Familiar with x86 servers and networking.
4.Willingness to speak English with confidence.
Nice to have:
1.Familiar with agile concepts of CI/CD.
2.Ability to integrate AI technology into development.
Considered a plus:
1.Experience with IPMI, Redfish, and BMC technologies
2.OpenBMC and/or OCP project development experience