「Senior PCB SI/PI Engineer」的相似工作

THE ROLE The Lead Signal Integrity Engineer is a technical leader responsible for advancing Isola’s laminate materials to meet and exceed high-speed electrical and signal integrity (SI) performance requirements. This role provides mentorship and direction to the Signal Integrity team in Taiwan, drives innovation in SI test methodologies, and ensures strong technical engagement with global OEMs. The Lead serves as a recognized authority in SI, bridging customer needs with material performance and representing Isola in the high-performance electronics community. KEY RESPONSIBILITIES: Customer-Facing Technical Support: • Lead technical engagement with OEMs and direct customers on high-speed laminate characterization. • Act as primary technical contact for SI-related design validation and adoption cycles. • Oversee the creation of technical reports, white papers, and collateral for internal and external use. Strategic & Technical Leadership: • Define and develop advanced SI measurement, modeling, and simulation methodologies. • Collaborate with Product Management, R&D, and Sales to ensure alignment of SI capabilities with product strategy. • Represent Isola as a thought leader through publications, conferences, and industry forums. Organizational Management: • Mentor, guide, and grow the Taiwan-based Signal Integrity Engineering team. • Establish scalable, cost-effective SI test methods that accelerate R&D and customer response. • Drive alignment with global Application Engineering teams to ensure best-in-class technical service. Technology & Standards Thought Leadership: • Maintain expertise in SI methods, PCB processing effects, and high-speed digital design requirements. • Contribute to industry standards development and support customer forums on SI requirements. QUALIFICATIONS & EXPERIENCE • 8+ years of experience in signal integrity engineering, PCB laminates, or high-speed design. • Expertise in VNA measurements, probing techniques, and advanced SI methodologies. • Experience with PCB manufacturing and processing effects on SI performance. • Demonstrated leadership and mentoring experience. • Proven record of technical publications, white papers, or conference presentations. EDUCATION • PhD or Master’s in Electrical Engineering or related field required. OTHER CONSIDERATIONS • Fluent in English – required for global communication and technical documentation. • Proficiency in Mandarin Chinese – strongly preferred for engagement with Taiwan/China teams and customers. • Ability to travel regionally and globally as needed.

POSITION SUMMARY: Primary Job Description • Responsible for the hardware design and development of custom DRAM DIMM for leading-edge, high-performance server and embedded applications. • Opportunity to work closely with SMART global engineering, manufacturing, and test groups. • Requires analytical problem-solving skills and the ability to work independently on multiple projects. PRINCIPLE DUTIES AND RESPONSIBILITIES: Familiarity with all phases of hardware product development which includes but not limited to: • Schematic capture using OrCAD CIS and experience working with a centralized part library and design process. • Managing design projects from feasibility study to project kick-off, PCB board design, collaboration with layout and simulation teams, debugging and testing engineering samples, setup test paltforms/environment, performing qualification tests, and working with the NPI team for release to production. • Collaborating with global Layout Engineers to determine placement, topologies, and design constraints. • Working with SI/PI Simulation Engineers to determine best practices to maximize design margins and implement them into PCB layout design rules. • Understanding technical specifications from component vendors and JEDEC standards. • Using high-speed oscilloscopes and protocol/logical analyzers to assist with bring-up, debugging, and RMA processes.

☆歡迎計畫年後轉職人才，提前面試卡位!! 工作內容 1. 負責Ansys SIwave/HFSS/Q3D 等高頻軟體技術支援，包含售前/售後支援、教育訓練 2. 拜訪客戶介紹、推廣軟體以及解決方案 3. 與原廠技術團隊對接，協助溝通/解決客戶問題、學習軟體新功能 4. 高頻相關工程專案規劃與執行 5. 支援公司市場行銷活動 ---------------------------------------------------- 本公司具備Ansys產品專業技術人員，擁有廣大的技術資源供學習， 市場遍及台灣、中國及東協等地。 我們不斷地開拓新技術及市場，誠摯希望有志一同的你加入~ 歡迎光學、電磁學、電子電路、電磁干擾、光波導、矽光子各領域專家加入我們的團隊!! 思渤科技培養的不只只針對工作需求的專業工程技術人才， 更是培養技術人才自身技術品牌的職涯延伸， 讓你不單只是單一技術在此發展， 而是廣闊長遠的打造出個人技術品牌知名度， 讓你在專業領域中與更多佼佼者一起發光發亮!! ｜遠距辦公。節省通勤成本。溝通不斷線｜ ☆業務試用期三個月通過後，即可申請遠距辦公方式！ ☆每週只需進公司辦公一天，剩下四天靈活運用外勤出差或在家辦公，節省塞車通勤時間，線上溝通快速不斷線。 ｜舒適好開公務車。公務拜訪便利又安全｜ ☆提供三年內新車預約公務拜訪使用，安全又舒適。 ☆不需自己養車，找車位，公司定期保養管理，外勤無負擔。 ｜薪獎優渥。輕鬆get百萬年薪！｜ ☆業績獎金 ☆盈餘獎金 ☆年終獎金 ☆中秋、端午獎金 ☆配發公務機 ☆結婚禮金/生育津貼 ☆推薦人才獎金 ☆近3年平均調薪幅度3~5%

1、 負責Ansys高頻電磁場模擬分析軟體之售前拜訪、資料蒐集 2、 技術支援以及技術文件製作;訓練教材製作以及教育訓練。 3、 軟體安裝、簡報製作 4、 Ansys高頻電磁場(SI/PI)模擬分析軟體產品功能研究 5、 高頻相關工程顧問服務專案執行與規劃 6、 高頻相關產業趨勢研究。

PCIE/ Ethernet for AI Server High Speed EE for SI/HW/PCB design 1. 被動式(DAC)/主動式(ACC, AEC)及其他高速產品(USB, HDMI等)Paddle Card 、測試板等產品相關PCB之電子電路& PCBA設計, 並進行設計方案之電氣及 SI/PI驗證。 2. 高速系統模組之訊號匹配, 衰減, 頻率響應等各式高頻參數特性的設計。 3. 串接相關單位完成產線自製測試設備 PCB 設計及驗證。 4. 配合客戶進行高速高頻配件產品與線纜產品設計, 實現對應 PCBA電路設計並完成產品測試/驗證。

1. 訊號完整性模擬(PreSim and PostSim) 2. 電源完整性模擬(DC Drop/AC impedance/DeCap Optimization) 3. 針對PCB Layout提出建議。 4. 模擬與量測結果分析驗證。

工作需求 (Job Requirements) 1.電子相關科系大學或碩士以上 2.2-5年的SI(訊號完整性)設計相關工作經驗 3.熟悉相關SI模擬軟體工具相關經驗 4.需與亞洲不同地區的辦公室協助合作 5.能獨立完成公司交辦的工作 工作職責 (Job Responsibilities) 1.負責3D高頻模擬軟體之售前拜訪、技術支持、產品培訓及專業規劃與執行。 2.熟悉PCB、SI信號完整性等相關模擬經驗 3.負責3D軟體的應用及技術支持給現有與新的潛力客戶 4.負責準時完成主管分配的工作

Purpose of this Position 深入研究高速訊號，在高速硬體電路Signal Integrity上提供最佳設計且確保生產品質 Major Areas of Responsibility 專案研發 - Perform high speed signal integrity simulation including 10G/40G、25G/100G、PCIE、SATA、DP、USB、DDR3/DDR4/DDR5. - Perform pre-layout, layout constraint, and post-layout simulation processes. - PCB stackup design and layout review for high speed signal and PDN. - Build component models to ensure the correlation between SI/PI simulation and measurement. - Solid SI experience in resolving technical issues and performing detailed analysis. 團隊合作 - Collaborating with EE teams to refine high-speed signal performance. - Collaborate with the layout engineer to provide clear layout guidelines and enhance footprint optimization.

Summary: Part of design automation team to enable and verify Printed Circuit Board (PCB) hardware and layout designs. Essential Duties and Responsibilities: • Execute Power Integrity (PI) tools and provide inputs to design and lab teams • Execute Signal Integrity (SI) tools and provide inputs to design and lab teams • Develop scripts to provide solutions in design and PCB manufacturing issues • Define and develop design methodologies to improve design quality and productivity • Engage with Computer Aided Design (CAD) tool vendors for tool evaluation and support • Engage with PCB and CM vendors to understand and evaluate PCB materials and stackups

We are seeking a highly experienced and detail-oriented Senior Hardware Board Development Engineer with 10–15 years of hands-on experience in hardware system design. This role focuses on the development of evaluation boards (EVBs) and customer reference boards (CRB) for advanced SoC/ASIC platforms, including board-level architecture, high-speed signal design, and system bring-up. You will work closely with SoC/ASIC design teams, firmware engineers, and validation teams to deliver robust reference platforms for internal and customer use. The ideal candidate has deep expertise in DDR4/DDR5, PCIe Gen4/5/6, high-speed SerDes, and power delivery networks, along with strong debugging and lab skills. Responsibilities * Lead the design and development of SoC/ASIC evaluation boards, including schematic capture, PCB layout review, and component selection. * Perform board bring-up, signal integrity validation, and system-level debugging. * Collaborate with cross-functional teams to support SoC/ASIC validation and customer reference designs. * Conduct SI/PI simulations and optimize high-speed interfaces (DDR, PCIe, Ethernet). * Generate technical documentation including schematics, BOMs, test procedures, and design guides. * Interface with vendors and manufacturing teams for prototype builds and production support.

【產品範疇】 1.DDI / TP / TDDI/ TCON/ Power等顯示相關產品 【工作內容】 1. SI/PI/EM issue solving, performance optimization, and design rule development 2. Chip/PKG/Board simulation and measurement for SI/PI/EM issue. 3. Co-work with system engineers, IC designers, and customers on product design-in tasks.

1.SI/PI量測與模分析 2.網路分析儀與探針平台操作 3.量測與模擬數彙整 4.機台操作：網路分析儀 5.專業知識需求：電磁學、微波工程、SI/PI理論分析

1. Performing DC IR drop and AC impedance simulation. 2. Improve simulation/validation efficiency and performance by automation. 3. Execute SI/PI/RF/EMI verification for the system requirements. 4. Build up SI/PI simulation and measurement correlation database. 5. Build up design and test capability including design guidance and lab setup. 6. Working with HW teams to optimize high-speed signal.

Summary : you will create and refine PCB Layout designs for a variety of products and work closely with engineers and customers to finalize our product specifications. To be successful in this position you should have hands-on experience using CAD software and be detail-oriented and a team player. Responsibilities : •Complete development of CAD layout from footprint definition, detailed component placement and constraints management. •Set up constraints for each PCB layout. •Be responsible for the design releases required generation of artwork files, ODB++, FAB drawings, ICT report, and electronic PCB documentation. •Delivery Gerber file to PCB fabrication and assembly house and plan the lead time. •To resolve DFM / DFM issues. Qualification : •10+ years in PCB layout design and direct working experience using Cadence OrCAD schematics Capture and Allegro software. •Familiar with PCB design SW tools (Allegro, DraftSight, CAM350…), Altium is plus. Detailed understanding of multilayer PCB construction. •Experience with advanced PCB manufacturing techniques such as blind vias and microvias. •Power Electronics/Power management experience is desired. •Familiar with PCB fabrication and assembly process are desirable. •Bachelor/Master in EE, computer science, or relative majors, or equivalent experience. •Possess basic English communication skills.

1.負責管理弱電工程標案案 2.了解弱電、監控、門禁等系統架構 3.具溝通協調能力 4.具案件送審(比較表，施工計畫）經驗 5.工程發包採購案場管理 6.工程專案管理及經銷管理 7.具專案管理證照PMP 尤佳

1. 針對高速介面進行信號完整性模擬。 SI simulation : TDR, S parameter,Eye diagram,Crosstalk.. 2. 電路板電源完整性模擬。 PI simulation : IR Drop , PDN.. 3. 對於佈局圖給予改良建議。 Polar應用及評估PCB & VNA材料選擇方式 4. 信號完整性異常除錯。

About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to the next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you’ll heighten your potential and broaden your horizons, all while shaping the future of connectivity. Responsibilities - Perform electrical validation of high-speed interfaces such as PCIe Gen3~Gen5, Ethernet (802.3 10G/25G/100G/400G), DDR4/5, SATA, and USB3 - Perform electrical validation of low-speed interface, including I2C, SPI, MDIO, eMMC, and RGMII. - Perform chip-to-chip SerDes signal validation, including SGMII+, UXSGMII interfaces. - Plan and execute power testing strategies for multiphase power stages and DC buck converters. - Perform power integrity validations, including ripple noise analysis, power sequencing verification, electronic load (E-load) operation, and power supply unit (PSU) evaluation. - Develop and execute test scripts under Linux environments, familiar with shell commands and automation scripting. - Collaborate with the HW team and chip vendor to define and document SI/PI validation plans and requirements. - Analyze and identify SI/PI issues, and work closely with HW, FW, layout teams, and chip vendors to develop improvement solutions that enhance electrical performance and signal integrity quality. Requirement - Solid experience with SI test equipment (oscilloscope, BERT, VNA, TDR). - 3+ years of hands-on experience in Signal Integrity, and SerDes/PCIe/USB/DDR validation. - Solid understanding of compliance testing methodologies, eye diagram, and litter analysis. - Strong understanding of low-speed interface protocols and comprehensive experience in AC/DC characteristic validation. - Bachelor’s/Master’s degree in Electrical Engineering, Electronics, or related fields. - Excellent problem-solving skills, ability to debug SI/PI issues, and strong cross-functional communication with HW design and layout teams. Preferred Qualifications - Experience working on system-level signal validation in server, networking, or storage platforms with high-speed interfaces. - Familiarity with Power Integrity validation, including power sequence, ripple noise, OCP, and SCP testing. Benefits - International work environment and collaboration with global development teams - Excellent work conditions - Competitive package: great pay, perks, and benefits - Group insurance and health coverage - Flexible working hours and patterns - Complimentary drinks and snacks at the office

a. SI訊號/PI電源完整性模擬分析 (Pre-Layout & Post-Layout) b. PCB/Layout設計建議與Guideline制定 c. SI/PI/EMI新技術專研與導入

[ Job Summary ] We are seeking a skilled Hardware Engineer to lead the design, development, and validation of AIoT embedded hardware systems. The ideal candidate will possess strong circuit design capabilities and hands-on experience with validating and debugging, including the ability to critically analyze vendor-supplied electronic schematics to identify potential improvements in performance, power efficiency, and signal interference mitigation. [ Key Responsibilities ] Hardware Development: • Design and develop AIoT embedded hardware system, including MCU integration, power management, and communication interfaces • Create schematic diagrams and collaborate with suppliers’ engineers for PCB design and circuitry review • Conduct hardware validation and debugging using oscilloscopes, logic analyzers, spectrum analyzers, and other lab equipment • Prepare technical documentation, including design specifications, test reports, and production guidelines Collaboration & Leadership: • Provide technical leadership in hardware design and collaborate closely with ODM suppliers’ engineering teams to optimize circuit architecture. • Collaborate cross-functionally with firmware, mechanical, validation, and manufacturing teams to ensure seamless product development • Conduct circuit reviews, testing, and validation to ensure high-quality and high-performance, low-power solutions. • Audit, manage, plan, and review the electric design the ODM supplier does from professionalism and process. Required Qualifications: • Bachelor's or Master's degree in Electrical Engineering, or a related field. • 3+ years of experience in hardware development for IoT products. • Solid understanding of analog and digital circuit design principles • Well known in schematic capture tools and familiarity with PCB layout workflows • Hands-on experience with hardware debugging and lab instrumentation • Meticulous ability to uncover latent hardware issues, such as identifying potential leakage currents, malfunction circuit or anything may impact performance. • Strong analytical and problem-solving skills Preferred Qualifications: Bonus points • Experience with RF systems (e.g., Sub-GHz, LoRa) • Experience with antenna design, impedance matching, and field pattern analysis • Familiarity with STM32, NXP, or TI MCU platforms • Knowledge of regulatory standards such as FCC, CE

1.PCB stack-up design & Constraint Rule setting. 2.Provide SI/PI design suggestions for PCB layout. 3.Signal integrity analysis of high-speed and low-speed signal interfaces. 4.Power integrity design includes DC impedance, AC resonance and capacitance optimization. 5.In addition to Cadence 2.5D EM solution as a daily necessary software, AMD SeaSim/S2Eye, Intel ICAT/IMLC/CCT are also required. 6.Use TCL and Python to shorten the complicated software operation process, generate reports and perform DOE analysis. 7.Familiar with PCB test coupon TDR/TDT measurement and Delta L 4.0 Measurement.