「類比IC設計工程師(觸控整合)」的相似工作

1. NVM電路開發設計。 2. NVM週邊類比電路開發設計與佈局優化。 3. NVM電路整合開發設計。 4. 協助NVM測試晶片偵錯、驗證。 5. 協助客戶嵌入使用以及導入量產NVM IP產品。 研究所以上電子/電機相關系所畢，專長於類比電路設計、固態電子或功率半導體元件設計，有下線經驗者優先考慮。

Hands-on experience in the design and development of at least one of the following analog circuits: ADC, DAC, PGA, high-speed analog driver, PLL, or SerDes.

1. Main responsibility is to design analog IPs in MCU such as adc/dac, pll, osc, por, ldo 2. Responsible for analog IP design, verification plan, test plan, document 3. Communicate with system, layout and digital engineer to ensure high quality --------------------------------------------------------------------------------------- 雅特力科技創立於2016年，為智原科技子公司。 【Artery雅特力】即將在台上市的IC設計公司，主要產品為32bit ARM core base MCU 公司網址：https://www.arterychip.com 關於雅特力：https://www.104.com.tw/company/1a2x6blojm

1. PLL的架構設計,參數模型以及電路開發 2. PLL的量測與偵錯

Job description Join our innovative team specializing in cutting-edge embedded memory solutions. We are seeking Analog Circuit Engineers to play a key role in the design and development of high-performance embedded DRAM and associated peripheral circuits. In this position, you will be responsible for the complete cycle of DRAM circuit design and simulation verification. Your tasks will involve developing novel circuit topologies, transistor-level design, optimizing performance metrics, and ensuring robust functionality through extensive simulations using industry-standard EDA tools. Required qualifications include a strong technical background in Electrical Engineering, Electronics Engineering, Computer Engineering, Physics, or a closely related field. Candidates must possess demonstrated, significant experience in DRAM circuit design and comprehensive simulation verification methodologies. Ideally, candidates will have proven design experience in specific DRAM-related circuit blocks, including but not limited to: Row and Column Decoder circuits Control path logic DC-DC converters, Charge Pumps, and Bandgap References Delay Locked Loops (DLLs) and Phase Locked Loops (PLLs) Negative voltage generators (NVG) and other critical peripheral circuits This is an excellent opportunity to contribute to state-of-the-art embedded memory designs in a dynamic, collaborative environment. If you are a skilled analog designer passionate about solving complex challenges in DRAM circuitry, we encourage you to apply and help shape the future of embedded memory technology.

1. 觸控IC、TDDI或指紋辨識 IC 開發經驗 2. ADC或sensor IP 開發經驗 3. TFT-LCD或OLED Display driver IC 開發經驗 4. Charge pump、LDO、Source driver、Gate driver、High speed interface、OSC、BGR 相關開發經驗 5. 工作地點：【台南、新竹、台北】 以上其中任何一項相關者佳。

【產品線描述】 TV & Video Solution: 1. LCD TV Controller 2. Frame Rate Converter (FRC) / MEMC 3. TCON 4. LCD Monitor Controller 5. Large Format Display Controller Imaging Solution: 1. Car DVR 2. Consumer & Professional Surveillance Camera 3. Sport DV 4. Drone SoC 【職務說明】 Confirm circuit/system specification and achieve design from schematic, layout, and silicon characterization. - Mixed-signal design of deep-submicron CMOS technologies using EDA like Spectre, Hspice . - Optimize circuit to meet the specifications / power consumption for system performance. - Co-work with layout engineers for IP physical layout and PostSim / IR analysis / EM analysis - Silicon debugging / Mass-production supprt You will be responsible for the design and physical implementation of SERDES building blocks, for example: Analog front end, CTLE, DFE, PLL, DLL, LCVCO, CDR, Data-Dmux, Data-Serialization, Wire-Line Transmitter, FFE, Bandgap, POR, LDO, GPIO, 5V Tolerance IO, XTAL, real time clock(RTC), etc… Candidate will be participating in mixed mode circuit design. Experience in the following design is preferred. LVDS, HDMI, DisplayPort, VByOne, USB, MIPI C/D PHY receiver design. HDMI/V-By-One(VBO)/DisplayPort/Panel P2P Interfaces (USIT/iSP/BOE/EPI/LVDS) High-speed Transmitter design. DDR4/DDR3/DDR2/LPDDR4(X)/LPDDR3 PHY or I/O circuit design. And other High speed SERDES IP. 【必要條件】 - Master of Science / Above degree in Electrical Engineering, strong mixed-signal design concept. - Mixed Signal Circuit Design Experience in deep sub-micron process (22nm / FINFET). - Familiar with design and simulation tools (Cadence's design environment, Circuit simulation : Spectre, HSpice, Finesim, ADiT) - Verilog-A and MATLAB behavioral modeling of analog and digital circuits. - Strong debugging and analytical skills. - Clear communication skills and team work ability are necessary.

1.SRAM, ROM 電路設計 2.記憶體相關 IP 性能、良率提升 3.先進製程SRAM電路設計開發、驗證 擅長工具: HSPICE, Virtuoso 和 Laker等類比IC設計相關工具。 工作技能: 1.基本的CMOS元件與邏輯設計相關知識 2.熟悉類比IC電路設計流程與相關工具 3.具有基本的 Python程式語言能力佳 4.具有基本的 Verilog 能力佳

1、既有Analog IP的維護與改進。 2、具有BandGap、OSC、LDO、ADC相關的設計經驗。 3、具類比IC設計工作經驗。

高性能類比IC產品設計與研發。

專長為RF/類比IC電路(LDO, OP, charge Pump, DC/DC converter,PA/LNA bias design)設計及測試，具有量產經驗為佳。

1.類比/電源管理 IC電路設計. 2.參與LCD PMIC, LED Driver專案. 3.DC-DC, Charger-Pump, LDO, OP, DAC,ADC相關電路設計

【成為円星人】 円星科技由一群專業與充滿熱情的夥伴創立於2011年，為積體電路矽智財設計服務業之新秀，秉持著『成為半導體業最值得信賴之IP公司』的願景，追求永續經營與成長。 誠摯歡迎您成為円星人，加入我們，站上國際舞台！ 一起共同打拚，以精品文化之精神，創造價值，追求卓越！ 【職務簡介】 M31主要業務為向 IC 設計業者和晶圓代工廠授權 IP，此職務為負責高速介面 IP（High Speed Interface IP）, 包含USB. PCIE, MIPI MPHY, CPHY, DPHY等SERDES IP和類比 IP（Analog IP）, 包含ADC, DAC, PLL, PVT sensor的類比IC設計工程師職缺。 【將負責的工作內容】 1. All-digital PLL, all-digital DLL : Clocking related solution 2. Digital assitantance calibration engine using in Serdes system 3. Integrate mixed signal IP and handle co-simulation 【條件與特質】 1. 混訊IC設計工程師相關工作經歷2年以上 2. 電機電子/資訊工程碩士畢業 如果您有以上相關經驗且對此職缺有興趣，歡迎投遞您的履歷！

1. 具有類比IC設計經驗或相關科系/所畢業 2. Familiar with High-Speed Transceiver Designs, CDR/PLL, ADC/DAC, Delta-Sigma Modultors, DC-DC Converters, or Linear Regulators. 3. USB, DP, HDMI, PCIe or SATA experience is a plus.

1. PLL design 2. High speed receiver design (1.5Gbps/4Gbps/5.4Gbps/8.1Gbps/12Gbps) 3. High speed transmitter design (1.5Gbps/4Gbps/5.4Gbps/8.1Gbps/12Gbps) 4. eDP receiver 5. V-by-One receiver 6. MIPI D-PHY 7. HDMI Receiver 8. HDMI Transmitter 9. LCD P2P interface Transmitter 10. LDO and DCDC design 工作地點:新竹/台南

Job desicription: Our Design Team specializes in the challenging field of Non-Volatile Memory (NVM) IC circuit design. We are actively seeking an experienced Analog Circuit Design Engineer to contribute to our cutting-edge developments in embedded NVM solutions and surrounding circuitry. As a key member of our team, you will be responsible for the design, verification, and debugging of essential analog building blocks like Bandgap references, LDOs, and Charge Pumps. A significant part of your role will involve designing critical memory peripheral circuits for NVM IP and test chips, including Array interfaces, Decoding logic, and Sense Amplifiers. Your responsibilities will span the design lifecycle, from contributing to IP specifications and core circuit design to ensuring performance through layout optimization and comprehensive corner simulations of NVM IPs. We are looking for candidates with proven expertise in analog circuit design, ideally with prior experience in embedded memory or NVM technologies. If you are an experienced analog designer eager to tackle complex challenges in non-volatile memory, we encourage you to apply and help shape the future of memory technology.

1. Mixed-mode SDM AD/DA, Audio Codec, and PLL circuit design 2. RF TX/RX FE and ADPLL circuit design 3. Power IC DC-DC Buck/Boost circuit design

1. 依產品的規格與使用環境（如：溫度、環保法規、可攜式要求低功耗），設計積體電路。 2. 評估積體電路、光電半導體技術及厚膜積體電路系統等設計。 3. 規劃積體電路產品及開發新的應用功能。 4. 對於積體電路設計、專案管理及軟硬體設備採購作業，提供技術性建議及相關諮詢。。 5. 進行積體電路的測試與封裝。 熟悉電子學、半導體物理、EDA TOOL(Virtuoso、Hspice) 優先錄取，開發馬達驅動IC、Delta-Sigma ADC及感測IC為主要開發產品，負責工作包含電路模擬設計、Layout。 需要極度細心的個性及自我要求為此職缺必要的人格特質。

※實際任用職稱依個人相關經歷敘薪。 1.大中小屏各類平面顯示器驅動晶片類比ˋ電源相關電路設計. 2.參與各類新產品開發規格定義ˋ區塊規劃ˋ設計模擬和驗證. 3.與邏輯ˋ系統和佈局設計工程師溝通合作,共同研發最具競爭力的產品. 4.工作經驗1年以上，具大尺寸 TFT Driver 相關類比設計經驗, 或是 Display Driver high-speed IO (ex. MIPI, LVDS, ) 設計經驗

【職位描述】 設計RVI公司新創的光通訊引擎(Optical Engine)類比電路設計工程師，負責設計、開發、測試、優化和調試類比電路及系統，產品矽中介層、玻璃中介層與高階基板。負責從概念到生產的電路設計，確保光引擎達到品質和性能標準。 【主要職責】 1.設計和開發創新的類比電路和系統，應用於光引擎和相關技術領域。 2.測試、優化和調試類比電路，確保其性能符合設計規範和功能需求。 3.與跨部門團隊合作，包括系統工程師、軟體工程師、光學工程師及其他專業人員，共同實現產品開發目標。 4.與客戶密切合作，理解其需求並提供技術支持和解決方案。 5.制定和執行測試計畫，分析測試數據，並提出改進建議。 6.保持對最新技術趨勢的了解，並將其應用於產品設計中以提升競爭力。