「類比IC設計工程師 (新竹)(I7)」的相似工作

Digital IC design engineer - Familiar with Verilog RTL coding - Familiar with digital design flow (pre-layout simulation, timing constraint, synthesis, post-layout simulation) - Will be working on high speed Serdes IPs - Experience or interest in all-digital PLLs or clock-data recovery circuits is a big plus

1. PLL design 2. High speed receiver design (1.5Gbps/4Gbps/5.4Gbps/8.1Gbps/12Gbps) 3. High speed transmitter design (1.5Gbps/4Gbps/5.4Gbps/8.1Gbps/12Gbps) 4. eDP receiver 5. V-by-One receiver 6. MIPI D-PHY 7. HDMI Receiver 8. HDMI Transmitter 9. LCD P2P interface Transmitter 10. LDO and DCDC design 工作地點:新竹/台南

1. 觸控IC、TDDI或指紋辨識 IC 開發經驗 2. ADC或sensor IP 開發經驗 3. TFT-LCD或OLED Display driver IC 開發經驗 4. Charge pump、LDO、Source driver、Gate driver、High speed interface、OSC、BGR 相關開發經驗 5. 工作地點：【台南、新竹、台北】 以上其中任何一項相關者佳。

1.SERDES CMOS Circuit Design ( HDMI,DisplayPort, or USB3.0 ). 2.All Digital PLL Circuit Design.

1. SAR ADC / Current steering DAC/ SDM ADC/ DAC related 2. Analog Baseband related 3. 據有類比整合相關經驗佳

【產品線描述】 TV & Video Solution: 1. LCD TV Controller 2. Frame Rate Converter (FRC) / MEMC 3. TCON 4. LCD Monitor Controller 5. Large Format Display Controller Imaging Solution: 1. Car DVR 2. Consumer & Professional Surveillance Camera 3. Sport DV 4. Drone SoC 【職務說明】 Confirm circuit/system specification and achieve design from schematic, layout, and silicon characterization. - Mixed-signal design of deep-submicron CMOS technologies using EDA like Spectre, Hspice . - Optimize circuit to meet the specifications / power consumption for system performance. - Co-work with layout engineers for IP physical layout and PostSim / IR analysis / EM analysis - Silicon debugging / Mass-production supprt You will be responsible for the design and physical implementation of SERDES building blocks, for example: Analog front end, CTLE, DFE, PLL, DLL, LCVCO, CDR, Data-Dmux, Data-Serialization, Wire-Line Transmitter, FFE, Bandgap, POR, LDO, GPIO, 5V Tolerance IO, XTAL, real time clock(RTC), etc… Candidate will be participating in mixed mode circuit design. Experience in the following design is preferred. LVDS, HDMI, DisplayPort, VByOne, USB, MIPI C/D PHY receiver design. HDMI/V-By-One(VBO)/DisplayPort/Panel P2P Interfaces (USIT/iSP/BOE/EPI/LVDS) High-speed Transmitter design. DDR4/DDR3/DDR2/LPDDR4(X)/LPDDR3 PHY or I/O circuit design. And other High speed SERDES IP. 【必要條件】 - Master of Science / Above degree in Electrical Engineering, strong mixed-signal design concept. - Mixed Signal Circuit Design Experience in deep sub-micron process (22nm / FINFET). - Familiar with design and simulation tools (Cadence's design environment, Circuit simulation : Spectre, HSpice, Finesim, ADiT) - Verilog-A and MATLAB behavioral modeling of analog and digital circuits. - Strong debugging and analytical skills. - Clear communication skills and team work ability are necessary.

1.LPDDR4/DDR4/DDR3 Mixed signal SERDES/PLL相關開發工作 2.Mixed signal SERDES RTL behavior analysis and implement,熟悉HSPICE 並具備 std cell design flow基礎佳

【工作職責 (Responsibilities)】： ★ Build & innovate on high-speed analog/mixed-signal circuits such as PCIe/DDR/HDMI... transmitter and receiver in deep sub-micron CMOS technology for integration in SoC products. ★ Work with digital team on specification definition ★ Create behavior model for analog/digital evaluation ★ Compliance test for SerDes IP 【符合條件 (Qualifications)】： ★ Familiar with high speed SerDes specification ★ Familiar with IC/SoC design flow ★ Familiar with analog simulation flow ★ Experience SerDes analog blocks design ★ Must be good team player 【必須條件 (Minimum Qualifications)】： ★ Familiar with Audio analog IP design, such as Preamp/DAC/ADC (including SAR and DSM) 【優秀條件 (Preferred Qualifications)】： ★ Familiar with controller integration ★ Familiar with other baseband analog IP design, such as BGAP/LDO/XTAL/PLL, etc. ★ Familiar with ESD, Latch up, I/O ★ Familiar with layout flow

Job desicription: Our Design Team specializes in the challenging field of Non-Volatile Memory (NVM) IC circuit design. We are actively seeking an experienced Analog Circuit Design Engineer to contribute to our cutting-edge developments in embedded NVM solutions and surrounding circuitry. As a key member of our team, you will be responsible for the design, verification, and debugging of essential analog building blocks like Bandgap references, LDOs, and Charge Pumps. A significant part of your role will involve designing critical memory peripheral circuits for NVM IP and test chips, including Array interfaces, Decoding logic, and Sense Amplifiers. Your responsibilities will span the design lifecycle, from contributing to IP specifications and core circuit design to ensuring performance through layout optimization and comprehensive corner simulations of NVM IPs. We are looking for candidates with proven expertise in analog circuit design, ideally with prior experience in embedded memory or NVM technologies. If you are an experienced analog designer eager to tackle complex challenges in non-volatile memory, we encourage you to apply and help shape the future of memory technology.

【成為円星人】 円星科技由一群專業與充滿熱情的夥伴創立於2011年，為積體電路矽智財設計服務業之新秀，秉持著『成為半導體業最值得信賴之IP公司』的願景，追求永續經營與成長。 誠摯歡迎您成為円星人，加入我們，站上國際舞台！ 一起共同打拚，以精品文化之精神，創造價值，追求卓越！ 【職務簡介】 M31主要業務為向 IC 設計業者和晶圓代工廠授權 IP，此職務為負責高速介面 IP（High Speed Interface IP）, 包含USB. PCIE 等SERDES IP設計工程師職缺。 【將負責的工作內容】 1. High-speed interface analog circuit design (TX, RX, etc) 2. Clocking related circuit design：PLL/CDR 3. Integrate mixed signal IP and handle co-simulation 【條件與特質】 1. 有類比IC設計工程師相關工作經歷5年以上 2. 電機電子/資訊工程碩士畢業 如果您有以上相關經驗且對此職缺有興趣，歡迎投遞您的履歷！

【成為円星人】 円星科技由一群專業與充滿熱情的夥伴創立於2011年，為積體電路矽智財設計服務業之新秀，秉持著『成為半導體業最值得信賴之IP公司』的願景，追求永續經營與成長。 誠摯歡迎您成為円星人，加入我們，站上國際舞台！ 一起共同打拚，以精品文化之精神，創造價值，追求卓越！ 【職務簡介】 M31主要業務為向 IC 設計業者和晶圓代工廠授權 IP，此職務為負責高速介面 IP（High Speed Interface IP）, 包含USB. PCIE, MIPI MPHY, CPHY, DPHY等SERDES IP和類比 IP（Analog IP）, 包含ADC, DAC, PLL, PVT sensor的類比IC設計工程師職缺。 【將負責的工作內容】 1. Mixed-Signal & Analog Circuits Design (LDO, OPA, Bandgap, ADC/DAC, etc) 2. High Speed Interface Analog Design (TX, RX, etc) 3. Clocking related：PLL/CDR 【條件與特質】 1. 有類比IC設計工程師相關工作經歷3年以上 2. 電機電子/資訊工程碩士畢業 如果您有以上相關經驗且對此職缺有興趣，歡迎投遞您的履歷！

5G手機,AR,VR 顯示技術,AI 人機介面的3D觸控顯示技術,整合生物特徵的全面屏顯示技術。 【工作說明】 1. 高速介面的電路評估,規劃,設計與驗證. 2. 低功耗,高速的SRAM電路評估,規劃,設計與驗證. 3. 高精度,低溫漂的時脈電路評估規劃,設計與驗證. 4. 低功耗,快速嚮應的regulator 電路評估,規劃,設計與驗證. 5. 非揮發性記憶體電路評估,規劃,設計與驗證. 6. 高效率 DC/DC circuit design評估,規劃,設計與驗證. 7. 低功耗,低偏移的OPAMP電路評估,規劃,設計與驗證. 8. 低雜訊的DAC/ADC電路評估,規劃,設計與驗證. 【必要條件】 研究所以上相關科系畢業 熟悉類比電路設計,混合信號處理, 對類比電路設計充滿熱忱者

【職位描述】 設計RVI公司新創的光通訊引擎(Optical Engine)類比電路設計工程師，負責設計、開發、測試、優化和調試類比電路及系統，產品矽中介層、玻璃中介層與高階基板。負責從概念到生產的電路設計，確保光引擎達到品質和性能標準。 【主要職責】 1.設計和開發創新的類比電路和系統，應用於光引擎和相關技術領域。 2.測試、優化和調試類比電路，確保其性能符合設計規範和功能需求。 3.與跨部門團隊合作，包括系統工程師、軟體工程師、光學工程師及其他專業人員，共同實現產品開發目標。 4.與客戶密切合作，理解其需求並提供技術支持和解決方案。 5.制定和執行測試計畫，分析測試數據，並提出改進建議。 6.保持對最新技術趨勢的了解，並將其應用於產品設計中以提升競爭力。 Position Description: As an Analog Circuit Design Engineer at RVI, you will be a key contributor to the development of our next-generation Optical Engine. You will be responsible for designing, developing, testing, optimizing, and debugging analog circuits and systems used in advanced optical communication modules, including silicon interposers, glass interposers, and high-end substrates. This role spans from initial concept to mass production, ensuring the performance and quality of the optical engine meet industry standards. Key Responsibilities: 1.Design and develop innovative analog circuits and systems for optical engines and related applications. 2.Test, optimize, and debug analog circuits to ensure performance meets design specifications and functional requirements. 3.Collaborate with cross-functional teams, including system engineers, software engineers, and optical engineers, to achieve product development goals. 4.Work closely with customers to understand their requirements and provide technical support and tailored solutions. 5.Develop and execute test plans, analyze test data, and propose design improvements. 6.Stay updated on emerging technologies and incorporate relevant advancements into circuit design to enhance product competitiveness.

1.Analog front-end design 2.ADC design(Pipelined, SAR, Delta-sigma ADCs) 3.Switched-capacitor circuit design 4. Low EMI techniques 5. Mixed-signal system integration & modeling 6.負責layout floorplan規劃，與layout工程師合作完成相關驗證

1. 高速介面 (SerDes) 類比電路設計 2. Circuit design of CTLE/CDR/DFE/PLL/HDMI2.1 TX

【工作內容】 1. HLS高階語言電路設計 2. 影像處理演算法研究 3. Verilog/VHDL 電路設計相關經驗 4. FPGA開發與設計 【知識/經驗/技能要求】 1. HLS design experience will be best. 2. C/C++ language development experience 3. Image processing algorithm experience. 4. Xilinx FPGA design experience. 【個人特質】 1. 個性好相處，善於團隊合作、個性嚴謹者佳。

※實際任用職稱依個人相關經歷敘薪。 1. 熟悉Display Driver IC 原理. 2. 可獨立完成Charge Pump design. 3. 可獨立完成Band Gap, Regulators , LDO circuit design. 4. 熟悉類比電子電路專業知識如OP-AMP的設計 5 .個性主動積極、熱誠 、樂觀 . 6. 8~10年經驗 7. mipi. lvds frontend 設計與 debug 經驗尤佳

1.熟悉類比混合訊號IP開發, 例如PLL，LDO，USB PHY，MIPI PHY 2.對類比電路設計充滿熱忱者

我們專注於能源晶片與深度演算法的融合創新，誠徵類比IC演算法工程師，將傳統的手工類比設計流程轉化為自動化的智慧演算法，讓電路設計更高效、更穩定，推動類比設計的未來。 你將負責： 開發電路拓撲分析演算法 設計 sizing 最佳化演算法（基於 gm/Id methodology 等） 將手工設計流程轉化為程式化流程 協助建立類比IC設計自動化工具 與軟體團隊合作進行演算法驗證與優化 熟練使用 Vibe Coding 工具（Cursor、Github Copilot、Claude… 等）更佳 我們期待你具備： 類比IC設計實務經驗 熟悉運算放大器、ADC/DAC、電源管理電路等拓撲設計 精通 SPICE 模擬與電路參數萃取 深度理解 sizing methodology（如 gm/Id 設計法） 能清楚闡述設計 trade-off 與電路原理 加分條件： 具備 Python 程式能力 有將手工設計方法轉換為程式實現的經驗 具備統計分析能力（Monte Carlo / corner analysis） 有 EDA 工具 API 開發經驗 熟悉圖論演算法與資料結構 如果你熱愛把設計方法變成程式，並用演算法重新定義類比IC設計的可能性，歡迎加入我們！

Job Summary: Designing analog and mixed-signal ICs for Power Management Products utilizing leading edge sub-micron BiCMOS /DMOS technologies. Products to be designed may include, switching regulators, display drivers, audio amplifiers and power management ICs for fast-growing portable and non-portable markets such as broadband modems, PDAs, notebooks, cell phones, telecom, fiber optics, digital camera, network equipment, and automotive. Essential Functions: • Works on product definition, circuit synthesis from the transistor/resistor level up to the system level, simulation, layout supervision • Participates in the entire product development cycle, from product definition through product release. Qualifications: • MSEE / PhD of electronic engineering, analog or digital IC design topics • For analog, familiar to power converter (buck/boost/buck-boost/LDO) analog design will be the plus • Self-motivated, could have strong team work/collaboration with overseas colleges.