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「類比IC設計工程師 (新竹)(I7)」的相似工作

奇景光電股份有限公司
共500筆
09/17
台南市新市區2年以上碩士以上
1. PLL design 2. High speed receiver design (1.5Gbps/4Gbps/5.4Gbps/8.1Gbps/12Gbps) 3. High speed transmitter design (1.5Gbps/4Gbps/5.4Gbps/8.1Gbps/12Gbps) 4. eDP receiver 5. V-by-One receiver 6. MIPI D-PHY 7. HDMI Receiver 8. HDMI Transmitter 9. LCD P2P interface Transmitter 10. LDO and DCDC design 工作地點:新竹/台南
應徵
09/17
新竹市2年以上碩士以上
Digital IC design engineer - Familiar with Verilog RTL coding - Familiar with digital design flow (pre-layout simulation, timing constraint, synthesis, post-layout simulation) - Will be working on high speed Serdes IPs - Experience or interest in all-digital PLLs or clock-data recovery circuits is a big plus
應徵
09/18
新竹縣寶山鄉經歷不拘碩士以上
1.ADC/LVDSTRX/LVDSTX/MIPIRX/MIPITX/DC2DC/LDO/Charger/Power IC 2.類比電路特性量測 3.Analog/Mixed signal integrated circuit design
應徵
09/17
新竹市經歷不拘碩士以上
1. 觸控IC、TDDI或指紋辨識 IC 開發經驗 2. ADC或sensor IP 開發經驗 3. TFT-LCD或OLED Display driver IC 開發經驗 4. Charge pump、LDO、Source driver、Gate driver、High speed interface、OSC、BGR 相關開發經驗 5. 工作地點:【台南、新竹、台北】 以上其中任何一項相關者佳。
應徵
09/15
新竹縣竹北市經歷不拘碩士以上
1. SAR ADC / Current steering DAC/ SDM ADC/ DAC related 2. Analog Baseband related 3. 據有類比整合相關經驗佳
應徵
09/23
新竹縣寶山鄉經歷不拘碩士
1.LPDDR4/DDR4/DDR3 Mixed signal SERDES/PLL相關開發工作 2.Mixed signal SERDES RTL behavior analysis and implement,熟悉HSPICE 並具備 std cell design flow基礎佳
應徵
09/22
新竹市2年以上碩士以上
1.具類比IC設計經驗 2.具ADC、DAC、PLL、High Speed Serial Link 等相關類比IC設計經驗者佳 3.諳低雜訊設計,具晶片整合經驗者佳 4.溝通表達能力佳,喜好腦力激盪,具團隊合作態度者
應徵
09/18
多方科技股份有限公司其他電子零組件相關業
台北市中山區6年以上碩士以上
【工作職責 (Responsibilities)】: ★ Build & innovate on high-speed analog/mixed-signal circuits such as PCIe/DDR/HDMI... transmitter and receiver in deep sub-micron CMOS technology for integration in SoC products. ★ Work with digital team on specification definition ★ Create behavior model for analog/digital evaluation ★ Compliance test for SerDes IP 【符合條件 (Qualifications)】: ★ Familiar with high speed SerDes specification ★ Familiar with IC/SoC design flow ★ Familiar with analog simulation flow ★ Experience SerDes analog blocks design ★ Must be good team player 【必須條件 (Minimum Qualifications)】: ★ Familiar with Audio analog IP design, such as Preamp/DAC/ADC (including SAR and DSM) 【優秀條件 (Preferred Qualifications)】: ★ Familiar with controller integration ★ Familiar with other baseband analog IP design, such as BGAP/LDO/XTAL/PLL, etc. ★ Familiar with ESD, Latch up, I/O ★ Familiar with layout flow
應徵
07/28
新竹縣竹北市3年以上碩士以上
專長為RF/類比IC電路(LDO, OP, charge Pump, DC/DC converter,PA/LNA bias design)設計及測試,具有量產經驗為佳。
應徵
09/23
新竹縣竹北市5年以上碩士以上
1.Analog front-end design 2.ADC design(Pipelined, SAR, Delta-sigma ADCs) 3.Switched-capacitor circuit design 4. Low EMI techniques 5. Mixed-signal system integration & modeling 6.負責layout floorplan規劃,與layout工程師合作完成相關驗證
應徵
09/17
瑞利光智能股份有限公司其他半導體相關業
新竹市經歷不拘大學以上
【職位描述】 設計RVI公司新創的光通訊引擎(Optical Engine)類比電路設計工程師,負責設計、開發、測試、優化和調試類比電路及系統,產品矽中介層、玻璃中介層與高階基板。負責從概念到生產的電路設計,確保光引擎達到品質和性能標準。 【主要職責】 1.設計和開發創新的類比電路和系統,應用於光引擎和相關技術領域。 2.測試、優化和調試類比電路,確保其性能符合設計規範和功能需求。 3.與跨部門團隊合作,包括系統工程師、軟體工程師、光學工程師及其他專業人員,共同實現產品開發目標。 4.與客戶密切合作,理解其需求並提供技術支持和解決方案。 5.制定和執行測試計畫,分析測試數據,並提出改進建議。 6.保持對最新技術趨勢的了解,並將其應用於產品設計中以提升競爭力。 Position Description: As an Analog Circuit Design Engineer at RVI, you will be a key contributor to the development of our next-generation Optical Engine. You will be responsible for designing, developing, testing, optimizing, and debugging analog circuits and systems used in advanced optical communication modules, including silicon interposers, glass interposers, and high-end substrates. This role spans from initial concept to mass production, ensuring the performance and quality of the optical engine meet industry standards. Key Responsibilities: 1.Design and develop innovative analog circuits and systems for optical engines and related applications. 2.Test, optimize, and debug analog circuits to ensure performance meets design specifications and functional requirements. 3.Collaborate with cross-functional teams, including system engineers, software engineers, and optical engineers, to achieve product development goals. 4.Work closely with customers to understand their requirements and provide technical support and tailored solutions. 5.Develop and execute test plans, analyze test data, and propose design improvements. 6.Stay updated on emerging technologies and incorporate relevant advancements into circuit design to enhance product competitiveness.
應徵
09/17
新竹市經歷不拘碩士以上
Job description Join our innovative team specializing in cutting-edge embedded memory solutions. We are seeking Analog Circuit Engineers to play a key role in the design and development of high-performance embedded DRAM and associated peripheral circuits. In this position, you will be responsible for the complete cycle of DRAM circuit design and simulation verification. Your tasks will involve developing novel circuit topologies, transistor-level design, optimizing performance metrics, and ensuring robust functionality through extensive simulations using industry-standard EDA tools. Required qualifications include a strong technical background in Electrical Engineering, Electronics Engineering, Computer Engineering, Physics, or a closely related field. Candidates must possess demonstrated, significant experience in DRAM circuit design and comprehensive simulation verification methodologies. Ideally, candidates will have proven design experience in specific DRAM-related circuit blocks, including but not limited to: Row and Column Decoder circuits Control path logic DC-DC converters, Charge Pumps, and Bandgap References Delay Locked Loops (DLLs) and Phase Locked Loops (PLLs) Negative voltage generators (NVG) and other critical peripheral circuits This is an excellent opportunity to contribute to state-of-the-art embedded memory designs in a dynamic, collaborative environment. If you are a skilled analog designer passionate about solving complex challenges in DRAM circuitry, we encourage you to apply and help shape the future of embedded memory technology.
應徵
09/17
新竹縣竹北市經歷不拘碩士以上
5G手機,AR,VR 顯示技術,AI 人機介面的3D觸控顯示技術,整合生物特徵的全面屏顯示技術。 【工作說明】 1. 高速介面的電路評估,規劃,設計與驗證. 2. 低功耗,高速的SRAM電路評估,規劃,設計與驗證. 3. 高精度,低溫漂的時脈電路評估規劃,設計與驗證. 4. 低功耗,快速嚮應的regulator 電路評估,規劃,設計與驗證. 5. 非揮發性記憶體電路評估,規劃,設計與驗證. 6. 高效率 DC/DC circuit design評估,規劃,設計與驗證. 7. 低功耗,低偏移的OPAMP電路評估,規劃,設計與驗證. 8. 低雜訊的DAC/ADC電路評估,規劃,設計與驗證. 【必要條件】 研究所以上相關科系畢業 熟悉類比電路設計,混合信號處理, 對類比電路設計充滿熱忱者
應徵
09/18
台北市內湖區經歷不拘碩士以上
Responsible for developing custom IP for SoC design from specification definition, circuit design to testing, and familiar with component and process characteristics.
應徵
09/09
聚睿電子股份有限公司其他電子零組件相關業
新竹市經歷不拘碩士以上
具備1~4之中1種以上的設計經驗。 1. 放大器應用電路; band-gap, op-amp, filter, etc. 2. 電源類比電路: DCDC, LDO, charge-pump, etc. 3. 信號處理電路: SAR ADC, sigma-delta ADC, DAC, etc. 4. 時脈產生電路: PLL, DLL, frequency synthesizer, etc.
應徵
09/23
新竹縣竹北市經歷不拘碩士以上
【產品範疇】 1.LCD display driver 2.AMOLED display driver 3.TDDI 4.TCON 【工作內容】 1.High speed interface 電路設計 (DP/eDP, DDR, MIPI) 2.Clock associated IP 電路設計 (PLL, OSC) 3.Build system behavior model 4.負責layout floorplan規劃,與layout工程師合作完成相關驗證 【需求條件】 1.Familiar with Hspice or Spectre 2.Familiar with PLL/Equalizer/CDR/SERDES circuit design
應徵
09/22
新竹市4年以上碩士以上
1.具類比IC設計經驗 2.具ADC、DAC、PLL、High Speed Serial Link 等相關類比IC設計經驗者佳 3.諳低雜訊設計,具晶片整合經驗者佳 4.溝通表達能力佳,喜好腦力激盪,具團隊合作態度者
應徵
09/22
新竹市7年以上大學
Job Description: As a team member of analog product business group, this role will support Analog IC circuit design of mixed-signal ICs, such as sensors, motor drivers, data converters. Key Responsibilities: 1. Co-work with talented design teams to develop high performance sensor related integrated circuits and products, such as Hall effect sensor, temperature sensor. 2. Contribute to chip architecture and circuit design decisions 3. Collaborate with validation, product engineering and test engineering teams to enable successful transfer to production 4. Also, will be responsible for circuit requirements definition, design, simulation and analysis, layout/test support, documentation and customer support for sensor applications. Qualifications: 1. Demonstrate strong analytical and problem-solving skills 2. Strong time management skills that enable on-time project delivery 3. In depth working experience with Cadence composer and Virtuoso, Spectre, HSpice and mixed-signal design flow. 4. Experience in lab measurement and equipment. 5. Self-starter. Passionate about creative work. Good communication skills and team player. Able to take the initiative and drive for results.
應徵
09/18
新竹市經歷不拘碩士
1.類比/電源管理 IC電路設計. 2.參與LCD PMIC, LED Driver專案. 3.DC-DC, Charger-Pump, LDO, OP, DAC,ADC相關電路設計
應徵
09/22
新竹縣竹北市3年以上碩士以上
1.Monolithic SPS & DC/DC Converter related New product/analog IP development 2. New FAB process definition, evaluation & validation 3. Maintaining existing product, co-work with application engineer to fulfill customer requests 4. Power device optimization & characterization with layout, device & test engineers 5. Establishing behavior model with Simplis or other tools
應徵