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「【2025預聘|校園徵才】TE Team_New Product Test Development Engineer_新產品測試研發工程師 (新竹)」的相似工作

MPS_芯源系統有限公司
共500筆
09/11
新北市汐止區經歷不拘碩士以上
Job Summary: Designing analog and mixed-signal ICs for Power Management Products utilizing leading edge sub-micron BiCMOS /DMOS technologies. Products to be designed may include, switching regulators, display drivers, audio amplifiers and power management ICs for fast-growing portable and non-portable markets such as broadband modems, PDAs, notebooks, cell phones, telecom, fiber optics, digital camera, network equipment, and automotive. Essential Functions: • Works on product definition, circuit synthesis from the transistor/resistor level up to the system level, simulation, layout supervision • Participates in the entire product development cycle, from product definition through product release. Qualifications: • MSEE / PhD of electronic engineering, analog or digital IC design topics • For analog, familiar to power converter (buck/boost/buck-boost/LDO) analog design will be the plus • Self-motivated, could have strong team work/collaboration with overseas colleges.
應徵
08/14
台北市內湖區經歷不拘碩士以上
歡迎2026年畢業並正在找尋研發替代役的同學申請! Direction 1: System Design Power Validation Engineer Direction 2: PCB Layout Engineer Direction 3: System Application Engineer What you'll be doing: • Collaborate with system design, hardware, and power engineering teams to participate in end-to-end design, validation, and optimization of hardware products (such as GPUs, AI accelerators, server platforms, etc.) • Responsible for circuit schematic design and PCB layout using EDA tools (such as Altium, Cadence, Mentor Graphics) for multilayer high-speed board design and optimization • Perform PCB design reviews, assist in resolving signal integrity, power integrity, EMI/EMC issues to improve design quality and manufacturability • Participate in board bring-up, debugging, power testing, and performance validation of hardware prototypes, helping to ensure optimal power efficiency under varying operating conditions • Write and maintain design, validation, and test documentation, including but not limited to design specifications, validation reports, and test plans • Work closely with cross-functional teams to continuously improve design processes and enhance product innovation and competitiveness What we need to see: • Hold a Master of Science/Ph.D in Electrical Engineering or related field • Familiar with circuit schematic design and PCB layout processes, and basic proficiency with EDA tools (such as Altium, Cadence Allegro/OrCAD, Mentor PADS, etc.) • Strong interest in power management, DC-DC converters, signal integrity, and high-speed digital design is a plus • Good debugging, analysis, and problem-solving skills; able to work independently or within a team to resolve design and validation challenges • Good command of English for reading technical documentation and communication • Proactive, eager to learn, and passionate about the latest electronics and AI hardware technologies 應徵方式: 請提供以下資料: • 英文個人履歷 • 學士+碩士成績單 (中英文皆可) 提交申請: 請將上述資料投遞至104,符合資格者將會收到進一步的聯繫通知。
應徵
09/15
新北市汐止區經歷不拘大學
Job Summary: The HR Intern will mainly assist in the talent acquisition tasks of MPS Taipei office. This role is responsible for screening, interviewing, coordinating and hiring practices. Essential functions: • Support the recruiting lifecycle, such as candidates sourcing and selection, interview coordination, etc. • Build up a good relationship with target talents from diverse recruiting channels, such as the campus recruitment, 104, LinkedIn, etc. • Manage the current recruiting channels and platforms. • Work closely with hiring manager to develop a comprehensive recruiting strategy and plan. • Assist with other ad-hoc projects. Qualifications: • Bachelor or above, in Human Resource, Business Administration, Labor Relations or related field, is a plus (in final year of study is preferred). • Good team player, outgoing person, passionate to HR field. • Strong analytical and communication skills. • Microsoft Office (Word, Excel, Power Point) skills. • Has other HR intern related experience is a plus.
應徵
09/11
新竹縣竹北市經歷不拘大學
通嘉致力打造工作/生活/健康兼具的職場環境,歡迎加入展開「通嘉就是你家」旅程! 本職務負責工作如下: 1.測試工程開發驗證 (PD、Mixed Signal產品) 2.工程轉量產及轉廠驗證 3.量產異常分析及排除 4. RMA測試分析與資料彙整 5.測試工程最佳化專案規劃與導入
應徵
09/11
新北市汐止區1年以上大學以上
Job Summary: • This FAE will provide technical support to the Sales and FAE team in developing potential opportunities incorporating MPS products and services. The FAE identifies and shares current and emerging customer technical needs to improve the tactical and strategic product positioning. Qualifications: • At least 1 years' experience in power electronics (DC/DC or AC/DC) related industry; experience in Power IC vendor as AE or FAE will be a plus. • Familiar with general NB/Server DCDC Power Design or DCDC will be a plus. • Ability of initiating and problem solving. • Good interpersonal skills. • Adaptability-ability to meet changing condition. • Strong sense of responsibility, self-motivated and good team spirit. Education: • BS or MS majored in Electronic Engineering or related. Location: • Taipei, Taiwan
應徵
09/16
新竹縣竹北市經歷不拘大學以上
半導體封裝設備系統或模組機械設計 1.具備機械/機構電腦繪圖基礎 2.機構模組設計及組裝整合 3.機構調機及操作
應徵
09/08
新竹市經歷不拘碩士以上
【研發替代役/預聘】硬體開發工程師 工作內容: 1. 面板驅動IC、觸控IC、電源IC、影像產品、TV相關系統之FPGA驗證/IC驗證/驗證平台開發 2. TFT LCD驅動系統開發與高速PCB設計 3. 全球面板廠驅動系統技術支援 【研發替代役/預聘】硬體開發工程師 職務條件: 歡迎碩士以上電子、電機、電信、電控、資工等相關系所,具備以下經驗及專長: 1. 熟C/ C++/Verilog,有coding經驗 2. 熟HW電路設計FPGA 3. Evaluation Board(EVB)設計及debug經驗 【共創A+聯詠】 穩健踏實、專家精神、創造優勢 驅動科技、開發創新、引領未來 邀請優秀人才,共創A+聯詠
應徵
07/22
台北市內湖區經歷不拘碩士以上
歡迎2026年畢業並正在找尋研發替代役的同學申請! 職位選擇: Direction 1: Physical Design Engineer Direction 2: ASIC Physical Design Engineer Direction 3: DFX Engineer Direction 4: CAD Tools Development Engineer Direction 5: Design Verification Engineer What you’ll be doing: Key Domains: • Physical and ASIC Design Implementation • Backend and Layout Optimization • Design-for-Excellence (DFX: Test, Manufacturability, Debug) • Development of CAD/EDA Automation Tools • Functional and Formal Design Verification What we need to see: • MS degree from EE/CS or related majors from a prestigious university. • Good knowledge in digital circuit design. • Experience in using Verilog HDL. • Experience in various EDA tools. • Fluent in English reading and writing. • Self-motivated, good team player. Ways to stand out from the crowd: • Proven ability to work independently as well as in a multi-disciplinary group environment • Good command of C/C++ or Verilog programming language. • Familiar with Perl/Python/Tcl/Shell scripting 應徵方式: 請提供以下資料: • 英文個人履歷 • 學士+碩士成績單 (中英文皆可) 提交申請: 請將上述資料投遞至104,符合資格者將會收到進一步的聯繫通知。
07/22
台北市內湖區經歷不拘碩士以上
歡迎2026年畢業並正在找尋研發替代役的同學申請! We are seeking talented Firmware Engineers to join our team to work at the intersection of hardware and software, contributing to the core firmware that powers NVIDIA’s industry-leading GPUs and high-performance server products. In this role, you will design, develop, and optimize low-level software that enables reliable operation, high performance, and advanced features for both GPU and server platforms. These directions are: Direction 1: GPU Firmware Engineer Direction 2: Server Firmware Developer You’ll be doing: • Design, implement, and test embedded firmware for NVIDIA GPUs and server systems, enabling seamless hardware-software interaction. • Develop, maintain, and enhance bootloaders, device initialization code, and system management features. • Work closely with hardware, software, and systems teams to ensure robust bring-up and integration of new silicon and server platforms. • Diagnose, debug, and solve complex firmware and hardware-related issues across various development and production environments. • Drive innovation and optimization in areas such as power management, error handling, security, and performance monitoring for GPU and server hardware. • Contribute to documentation, compliance, and support for new product features and industry standards. Qualifications: • Master’s degree in Computer Engineering, Electrical Engineering, Computer Science, or related field. • Proficiency in C/C++ and embedded firmware development principles. • Understanding of computer architecture, hardware interfaces (I2C, SPI, PCIe), and real-time operating systems. • Experience with hardware bring-up, debugging tools, and low-level programming. • Strong analytical, troubleshooting, and communication skills. • Experience with server, GPU, or large-scale data center hardware is a plus. 應徵方式: 請提供以下資料: • 英文個人履歷 • 學士+碩士成績單 (中英文皆可) 提交申請: 請將上述資料投遞至104,符合資格者將會收到進一步的聯繫通知。
應徵
09/09
新竹市經歷不拘大學以上
【本職缺優先審核至高通官網投遞人選】請至高通官網上傳英文履歷表:https://qualcomm.wd12.myworkdayjobs.com/External/job/Hsinchu-City-TWN/CPU-Verification-Engineer--Up-to-Staff-Level_3063596 【Talents who apply job through Qualcomm Career Website will be reviewed and considered as top priority】 https://qualcomm.wd12.myworkdayjobs.com/External/job/Hsinchu-City-TWN/CPU-Verification-Engineer--Up-to-Staff-Level_3063596 【General Summary】 As a CPU Verification Engineer, you will be responsible for verifying design features across all aspects of CPU. 【Roles and Responsibilities】 • Develop deep understanding of CPU micro-architecture. • Work closely with design/verification teams within CPU to develop comprehensive test plan. • Use simulation and formal verification methodologies to execute test plans. • • Write checkers, assertions and develop stimulus. • Verify power intent through use of methodologies like UPF. • Work closely with system architects, software teams and Soc team to validate system use cases. • Work closely with emulation team to enable verification on emulators and FPGA platforms. • Debug and triage failures in simulation, emulation and/or Silicon. 【Minimum Qualifications】 • BS degree in CS/EE – with course work in computer architecture. • Experience with programming languages – C/C++ and scripting languages – Perl/Python. • Experience with hardware description languages – System Verilog/VHDL. • Implementation of assembly and C language embedded firmware • Experience with software tool chain including assemblers, C compilers, Makefiles, and source code control tools 【Preferred Qualifications】 • Strong understanding of micro-processor architecture. • Strong understanding of power management, physical design concepts. • Experience in Silicon bring up and validation of CPU features. • Experience in debug of functional, power, performance and/or physical design issues in silicon. • Experience in CPU design and verification. • Experience in Test development for validation of CPU features on Silicon. • Experience in development of test vectors for tester bring up.
應徵
09/11
明緯企業股份有限公司其他電子零組件相關業
新北市五股區經歷不拘碩士
1. 電源研發專案之規劃、線路設計、規格訂定、成本分析執行與進度管控、對策擬定 2. 工程樣品試作、組裝、測試 3. 新產品認證(安規、EMC)問題解決及對策擬定 4. 依個人硬體設計及韌體能力,安排合適之職務
應徵
08/12
新竹市5年以上碩士以上
Please apply this role through https://careers.synopsys.com/job/hsinchu/r-and-d-engineering-sr-staff-engineer/44408/84900058096 Synopsys is looking for motivated Product Engineer to help design, develop and test state of the art Static Timing, Characterization and Library modelling tools. The primary focus of the Product Engineer is closely working with R&D team, to influence technologies/solution roadmaps and provide R&D team with accurate input from Field AEs, helping them focus on the most critical design challenges and help define solutions to critical problems. The engineer will work closely with Field AEs, ensuring overall consistency of end-to-end design and analysis flow to meet customer needs. The engineer will also work with Sales and Marketing teams to find and develop new markets, drive new tool evaluations and help customers with the adoption and continuous usage of Static Timing, Characterization and Library Modelling, thus enabling Chip Design customers achieve best Timing, Power and Characterization Goals. Synopsys’ existing and forthcoming tools offer an advanced transistor-level static timing characterization and library modelling solution that addresses the existing and emerging challenges in custom and memory design. They offer predictability and improved productivity to designers. Their concurrent timing, SI features and advanced variation aware analysis enables designers to accurately and quickly identify design issues early-on and avoid expensive late-finding of problems in silicon. Main responsibilities: • Drive new products and new product features that exceed customer needs. • Work with RnD to enable timely implementation of new products and features, and important bug fixes. • Provide consultation to prospective users and/or product capability assessment and validation. • Provide tool trainings to customers and Field AEs. • Provides technical expertise to sales staff through sales presentations and product demonstrations. • Assists the sales staff in assessing potential application of company products to meet customer needs and preparing detailed product specifications for the development and implementation of customer applications/solutions. Requirements: We are looking for an innovative, motivated, and dependable person, with at least BS degree and 8+ years of recent hands-on experience including: · Exceptional expertise in transistor-level analysis and debug circuit level issues for SRAM, RF, ROM memories and Standard Cells. · Good exposure to static timing concepts and CMOS engineering fundamentals. · Good knowledge of TCL and or other scripting languages. · Very good communication, social and leadership skills. Plus: · NanoTime or PrimeLib experience highly desirable.
應徵
09/08
台南市永康區經歷不拘碩士以上
【研發替代役/預聘】類比IC設計工程師 工作內容: IP、Driver IC相關電路開發與設計,驗證及量產 【研發替代役/預聘】類比IC設計工程師 職務條件: 歡迎碩士以上電子、電機、電信、電控、資工等相關系所,具備以下經驗及專長: 1. 熟任一電路架構PLL/DLL/CDR/ADC/DAC/OPAMP/Bandgap/SC Filter/HV Buck/HV Boost/Buck-Boost/Charge Pump/CDS/ MIPI-PHY/USB-PHY/DDR-PHY 2. 熟高速傳輸介面設計(PCIE, 光通訊, USB, ... 等) 【共創A+聯詠】 穩健踏實、專家精神、創造優勢 驅動科技、開發創新、引領未來 邀請優秀人才,共創A+聯詠
應徵
09/11
新竹市經歷不拘碩士以上
[歡迎具度研發替代役資格者投遞履歷] 1. 電路設計。 2. 具基本電子學概念。
應徵
09/12
台北市內湖區經歷不拘碩士
驅動IC/ 觸控IC 晶片相關系統驗證
應徵
09/01
安霸股份有限公司IC設計相關業
新竹市經歷不拘碩士以上
1. VLSI Advance Technology Node (2nm and Below) Physical Design Implementation. 2. Comprehensive scope to touch, including chip floorplanning, a variety of design closures on timing, signal integrity, power integrity, DFM as well as physical verifications. 3. Develop physical design flows/solutions on the cutting edge technology node.
應徵
09/11
新竹縣竹北市5年以上大學
歡迎合乎本職務需求具原住民身分的朋友投遞履歷! This position will report to the APAC Regional HR Manager and be responsible for full cycle recruitment, including planning, intake meetings, sourcing, interviewing, hiring and onboarding. The successful candidate will be self-motivated and have excellent interpersonal, communication skills. Responsibilities • Work closely with hiring managers to identify requirements and conduct regular follow-up with managers to determine the efficiency of recruiting efforts. • Perform end-to-end recruitment for Taiwan requisitions across business units in line with requirements. • Devise and implement sourcing strategies to build pipelines of potential candidates and proactive in talent sourcing using different channels, such as 104, LinkedIn, internal referrals, and other professional networks. • Proactively communicate recruiting status and feedback to candidates and hiring teams and facilitate timely decision-making. • Create salary proposals and extend, negotiate offers with candidates, ensure proper onboarding for new hires and the vital paperwork is completed promptly and accurately. • Conduct new employee onboarding, ensuring process is engaging and processes are followed and accurate. • Ensure the recruitment process is completed in an efficient and professional manner. • Manage recruitment related reports and contribute to the continuous improvement of the Talent Acquisition function by providing analysis and recommendation in terms of reduced costs, improved efficiencies, quality and processes. • Maintain accurate and well-ordered documentation on full cycle recruitment process and other staffing administration functions. • Ensure Company and legal compliance with employment practices, policies and processes.
應徵
09/11
新北市汐止區2年以上大學以上
Job Summary: • This FAE will provide technical support to the Sales and FAE team in developing potential opportunities incorporating MPS products and services. The FAE identifies and shares current and emerging customer technical needs to improve the tactical and strategic product positioning. Qualifications: • 2 years' experience in power electronics (DC/DC or AC/DC) related industry; experience in Power IC vendor as AE or FAE will be a plus. • Familiar with general NB/Server DCDC Power Design or DCDC will be a plus. • Ability of initiating and problem solving. • Good interpersonal skills. • Adaptability-ability to meet changing condition. • Strong sense of responsibility, self-motivated and good team spirit. Education: • BS or MS majored in Electronic Engineering or related. Location: • Taipei, Taiwan
應徵
09/08
新竹市經歷不拘大學
1.IC測試程式開發. 2.IC量產維護. 3.工程實驗 4.測試軟硬體模組開發. 5.主管交辦事宜.
應徵
09/15
台北市內湖區3年以上大學以上
Spice model extraction
應徵