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「R0066 - Hardware SI Engineer」的相似工作

優比快股份有限公司
共500筆
08/13
優比快股份有限公司電子通訊/電腦週邊批發業
台北市信義區3年以上大學
About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to the next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you’ll heighten your potential and broaden your horizons, all while shaping the future of connectivity. Responsibilities - Perform electrical validation of high-speed interfaces such as PCIe Gen3~Gen5, Ethernet (802.3 10G/25G/100G/400G), DDR4/5, SATA, and USB3 - Perform electrical validation of low-speed interface, including I2C, SPI, MDIO, eMMC, and RGMII. - Perform chip-to-chip SerDes signal validation, including SGMII+, UXSGMII interfaces. - Plan and execute power testing strategies for multiphase power stages and DC buck converters. - Perform power integrity validations, including ripple noise analysis, power sequencing verification, electronic load (E-load) operation, and power supply unit (PSU) evaluation. - Develop and execute test scripts under Linux environments, familiar with shell commands and automation scripting. - Collaborate with the HW team and chip vendor to define and document SI/PI validation plans and requirements. - Analyze and identify SI/PI issues, and work closely with HW, FW, layout teams, and chip vendors to develop improvement solutions that enhance electrical performance and signal integrity quality. Requirement - Solid experience with SI test equipment (oscilloscope, BERT, VNA, TDR). - 3+ years of hands-on experience in Signal Integrity, and SerDes/PCIe/USB/DDR validation. - Solid understanding of compliance testing methodologies, eye diagram, and litter analysis. - Strong understanding of low-speed interface protocols and comprehensive experience in AC/DC characteristic validation. - Bachelor’s/Master’s degree in Electrical Engineering, Electronics, or related fields. - Excellent problem-solving skills, ability to debug SI/PI issues, and strong cross-functional communication with HW design and layout teams. Preferred Qualifications - Experience working on system-level signal validation in server, networking, or storage platforms with high-speed interfaces. - Familiarity with Power Integrity validation, including power sequence, ripple noise, OCP, and SCP testing. Benefits - International work environment and collaboration with global development teams - Excellent work conditions - Competitive package: great pay, perks, and benefits - Group insurance and health coverage - Flexible working hours and patterns - Complimentary drinks and snacks at the office
應徵
10/17
新北市板橋區5年以上大學以上
PRIMARY JOB DESCRIPTION: • Responsible for performing signal integrity and power integrity simulation analyzing DIMM products in different form factors. • Work with layout team and NPI team for achieving good board routing and releasing to production • Will interface with SMART global design teams PRINCIPAL DUTIES AND RESPONSIBILITIES: • Perform channel margin analysis to provide design tradeoffs among package, board, and connector on products starting from the technical specifications from different controller and NAND flash vendors in different form factors • Perform PCB timing analysis, work with layout designers and hardware engineers to implement all signal integrity rules • Perform PCB power margin analysis, work with layout designers and hardware engineers to implement all power integrity rules • Develop layout signal/power integrity rules guideline or document on new products starting from the technical specifications from different DRAM vendors in different form factors • Capability to execute trouble shooting and provide workable solution to SMART global R&D teams and customers • Communicate and work closely with global R&D teams to achieve targeted schedule for PCB board release • Write a Layout guidance document. Organize and research technical reports and share
應徵
10/13
新北市新莊區2年以上大學
工作需求 (Job Requirements) 1.電子相關科系大學或碩士以上 2.2-5年的SI(訊號完整性)設計相關工作經驗 3.熟悉相關SI模擬軟體工具相關經驗 4.需與亞洲不同地區的辦公室協助合作 5.能獨立完成公司交辦的工作 工作職責 (Job Responsibilities) 1.負責3D高頻模擬軟體之售前拜訪、技術支持、產品培訓及專業規劃與執行。 2.熟悉PCB、SI信號完整性等相關模擬經驗 3.負責3D軟體的應用及技術支持給現有與新的潛力客戶 4.負責準時完成主管分配的工作
應徵
10/05
台北市內湖區10年以上碩士
We are seeking a highly experienced and detail-oriented Senior Hardware Board Development Engineer with 10–15 years of hands-on experience in hardware system design. This role focuses on the development of evaluation boards (EVBs) and customer reference boards (CRB) for advanced SoC/ASIC platforms, including board-level architecture, high-speed signal design, and system bring-up. You will work closely with SoC/ASIC design teams, firmware engineers, and validation teams to deliver robust reference platforms for internal and customer use. The ideal candidate has deep expertise in DDR4/DDR5, PCIe Gen4/5/6, high-speed SerDes, and power delivery networks, along with strong debugging and lab skills. Responsibilities * Lead the design and development of SoC/ASIC evaluation boards, including schematic capture, PCB layout review, and component selection. * Perform board bring-up, signal integrity validation, and system-level debugging. * Collaborate with cross-functional teams to support SoC/ASIC validation and customer reference designs. * Conduct SI/PI simulations and optimize high-speed interfaces (DDR, PCIe, Ethernet). * Generate technical documentation including schematics, BOMs, test procedures, and design guides. * Interface with vendors and manufacturing teams for prototype builds and production support.
應徵
10/21
嘉航科技股份有限公司電腦軟體服務業
台北市內湖區1年以上碩士以上
1、 負責Ansys高頻電磁場模擬分析軟體之售前拜訪、資料蒐集 2、 技術支援以及技術文件製作;訓練教材製作以及教育訓練。 3、 軟體安裝、簡報製作 4、 Ansys高頻電磁場(SI/PI)模擬分析軟體產品功能研究 5、 高頻相關工程顧問服務專案執行與規劃 6、 高頻相關產業趨勢研究。
應徵
10/15
新竹縣竹北市經歷不拘碩士以上
【產品範疇】 1.DDI / TP / TDDI/ TCON/ Power等顯示相關產品 【工作內容】 1. SI/PI/EM issue solving, performance optimization, and design rule development 2. Chip/PKG/Board simulation and measurement for SI/PI/EM issue. 3. Co-work with system engineers, IC designers, and customers on product design-in tasks.
應徵
10/21
威強電工業電腦股份有限公司電腦系統整合服務業
新北市汐止區3年以上大學
1. 針對高速介面進行信號完整性模擬。 SI simulation : TDR, S parameter,Eye diagram,Crosstalk.. 2. 電路板電源完整性模擬。 PI simulation : IR Drop , PDN.. 3. 對於佈局圖給予改良建議。 Polar應用及評估PCB & VNA材料選擇方式 4. 信號完整性異常除錯。
應徵
10/23
新竹縣竹北市3年以上大學以上
We are seeking a highly skilled and motivated Field Application Engineer to provide advanced customer engineering support across our key semiconductor customers. This role will act as a critical technical interface between customers and our internal teams, focusing on problem solving, project execution, and proactive alignment with customer requirements and technology roadmaps. The successful candidate will play a hands-on role in delivering world-class technical support, ensuring rapid issue resolution, and strengthening long-term customer relationships. Key Responsibilities: 1. Advanced Technical Support · Provide expert-level advice on hardware requirements to enable successful loadboard/module design projects. · Conduct schematic capture, component placement, and routing support when needed to address complex technical challenges. · Act as a senior technical resource for diagnosing hardware-related feasibility and performance issues. 2. Customer Engagement & Relationship Building · Gather and validate customer requirements to ensure sufficient information for initiating design projects. · Serve as the primary technical contact, managing expectations and maintaining clear communication with customer engineering teams. · Manage customer interactions throughout the project lifecycle to ensure satisfaction and successful delivery. 3. Application Engineering & Solution Development · Assess and estimate project schedule, cost, and feasibility to define realistic plans. · Support design-in activities by translating customer requirements into technical hardware solutions. · Deliver technical updates, training, and presentations to customers and internal stakeholders. 4. Cross-Functional Collaboration · Collaborate with internal design and project management teams to align project execution with customer requirements. · Provide structured feedback from design projects to influence product development and continuous improvement. · Ensure alignment of project execution with both tactical problem solving and longer-term strategic direction. Preferred Traits: · Resilient and Professional Under Pressure – Remains calm and constructive when facing challenges, escalations, or changing requirements. · Proactive Problem Solver with Strong Ownership – Takes initiative, drives resolution, and ensures customer satisfaction while balancing immediate issue-solving with long-term improvements. · Collaborative and Organized Team Player – Demonstrates a positive “can-do” attitude, manages multiple priorities effectively, and works seamlessly with cross-functional and global teams. This job description serves as a general guide to the responsibilities and qualifications expected for the role and may be subject to modification based on the specific needs of the organization.
應徵
10/23
雍智科技股份有限公司其他半導體相關業
新竹縣竹北市經歷不拘碩士
1.SI/PI量測與模分析 2.網路分析儀與探針平台操作 3.量測與模擬數彙整 4.機台操作:網路分析儀 5.專業知識需求:電磁學、微波工程、SI/PI理論分析
應徵
10/22
時珍有限公司電腦軟體服務業
台北市南港區5年以上大學
1. 硬體電路設計與開發 • 根據專案需求進行系統架構規劃與電路設計(數位、類比、高速訊號) • 繪製原理圖(Schematic)與零件選型 • 與 PCB Layout 工程師合作進行電路板設計與佈線優化 • 評估並引入新技術與元件(CPU、GPU、DDR、Type-C、PD 等) 2. 功能實現與原型驗證 • 製作與驗證原型機(Prototype / EVT) • 分析與解決電路功能異常、訊號完整性(SI)及電源完整性(PI)問題 • 測試高速介面(USB, PCIe, HDMI, DP, Thunderbolt)與相容性驗證 • 優化功耗與散熱設計 3. 測試與驗證 • 制定並執行硬體測試計畫(功能測試、效能測試、穩定性測試) • 協助進行安規(EMI/EMC)、安規認證(UL、CE、FCC 等) • 進行系統相容性測試(各型周邊裝置、作業系統) • 與測試團隊合作分析並修正問題 4. 跨部門專案協作 • 與機構工程師(ME)協調 PCB 尺寸、元件擺放與散熱方案 • 與軟體工程師(SW)共同除錯(Debug)與韌體開發支援 • 與專案經理(PM)對齊時程與需求 • 與供應商(ODM/OEM/零件廠)討論設計、良率與成本 5. 量產支援與問題解決 • 支援試產(PVT)與量產(MP)階段的硬體異常分析 • 協助改善製造良率與穩定性 • 處理現場生產問題(SMT、組裝、測試工站) 6. 文件與版本管理 • 編寫與維護設計文件(原理圖、BOM、設計規範) • 設計變更(ECO/ECN)與版本控制 • 測試報告與問題追蹤(Issue Tracking)
應徵
10/23
新北市土城區4年以上大學
PCIE/ Ethernet for AI Server High Speed EE for SI/HW/PCB design 1. 被動式(DAC)/主動式(ACC, AEC)及其他高速產品(USB, HDMI等)Paddle Card 、測試板等產品相關PCB之電子電路& PCBA設計, 並進行設計方案之電氣及 SI/PI驗證。 2. 高速系統模組之訊號匹配, 衰減, 頻率響應等各式高頻參數特性的設計。 3. 串接相關單位完成產線自製測試設備 PCB 設計及驗證。 4. 配合客戶進行高速高頻配件產品與線纜產品設計, 實現對應 PCBA電路設計並完成產品測試/驗證。
應徵
10/22
新竹縣湖口鄉1年以上碩士以上
1. Solidworks繪圖與ANSYS Fluent/ANSYS CFX操作 2. 大型乾燥系統設計以及熱流場模擬分析 3. 二相流(固-氣系統)與顆粒追跡分析 4. 熱流場改善與多物理場耦合分析 5. 分析結果數據整理與實驗驗證
應徵
10/22
新北市中和區2年以上碩士以上
1. Performing DC IR drop and AC impedance simulation. 2. Improve simulation/validation efficiency and performance by automation. 3. Execute SI/PI/RF/EMI verification for the system requirements. 4. Build up SI/PI simulation and measurement correlation database. 5. Build up design and test capability including design guidance and lab setup. 6. Working with HW teams to optimize high-speed signal.
應徵
10/16
瑞傳科技股份有限公司電腦及其週邊設備製造業
新北市樹林區經歷不拘碩士以上
a. SI訊號/PI電源完整性模擬分析 (Pre-Layout & Post-Layout) b. PCB/Layout設計建議與Guideline制定 c. SI/PI/EMI新技術專研與導入
應徵
10/21
瑞利光智能股份有限公司其他半導體相關業
新竹市經歷不拘大學以上
【職位描述】 設計RVI公司新創的光通訊引擎(Optical Engine)類比電路設計工程師,負責設計、開發、測試、優化和調試類比電路及系統,產品矽中介層、玻璃中介層與高階基板。負責從概念到生產的電路設計,確保光引擎達到品質和性能標準。 【主要職責】 1.設計和開發創新的類比電路和系統,應用於光引擎和相關技術領域。 2.測試、優化和調試類比電路,確保其性能符合設計規範和功能需求。 3.與跨部門團隊合作,包括系統工程師、軟體工程師、光學工程師及其他專業人員,共同實現產品開發目標。 4.與客戶密切合作,理解其需求並提供技術支持和解決方案。 5.制定和執行測試計畫,分析測試數據,並提出改進建議。 6.保持對最新技術趨勢的了解,並將其應用於產品設計中以提升競爭力。 Position Description: As an Analog Circuit Design Engineer at RVI, you will be a key contributor to the development of our next-generation Optical Engine. You will be responsible for designing, developing, testing, optimizing, and debugging analog circuits and systems used in advanced optical communication modules, including silicon interposers, glass interposers, and high-end substrates. This role spans from initial concept to mass production, ensuring the performance and quality of the optical engine meet industry standards. Key Responsibilities: 1.Design and develop innovative analog circuits and systems for optical engines and related applications. 2.Test, optimize, and debug analog circuits to ensure performance meets design specifications and functional requirements. 3.Collaborate with cross-functional teams, including system engineers, software engineers, and optical engineers, to achieve product development goals. 4.Work closely with customers to understand their requirements and provide technical support and tailored solutions. 5.Develop and execute test plans, analyze test data, and propose design improvements. 6.Stay updated on emerging technologies and incorporate relevant advancements into circuit design to enhance product competitiveness.
應徵
10/22
欣興電子股份有限公司印刷電路板製造業(PCB)
桃園市龜山區經歷不拘碩士以上
1. Electromagnetic simulation and electrical modeling by using Ansys EM suite. 2. SI/PI high frequency / high speed signal integrity / power integrity / antenna radiation with Ansys EM/ADS systems. 3. 3D full wave FEM/FDTD large-scale simulation and validation with EMpro and HFSS HPC. 4. Signal emulation and performance simulation in PCB/Substrat of optical module.
應徵
10/22
宜鼎國際股份有限公司電腦及其週邊設備製造業
新北市汐止區3年以上大學
因應全球AI應用的發展,公司業務持續成長中,宜鼎國際正在尋找訊號量測工程師加入我們的團隊! 宜鼎國際致力於服務我們的顧客與合作夥伴,鼓勵面對面的互動和團隊合作。如果您擁有 3年以上相關經驗,並對科技產業充滿熱情,誠摯地邀請您加入我們優秀的團隊,擔任訊號量測工程師,親身體驗我們充滿活力的公司文化。 【工作地點】 -此職位的辦公室設在交通便利的新北市汐止,距離 捷運南港站 或 汐止火車站 或 交流道 僅3-10分鐘車程,大樓就有停車位、Youbike及豐富的公車選擇,讓您的通勤更加便捷。 -辦公大樓過個馬路就到好市多Costco,中午或下班採買日用品超方便,使您的工作和生活更加平衡。 【主要職責】 1. 主板各訊號介面量測驗證 (X86, RISC(ARM), Server) 2. 規劃及撰寫測試計劃書 (Test Plan) 3. 協同硬體研發人員分析波形失效原因 4. 熱衷於研究技術新知,規範架構,從中收集案例,解決問題,分享心得 5. 熟悉TDR、NA的基本操作者優先考量 6. 具備良好的故障排除、解決問題、多工處理和組織管理技能者優先 7. 熟悉示波器使用 8. 協助主管交辦事項 【我們提供什麼】 -在全球AI解決方案與工業級儲存領導品牌的公司中實現自我 -在「一群夥伴、一同經營」核心精神中,積極經營自有品牌,與公司一同成長,共享豐厚的發展機會和福利! 加入宜鼎國際,一起寫下值得回憶的故事!
應徵
10/23
佳必琪國際股份有限公司電腦及其週邊設備製造業
新北市中和區2年以上大學以上
如果你很懂: 1. Signal Integrity (信號完整性)分析/設計/測試,高頻測試版/測試系統設計與分析 2. CST 相關高頻模擬軟體 3. 高頻cable或零組件之訊號/雜訊設計/測試與debug 4. 會IEEE 802.3 系列或PCI-e規格 期待你可以: 1.跨部門溝通確認機構/客戶需求與高頻特性 2.針對連接器/線材高頻特性提出設計改善方向與模擬結果 3.協助分析PCB高頻特性與提出設計改善方案 4.能進行高頻分析,並建立模型讓模擬與實品盡可能趨近
應徵
10/23
新北市新店區3年以上大學
請提供[英文履歷] 此職缺 負責 Server Lab 測試作業完整循環:待測物與伺服器收發、環境建置、點焊/量測、硬體更換、網路佈線、功能與訊號測試,並與跨部門/跨國團隊協作,確保設備運行穩定。 工作內容 - 建置測試環境(伺服器機架安裝、韌體/BIOS/OS 基礎設定),支援後續測試。 - 主機板待測點焊接(含 0402/0201 等級)或量測點臨時導出製作。 - 使用示波器、分析儀、萬用電錶等進行訊號/功耗/功能量測。 - 伺服器零組件更換(HDD、SSD、RAM、風扇、線材等)、故障排除。 - BIOS Log / Error Log 蒐集、初步判讀與問題分類。 - 使用 SSH、console 等工具檢查設備狀態,並進行伺服器功能測試。 - 待測伺服器,備品與零件庫存進出庫與標示、紀錄、資產管理。 所需專業與技術 - 電子 / 電機 / 資電相關科系畢業。 - 3年伺服器或 PC / Notebook 硬體測試或 Lab 支援經驗。 - 能閱讀線路圖 / PCB Layout 基本結構,熟悉小尺寸料件(0402/0201)焊接或測點引出。 - 實務訊號量測經驗:示波器 / 分析儀 / 負載設備操作。 - 了解 BIOS / 系統錯誤 Log,能進行初步分析。 - 硬體故障排除流程:拆解、定位、零件判別與更換。 - 接觸並實際使用之設備類型(至少數項): Digital Power Supply, Oscilloscope, Frequency Counter, Logic Analyzer, E-load, Multimeter, Network Analyzer, Call Box, Chamber, Spectrum Analyzer, IR Camera, Thermal Coupler。 - 基本 Linux 指令與遠端連線(SSH / Serial Console)經驗。 優先考慮 - 伺服器平台(含機架式 / 雲端伺服器)整機測試或系統驗證經驗。 - 基本網路設備設定(Switch VLAN / Link Aggregation / IPMI / PXE Boot)。 - Thermal / Power / Signal Integrity 基本觀念。 - 能獨立規劃並執行任務,適應多工與快速節奏
應徵
10/01
緯穎科技服務股份有限公司電腦及其週邊設備製造業
新北市汐止區經歷不拘大學
You will perform Signal Integrity analysis, collaborating with different engineering teams to balance system/product constraints with high speed signals. 【Job Description】 • Perform pre-layout and post-layout simulation flow. • Create simulation models and develop simulation methodology for SI/PI design. • Stackup review and layer assignment for High speed and PDN • Use simulation and lab data to support design troubleshooting and propose corrective actions, drive failure analysis, root cause efforts, and design of experiments to resolve problems. • Analyze package/PCB PDNs and make design trade-off and negotiate power budgets. • Explore various design elements including different modules, memories, low/high speed buses, cables, components, their physics of operation, and impacts on system performance. • Provide system SI design guidance and perform post-layout review and optimization. • Work closely with EE design team and PCB layout team to optimize SI design based on the simulation data. • Generate simulation report based on the data with clear SI recommendation. 【Minimum Qualifications】 • Must have an MS or PhD in Electrical Engineering or Electrical and Computer Engineering • Proved experiences on board level signal and power integrity. • Board-level system architecture, I/O structures & topologies • Printed Circuit Board (PCB) design and layout process and methodology • Experience with signal integrity modeling tools, including 3D EM modeling (Ansys HFSS) and simulation (Agilent ADS or similar) software • Experience with signal and power integrity analysis tools (ex: HSPICE, Sigrity tools, etc) • Lab hands on experiences on TDR, VNA, BERTscope, digital scopes
應徵