1.Analog and mixed mode circuit layout and verification
2.Co-work with designer for layout floor planning,routing and physical verifications
3.command file maintain
Reporting to MOSFET Development Manager, you will work as Sr. MOS Development Engineer to be responsible for process integration, development and optimization.
About the job:
Work with product designer to create new device structure ideas and develop the necessary Mosfet/ IGBT /Diode technologies
Closely work with internal process experts and external foundry partners to set up the required technologies and processes to produce the prototypes and with test labs to assess results vs. simulations / expected behavior.
Responsible for experimental matrix design to evaluate and optimize design vs. specification.
Co-work with fab engineering teams to generate the final design rule menu and electrical parametric specifications.
Participation in fab selection and evaluation for future foundry locations.
Participate and help the Design Engineers and Product Engineers on reverse engineering analysis when necessary.
Act as the internal expert of semiconductor devices and processes to provide the necessary information and advices to designers on new technologies.
Short term travels for business trips and trainings.
About you:
Knowledge of semiconductor device physics, such as Diode, BJT, MOSFET, and IGBT…etc and understanding of complex interactions between different fabrication processes.
Experiences in semiconductor process development, and basic knowledge in semiconductor device characterization.
Ability of arranging tests with 3rd party labs and comfortable with working in Lab for device characterization.
Good writing/reading/communication in English is a MUST.
The ability to operate independently in a cross-cultural working environment.
Experiences in both conventional Bipolar, CMOS, DMOS processe
Understanding or experiences in power semiconductor devices assembly and applications would be preferred.
Knowledge and experiences of material analysis or Failure analysis tools, such as SRP, SIMS, SEM…etc.
Familiar with mask generation, wafer fab process flow and in-line/PCM specifications.
Knowledge and experience in one or more of the following areas would be a plus, but not must:
o Test pattern generation
o Semiconductor process/device modeling
o Basic assembly & test processes.
【產品範疇】
1.DDI / TP / TDDI/ TCON/ Power等顯示相關產品
【工作內容】
1. SI/PI/EM issue solving, performance optimization, and design rule development
2. Chip/PKG/Board simulation and measurement for SI/PI/EM issue.
3. Co-work with system engineers, IC designers, and customers on product design-in tasks.