「【新鮮人專區】2026研發替代役/預聘-數位設計工程師」的相似工作

順英有限公司為台灣專業的電子測試與系統整合商，服務對象涵蓋國內航太單位與半導體產業領導廠商。產品線包含自製測試整合系統、自製 EGSE 地面支援設備，以及經銷多家國際知名品牌，如 National Instruments、Pico Technology、United Electronic Industries 等。我們專注於高可靠度、高精度的測試自動化應用開發，協助客戶建立穩定高效的量測環境。 1.協助規劃電子、半導體相關測試系統與設備（提供一對一教學） 2.撰寫並整合 LabVIEW、Python 等測試程式（全額補助參加外部專業課程） 3.安裝與維護相關測試系統與儀器設備 4.參與客製化測試方案的規劃與現場技術支援 5.視專案需求，協助業務支援與原廠技術溝通 6.撰寫各類技術文件，如操作手冊、測試報告等 **會LabVIEW、Python、C語言者佳 **有使用DAQ/測試設備經驗者佳 **曾參與過專案整合（機電/自動化/航太/半導體領域尤佳） 月薪保障 NT$42,000 起，實際待遇將依工作經驗與專業能力調整。 我們長期深耕於半導體與航太領域的自動化測試應用，累積了豐富的專案資源與技術實力，歡迎對前瞻科技與測試系統整合充滿熱情的夥伴加入我們的行列，共同參與最先進的測試技術開發與實務應用。

此專區為符合2026年研發替代役及預聘者投遞，如非研替身分者，歡迎投遞創未來其他職缺！ ##職務類別 1. 硬體研發工程師-RF 2. 硬體研發工程師-Power 3. 系統驗證工程師 4. 元件工程師 ##工作內容 1. RF系統電路架構規劃及設計或系統電源電路(AC-DC/DC-DC/保護電路)、數位控制電路(MCU/FPGA)架構規劃及設計、元件電路板設計/繪製/量測/除錯 2. 電路板測試驗證及除錯檢討、環境測試(輻射測試/EMC測試/溫度測試) 3. 執行產品研發流程及技術文件產出 4. 協助系統規劃、整合、測試、分析與除錯 5. 與驗證部門合作進行環境測試 ##技能需求 1. 具電路 RF / Analog / Digital 電路設計經驗 2. 熟悉量測儀器使用，如SA / NA / SG等 3. 具備基礎焊接能力 ##應徵資格 - 2026年畢業之應屆畢業生 - 研究所以上電子/電機/電信相關科系畢業，專長於主動電路設計領域尤佳 - 欲應徵者請檢附成績單、論文摘要

▋ 關於德州儀器 德州儀器(TI)是位居類比晶片世界領導地位的半導體設計與製造公司，持續提供創新及頂尖的半導體技術與產品，協助客戶開發最先進的電子產品。除此之外，TI也針對在校學生及初入社會新鮮人設計完整的培訓制度與挑戰性的工作內容，並提供具競爭力的薪資與福利、完善的升遷管道、輪調培訓計畫以及活潑與國際化的工作環境。 ▋ 應用工程師職務說明 >>在TI做FAE，您可以… • 參與FAE完整培訓計畫，包含1對1 coach、豐富教育訓練資源 • 與全世界專家合作，參與跨國會議及海內外輪調計畫，在國際舞台成長 • 接觸TI多元產品線，包含熟悉的#消費性電子 、時下最夯的#車用電子 ，以及工業用等產品 • 透過專案及團隊合作，快速累積技術硬實力及溝通軟實力 • 享受開放扁平的組織氛圍，不論是專業領域或職涯發展，都能夠勇敢表達 • 走出多元職涯，不論是技術導向的技術專家(technical ladder program) 或是領導團隊的用人主管，TI提供暢通的升遷管道讓您有機會被全世界看見 >>FAE在做什麼 作為“Technical Expertise”，與Technical Sales Engineer併肩合作，了解客戶的技術需求、解決客戶的技術痛點，將TI產品特性與客戶系統需求聯結起來。運用產品選擇、系統、實現和調試方面的技術能力，從而實現業務目標。 • 積極與客戶建立關係，及時掌握客戶開案訊息，進而瞭解其需求與系統設計，推展TI的產品讓客戶的設計更有市場競爭力。 • 透過TI全球技術資源，提供專業技術服務，解決TI產品應用在客戶系統上的技術問題，協助客戶順利導入量產。 • 了解TI系統及產品，並研究同業競爭的狀況，反應客戶需求及市場資訊給研發團隊做為未來產品開發的參考。 ▋ 科技菁英計劃 - TI 應用工程師輪調培訓計畫 有思考過RD之外的另一種職涯可能嗎? 喜歡與人互動並充滿挑戰的工作卻又擔心新鮮人無法立即上手嗎? 別擔心! TI針對FAE新鮮人提供海內外全面且扎實的系列培訓課程， 透過課堂及工作日常的任務的學習，您將具備FAE應具備的各項知識與技能，在客戶面前成為專業與自信的FAE！ 另外，TI亦提供完整的輪調計劃，透過給予新人不同職務內容的學習， 使其能在公司有更多成長及發展的機會。 Business Summary: • New Hire Orientation & Field Sales Office Rotation • Gain basic understanding of TI, our products, the program itself, how to navigate corporate life, and your first taste of sales tools and skills. • Basic understanding of the FAE role, inclusive of relationship building, sales processes, tools and all things relevant to account growth, technical skills, and TI product knowledge • Understand the different roles in the sales office, the customer markets and end equipment, and expectations of a good FAE. Develop an understanding of what makes the various roles successful. • Learn the working models of successful partnerships, and understand the importance of each business process. • Systems Engineering & Marketing rotation • Understand key EE/subsystem design challenges and build collaboration with Sales & BU to support customer and win business • Utilize sales tools and TI.com systems content to become more efficient and effective during Sales process • Understand SEM’s role & responsibility, and how field, BU, and SEM work together to find more and win more 看更多徵才資訊與FAE工作介紹=>https://drive.google.com/file/d/14OG1-iePlNZ8wYJYcnFohLzfBShGg4Th/view?usp=sharing 歡迎至TI職涯官網 https://careers.ti.com/students/ 看更多內容 #R&D外的另一種選擇 #IC Design的另一種選擇 #結合技術及與人溝通 #探索不同產品之技術與應用 #走出多元彈性的職涯 #年薪(含紅利)百萬起跳!

1. Project integration support & implementation, to deliver qualified nestlist from RTL. 2. preSTA/SYN/LEC/postSTA/etc. EDA flow execution and enhancement 3. Timing & power closure 4. Schedule control, netlist optimization, flow coordinator

數位驗證

歡迎2026年畢業並正在找尋研發替代役的同學申請! 職位選擇: Direction 1: Physical Design Engineer Direction 2: ASIC Physical Design Engineer Direction 3: DFX Engineer Direction 4: CAD Tools Development Engineer Direction 5: Design Verification Engineer What you’ll be doing: Key Domains: • Physical and ASIC Design Implementation • Backend and Layout Optimization • Design-for-Excellence (DFX: Test, Manufacturability, Debug) • Development of CAD/EDA Automation Tools • Functional and Formal Design Verification What we need to see: • MS degree from EE/CS or related majors from a prestigious university. • Good knowledge in digital circuit design. • Experience in using Verilog HDL. • Experience in various EDA tools. • Fluent in English reading and writing. • Self-motivated, good team player. Ways to stand out from the crowd: • Proven ability to work independently as well as in a multi-disciplinary group environment • Good command of C/C++ or Verilog programming language. • Familiar with Perl/Python/Tcl/Shell scripting 應徵方式: 請提供以下資料： • 英文個人履歷 • 學士+碩士成績單 (中英文皆可) 提交申請: 請將上述資料投遞至104，符合資格者將會收到進一步的聯繫通知。

歡迎2026年畢業並正在找尋研發替代役的同學申請! Direction 1: System Design Power Validation Engineer Direction 2: PCB Layout Engineer Direction 3: System Application Engineer Direction 4: System Engineer, Enterprise What you'll be doing: • Collaborate with system design, hardware, and power engineering teams to participate in end-to-end design, validation, and optimization of hardware products (such as GPUs, AI accelerators, server platforms, etc.) • Responsible for circuit schematic design and PCB layout using EDA tools (such as Altium, Cadence, Mentor Graphics) for multilayer high-speed board design and optimization • Perform PCB design reviews, assist in resolving signal integrity, power integrity, EMI/EMC issues to improve design quality and manufacturability • Participate in board bring-up, debugging, power testing, and performance validation of hardware prototypes, helping to ensure optimal power efficiency under varying operating conditions • Write and maintain design, validation, and test documentation, including but not limited to design specifications, validation reports, and test plans • Work closely with cross-functional teams to continuously improve design processes and enhance product innovation and competitiveness What we need to see: • Hold a Master of Science/Ph.D in Electrical Engineering or related field • Familiar with circuit schematic design and PCB layout processes, and basic proficiency with EDA tools (such as Altium, Cadence Allegro/OrCAD, Mentor PADS, etc.) • Strong interest in power management, DC-DC converters, signal integrity, and high-speed digital design is a plus • Good debugging, analysis, and problem-solving skills; able to work independently or within a team to resolve design and validation challenges • Good command of English for reading technical documentation and communication • Proactive, eager to learn, and passionate about the latest electronics and AI hardware technologies 應徵方式: 請提供以下資料： • 英文個人履歷 • 學士+碩士成績單 (中英文皆可) 提交申請: 請將上述資料投遞至104，符合資格者將會收到進一步的聯繫通知。

▋ 關於德州儀器 德州儀器(TI)是位居類比晶片世界領導地位的半導體設計與製造公司，持續提供創新及頂尖的半導體技術與產品，協助客戶開發最先進的電子產品。除此之外，TI也針對在校學生及初入社會新鮮人設計完整的培訓制度與挑戰性的工作內容，並提供具競爭力的薪資與福利、完善的升遷管、輪調培訓計畫以及活潑與國際化的工作環境。 ▋科技菁英計劃 - TI 應用工程師輪調培訓計畫 有思考過RD、IC設計之外的另一種職涯可能嗎? 喜歡與人互動並充滿挑戰的工作卻又擔心新鮮人無法立即上手嗎? 別擔心! TI針對FAE新鮮人提供海內外全面且扎實的系列培訓課程， 透過課堂及工作日常的任務的學習，您將具備FAE應具備的各項知識與技能，在客戶面前成為專業與自信的FAE！ 另外，TI亦提供完整的輪調計劃，透過給予新人不同職務內容的學習， 使其能在公司有更多成長及發展的機會。 ▋ 應用工程師職務說明 >>在TI做FAE，您可以… • 參與FAE完整培訓計畫，包含1對1 coach、豐富教育訓練資源 • 與全世界技術專家合作，參與跨國會議及海內外輪調計畫，在國際舞台成長 • 接觸TI多元產品線，包含熟悉的#消費性電子、時下最夯的#車用電子 ，以及工業用等產品，共超過8萬顆產品，學無止境！ • 透過專案及團隊合作，快速累積技術硬實力及溝通軟實力 • 享受開放扁平的組織氛圍，不論是專業領域或職涯發展，都能夠勇敢表達 • 走出多元職涯，不論是技術導向的技術專家(technical ladder program) 或是領導團隊的用人主管，TI提供暢通的升遷管道讓您有機會被全世界看見 >>FAE在做什麼 作為“Technical Expert”，與Technical Sales Engineer併肩合作，了解客戶的技術需求、解決客戶的技術痛點，將TI產品特性與客戶系統需求聯結起來。運用產品選擇、系統、實現和調試方面的技術能力，從而實現業務目標。 • 積極與客戶建立關係，及時掌握客戶開案訊息，進而瞭解其需求與系統設計，推展TI的產品讓客戶的設計更有市場競爭力。 • 透過TI全球技術資源，提供專業技術服務，解決TI產品應用在客戶系統上的技術問題，協助客戶順利導入量產。 • 了解TI系統及產品，並研究同業競爭的狀況，反應客戶需求及市場資訊給研發團隊做為未來產品開發的參考。 看更多徵才資訊與FAE工作介紹=> https://www.facebook.com/texasinstrumentsTW/videos/1382188632429211 歡迎至https://www.cakeresume.com/resources/texas-instruments?locale=zh-TW 看更多內容 #R&D外的另一種選擇 #IC Design的另一種選擇 #結合技術及與人溝通 #探索不同產品之技術與應用 #走出多元彈性的職涯 #年薪(含紅利)百萬起跳 ▋ 面試準備: • Phone interview: 1. 對德州儀器及此職務的了解: o 針對德州儀器的業務範圍或是德州儀器在台灣的業務發展 2. 投遞動機 o 針對此職務為什麼想要投遞 o 對職務的了解程度 o 未來工作發展方向 • 第一關面試準備: 1. 英文自我介紹 2. 簡報(碩論題目或是DC/Amplifier介紹) • 第二關面試準備: 1. 針對工作內容了解 2. 職涯發展方向 3. 情境考題

按讚並追蹤"台達Delta Career"FB粉絲專頁，讓您更快掌握台達職缺脈動！ https://www.facebook.com/deltacareer 主要職責： 1. 開發電力系統硬體及參數設置。 2. 規劃執行硬體電路設計。 3. 電力系統驗證、測試及修改。 4. 負責客戶規格確認及說明。 5. 研究電力系統國際規範。

1. 光通訊產品相關高速介面數位設計 (112G PAM4 SerDes) 2. 依據系統規格, 執行架構設計以及撰寫硬體描述語言 (RTL) 3. 具有高速介面, 低功耗, 以及D/A混合電路設計經驗者尤佳

1.通訊系統軟體維護 2.通訊協議軟體設計

Ethernet Switch 晶片設計及開發

1.熟悉數位電路設計及驗證流程 2.熟悉PC架構以及周邊電路設計者尤佳 3.具FPGA經驗 4.Low Power 電路設計 5.溝通能力佳,和其他團隊互動良好

NVIDIA's invention of the GPU 1999 fueled the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI— the next era of computing — with the GPU acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. Today, we are increasingly known as “the AI computing company". We are looking to grow our company, and grow with the most talent in the world! We are looking for a Structural Test Engineer to be part of our Manufacturing Test Team. You will be building next-generation boards and systems, work closely with cross functional teams and suppliers to drive Functional Test HW solution. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. The ideal candidate will drive the scope of structural test plan on baseboards/systems with cross functional teams, review design concept, define validation plan, develop/automate configurations of test infrastructure to test various product features, and optimize test cost/quality/manufacturability. The candidate will be responsible for the development and implementation of structural test plan since EVT build to find SMT, PCB, and component issues earlier to catch and fix rather than finding them later at following stations which will complicate and delay the debug time. You will work closely with PCB designers, tester vendors, fixture houses and CMs to enable the process. What you will be doing: - Define ICT capability, HW design requirements, and board debug capabilities from design review phase, NPI bring-up to mass production phase. - Optimize the structural test plan to find SMT, PCB, and component issues earlier. - Develop Data Science – machine learning of structural tests thru data feed forward and backward. - Work with board designers, layout engineers, tester vendors, and fixture houses by providing detailed DFM and guidance to meet ICT requirements. - Provide support for production bring-up and debugging. - Support new tester platform bring-up in Taiwan. (ICT, BSI, FCT universal tester, etc.). - Coordinate test fixtures/platform automation with suppliers, CMs, and global team. - Define and provide procedure/document and technical support if needed.

歡迎2026年畢業並正在找尋研發替代役的同學申請! 職位選擇: Direction 1: Mixed Signal Design Engineer Direction 2: Mixed Signal Analog Circuit Designer What you’ll be doing: • Develop and implement high speed interfaces and analog circuits. You will have hands on experience taking innovative integrated circuit designs at data rates of 25Gbps and higher from concept through silicon characterization. • Help by defining circuit requirements and complete design from schematic, layout, and verification to characterization. • Conduct schematic design of deep-submicron CMOS technologies using Spectre, Hspice or like. • Take ownership for the architecture, transistor design and verification using industry standard EDA tools such as Cadence virtuoso. • Optimize circuit to meet the specifications for system performance. • Work closely with layout engineers by providing detailed floorplan and guidance for matching and high-speed routings. • Provide support for post-silicon bring-up and debugging. What we need to see: • Hold a Master of Science/Ph.D in Electrical Engineering, Computer Engineering or related field with strong analog design background • CMOS Analog / Mixed Signal Circuit Design Experience in deep sub-micron process (especially in FINFET) • Experience with design and verification tools (Cadence's IC design environment, analog circuit simulation tools like Spectre, HSpice, Finesim, XA) • Experience in crafting test bench environments for component and top level circuit verification • Behavioral modeling of analog and digital circuits • Strong debugging and analytical skills • Analog simulation for noise analysis, loop stability analysis, ac/dc/tran analysis, monte-carlo, etc. • Strong interpersonal skills and ability & desire to work as a great teammate are huge plus. 應徵方式: 請提供以下資料： • 英文個人履歷 • 學士+碩士成績單 (中英文皆可) 提交申請: 請將上述資料投遞至104，符合資格者將會收到進一步的聯繫通知。

影像應用或訊號處理 IC 研發。 1.研究所電子、電機、資訊等相關系所畢。 2.修過Verilog/VHDL相關課程,或具FPGA design flow 經驗。 3.對數位影像、訊號、音訊處理興趣。 4.邏輯思考能力強、主動溝通、喜好腦力激盪與團隊合作者。

#R&D外的另一種選擇 #ICDesign的另一種選擇 #結合技術跟與人溝通的工作 #洞察市場商機 #規劃銷售策略 ▋2026暑期實習計畫介紹 在德州儀器Texas Instruments實習的期間，將有專屬學長姐帶領您，體驗快速變動的跨國際工作環境，獲得充足的專業訓練、貼近實務工作的專案實務經驗，並能享用公司各式線上資源，享受與正職員工同等的優渥的福利待遇，並能優先獲得畢業轉正職的預聘機會，畢業立刻就業！ 您可以說「在TI，你所做的不只是一份工作，而是在參與改寫人類科技及生活方式的發展史」；加入TI，你有機會與全世界的菁英互動，TI更是你展現獨特智慧與潛能的最佳平台。 ▋實習期間及實習地點 -實習期間：2026年07月至2025年08月 -實習地點：台北松山業務辦公室 ▋技術行銷工程師實習職務說明 • 透過TI海內外跨部門的合作，進而了解產品從設計，開發，量產，行銷，訂價，供貨的整個生命週期，並發展年度商業成長計畫 • 透過競品分析，進而了解TI市場戰略優勢,　與客戶建立策略性的關係. • 了解TI系統及產品，反應客戶需求及市場資訊給研發暨行銷團隊做為未來產品開發或訂價的參考 • Define the opportunity at each of your accounts, including understanding the complete list of customer projects, content opportunities, and decision-makers • Understand your numbers, including baseline vs. new project revenue (NPR) at each customer; have your numbers grounded in project plans • Find and kick off all your projects at customers proactively; find projects early • Create action plans to maximize TI content at each account and on each customer project; follow-up once projects are in production with a closed-loop BOM (Bill of Materials) process • Be able to maximize TI revenue through understanding of supply chains, revenue tracking and competitor displacement opportunities • Leverage all the available sales tools, customer intelligence, and resources to properly analyze, prioritize, and disposition activity into opportunities

## 職務說明 - 應用於無人機雷達系統 - 數位IP架構設計與實作。 - 透過MATLAB/C++協助數位IP驗證 - 透過FPGA整合與驗證。 ## 技能要求 - 具備數位訊號處理經驗 - 具備數位電路設計經驗 - 程式語言必要：Verilog/VHDL, TCL, ##加分條件： - 具備雷達/通訊訊號處理、數位設計架構 - 具備RF/Analog 知識與RF/Analog校準設計 - 程式語言: MATLAB, python, c, c++, Chisel3

具備替代役男資格 對程式開發有高度熱忱

Responsible for digital IP coding and micro-architecture design of low-power, high-performance LLM inference accelerators. Drive mapping of lightweight frameworks such as llama.cpp onto NPU, plan compute/memory subsystems, and optimize quantization & KV-cache for production-ready LLM SoCs. Write RTL specs and guide DV plans and P&R convergence for PPA targets. 1. 研讀規格。 2. IC數位邏輯線線路的研發設計。 3. IC數位邏輯線路模擬與合成。 4. FPGA的合成規劃與測試驗證。 5. IC的靜態時序分析 (Static Timing Analysis)。 6. IC佈局後的線路模擬。 7. 撰寫IC規格設計書。 8. IC的除錯與工程變更修改。 9. 協助系統應用部門的進行IC驗證版的規劃。

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 30 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. We are now looking for VLSI Physical Design (CAD) Engineers. What you’ll be doing: - Develop inhouse tools and solutions - Responsible for flow automation, quality control and performance improvement of NVIDIA VLSI Physical Design flow - Work with EDA vendors on tools evaluation and improvement What we need to see: - MS/PhD in CS/EE - Proficient user of C/C++/Python/Perl is preferred Ways to stand out from the crowd: - Basic knowledge of device model, processing technology, timing, noise and power in chip design - With analytical ability on placement, routing, timing, clock, power, noise and DFM - Experience on Mathematical algorithm and data structure for VLSI CAD - Hands-on background in EDA software from Synopsys (DC/ICC2/STAR-RC/PT/ICV), Cadence (Genus/Innovus/Quantus/Tempus/PVS), ANSYS (Seahawk/Redhawk) etc is a plus - Hands-on experiences in DL/ML projects/programs is a plus