「Mixed-signal 類比IC設計工程師」的相似工作

1.SRAM, ROM 電路設計 2.記憶體相關 IP 性能、良率提升 3.先進製程SRAM電路設計開發、驗證 擅長工具: HSPICE, Virtuoso 和 Laker等類比IC設計相關工具。 工作技能: 1.基本的CMOS元件與邏輯設計相關知識 2.熟悉類比IC電路設計流程與相關工具 3.具有基本的 Python程式語言能力佳 4.具有基本的 Verilog 能力佳

1. 觸控IC、TDDI或指紋辨識 IC 開發經驗 2. ADC或sensor IP 開發經驗 3. TFT-LCD或OLED Display driver IC 開發經驗 4. Charge pump、LDO、Source driver、Gate driver、High speed interface、OSC、BGR 相關開發經驗 5. 工作地點：【台南、新竹、台北】 以上其中任何一項相關者佳。

Digital IC design engineer - Familiar with Verilog RTL coding - Familiar with digital design flow (pre-layout simulation, timing constraint, synthesis, post-layout simulation) - Will be working on high speed Serdes IPs - Experience or interest in all-digital PLLs or clock-data recovery circuits is a big plus

【成為円星人】 円星科技由一群專業與充滿熱情的夥伴創立於2011年，為積體電路矽智財設計服務業之新秀，秉持著『成為半導體業最值得信賴之IP公司』的願景，追求永續經營與成長。 誠摯歡迎您成為円星人，加入我們，站上國際舞台！ 一起共同打拚，以精品文化之精神，創造價值，追求卓越！ 【職務簡介】 M31主要業務為向 IC 設計業者和晶圓代工廠授權 IP，此職務為負責高速介面 IP（High Speed Interface IP）, 包含USB. PCIE, MIPI MPHY, CPHY, DPHY等SERDES IP和類比 IP（Analog IP）, 包含ADC, DAC, PLL, PVT sensor的類比IC設計工程師職缺。 【將負責的工作內容】 1. Mixed-Signal & Analog Circuits Design (LDO, OPA, Bandgap, ADC/DAC, etc) 2. High Speed Interface Analog Design (TX, RX, etc) 3. Clocking related：PLL/CDR 【條件與特質】 1. 有類比IC設計工程師相關工作經歷3年以上 2. 電機電子/資訊工程碩士畢業 如果您有以上相關經驗且對此職缺有興趣，歡迎投遞您的履歷！

【產品線描述】 1. LCD Power IC 2. 手機及穿載 Power IC 3. USB Type C Power delivery (MCU開發驗證經驗，相容性驗證) 【工作說明】 1. 面板及手機應用的電源管理, 背光驅動晶片開發 2. 需求條件: 2-1. 可獨立完成Buck, Boost, Buck-Boost 等DC/DC電路設計 2-2. 可獨立完成Charge Pump, LDO, OP等類比電路設計 2-3. 熟悉Battery Charger, Battery Protector尤佳 2-4. 熟悉ADC(Sigma-Delta, SAR), PLL尤佳 【共創A+聯詠】 穩健踏實、專家精神、創造優勢 驅動科技、開發創新、引領未來 邀請優秀人才，共創A+聯詠

Job Description: As a team member of analog product business group, this role will support Analog IC circuit design of mixed-signal ICs, such as sensors, motor drivers, data converters. Key Responsibilities: 1. Co-work with talented design teams to develop high performance sensor related integrated circuits and products, such as Hall effect sensor, temperature sensor. 2. Contribute to chip architecture and circuit design decisions 3. Collaborate with validation, product engineering and test engineering teams to enable successful transfer to production 4. Also, will be responsible for circuit requirements definition, design, simulation and analysis, layout/test support, documentation and customer support for sensor applications. Qualifications: 1. Demonstrate strong analytical and problem-solving skills 2. Strong time management skills that enable on-time project delivery 3. In depth working experience with Cadence composer and Virtuoso, Spectre, HSpice and mixed-signal design flow. 4. Experience in lab measurement and equipment. 5. Self-starter. Passionate about creative work. Good communication skills and team player. Able to take the initiative and drive for results.

1. Main responsibility is to design analog IPs in MCU such as adc/dac, pll, osc, por, ldo 2. 具備DC-DC Converter, Buck相關電路設計 2. Responsible for analog IP design, verification plan, test plan, document 3. Communicate with system, layout and digital engineer to ensure high quality --------------------------------------------------------------------------------------- 雅特力科技創立於2016年，為智原科技子公司。 【Artery雅特力】即將在台上市的IC設計公司，主要產品為32bit ARM core base MCU 公司網址：https://www.arterychip.com 關於雅特力：https://www.104.com.tw/company/1a2x6blojm

1. MSEE is required. 2. Solid background in analog integrated circuits. 3. Knowledge of high speed serial link technology. 4. Familiar with SerDes PHY (USB, PCIE Express, SATA and Thunderbolt) and building block (DFE, CTLE, CDR, PLL and FFE transmitter). 5. Experience in design and simulation high speed transceiver is a plus.

1.LPDDR4/DDR4/DDR3 Mixed signal SERDES/PLL相關開發工作 2.Mixed signal SERDES RTL behavior analysis and implement,熟悉HSPICE 並具備 std cell design flow基礎佳

【產品範疇】 1.Touch panel controller 2.TDDI 【工作內容】 1.Analog front-end design 2.ADC design 3.Switched-capacitor circuit design 4.負責layout floorplan規劃，與layout工程師合作完成相關驗證 【需求條件】 1.Device physics knowledge applied to analog IC design 2.Familiar with analog IC design flow 3.Familiar with Hspice or Spectre

1. High speed ADC/DAC design(具備Ethernet PHY RX/TX 設計經驗佳) 2. ADC/DAC IP test 3. Familiar with behavior model simulation

5G手機,AR,VR 顯示技術,AI 人機介面的3D觸控顯示技術,整合生物特徵的全面屏顯示技術。 【工作說明】 1. 高速介面的電路評估,規劃,設計與驗證. 2. 低功耗,高速的SRAM電路評估,規劃,設計與驗證. 3. 高精度,低溫漂的時脈電路評估規劃,設計與驗證. 4. 低功耗,快速嚮應的regulator 電路評估,規劃,設計與驗證. 5. 非揮發性記憶體電路評估,規劃,設計與驗證. 6. 高效率 DC/DC circuit design評估,規劃,設計與驗證. 7. 低功耗,低偏移的OPAMP電路評估,規劃,設計與驗證. 8. 低雜訊的DAC/ADC電路評估,規劃,設計與驗證. 【必要條件】 研究所以上相關科系畢業 熟悉類比電路設計,混合信號處理, 對類比電路設計充滿熱忱者

1. MSEE is required. 2. Solid background in analog integrated circuits. 3. Knowledge of high speed serial link technology. 4. Familiar with SerDes PHY (USB, PCIE Express, SATA and Thunderbolt) and building block (DFE, CTLE, CDR, PLL and FFE transmitter). 5. Experience in design and simulation high speed transceiver is a plus.

1.顯示類比電路設計與整合(whole chip integration) 2.顯示類比電路設計，如: Bandgap, Charg pump, LDO, Gamma, Source driver, GOA

【產品線說明】 高速傳輸、USB4.0、Thunderbolt、DisplayPort電路設計 (Serdes, CTLE, CDR, PLL, DLL, RX, TX) 【工作內容】 1. CDR architecture design (1/N-rate, DLL-based, PLL-based, PI-based) 2. Adaptive CTLE/DFE 3. High-speed transmitter with FFE 4. Oscillator design (Ring-based, LC-based) 5. T-coil impedance matching design 6. Circuit calibration techniques & flow 7. System behavior modeling 8. SI/PI analysis

• 進行類比/混合訊號電路模擬(Spice, Spectre...) • 指導及協助Layout規劃佈局 • 撰寫設計、測試規格文件與書寫模擬報告 • 與測試工程師合作測試、驗證、Debug IC • Perform analog/mixed-signal circuit simulations (Spice, Spectre, etc.) • Provide guidance and assistance with layout planning • Write design and test specification documents and simulation reports • Collaborate with test engineers to test, verify, and debug ICs

Hands-on experience in the design and development of at least one of the following analog circuits: ADC, DAC, PGA, high-speed analog driver, PLL, or SerDes.

Key responsibilities for the role include: • Design of high-performance wireline and analog circuits • Develop power, performance, and area optimal topologies • Co-work with layout, digital, and system teams for optimal design • Discussions and presentations with clients Qualifications: • Minimum of a Masters or PhD in Electrical Engineering • Deep knowledge and experience designing a subset of SerDes building blocks: ADC, DAC, LC-Oscillators, PLL, CDR, CTLE, DFE • High-speed circuit design (>10GS/s) experience a significant asset • Multiple designs taped out, ideally in wireline projects • Experience working with Cadence tool flow • Experience with circuit layout and floor planning • Matlab/Simulink, Python experience • Comfortable with scripting and programming • Excellent communication and presentation skills • Strong team player 歡迎身心障礙者應徵

1. SRAM library characterization flow. 2. SRAM library maintaining. 3. Develop and maintain automation flows for analog IC design.

We are currently seeking a talented Analog Design Engineer to join our team and participate in the development of Power IC for High-Performance Computing (HPC). The role will primarily involve working on the design and development of the following components: 1. PMIC (Power Management Integrated Circuit) 2. Multiphase VR (Voltage Regulator) 3. Buck/Boost/Buck-Boost Converters 4. eFuse (Electronic Fuse)

1. 具有類比IC設計經驗或相關科系/所畢業 2. Familiar with High-Speed Transceiver Designs, CDR/PLL, ADC/DAC, Delta-Sigma Modultors, DC-DC Converters, or Linear Regulators. 3. USB, DP, HDMI, PCIe or SATA experience is a plus.