「Signal Integrity Engineer(TDC)」的相似工作

THE ROLE The Lead Signal Integrity Engineer is a technical leader responsible for advancing Isola’s laminate materials to meet and exceed high-speed electrical and signal integrity (SI) performance requirements. This role provides mentorship and direction to the Signal Integrity team in Taiwan, drives innovation in SI test methodologies, and ensures strong technical engagement with global OEMs. The Lead serves as a recognized authority in SI, bridging customer needs with material performance and representing Isola in the high-performance electronics community. KEY RESPONSIBILITIES: Customer-Facing Technical Support: • Lead technical engagement with OEMs and direct customers on high-speed laminate characterization. • Act as primary technical contact for SI-related design validation and adoption cycles. • Oversee the creation of technical reports, white papers, and collateral for internal and external use. Strategic & Technical Leadership: • Define and develop advanced SI measurement, modeling, and simulation methodologies. • Collaborate with Product Management, R&D, and Sales to ensure alignment of SI capabilities with product strategy. • Represent Isola as a thought leader through publications, conferences, and industry forums. Organizational Management: • Mentor, guide, and grow the Taiwan-based Signal Integrity Engineering team. • Establish scalable, cost-effective SI test methods that accelerate R&D and customer response. • Drive alignment with global Application Engineering teams to ensure best-in-class technical service. Technology & Standards Thought Leadership: • Maintain expertise in SI methods, PCB processing effects, and high-speed digital design requirements. • Contribute to industry standards development and support customer forums on SI requirements. QUALIFICATIONS & EXPERIENCE • 8+ years of experience in signal integrity engineering, PCB laminates, or high-speed design. • Expertise in VNA measurements, probing techniques, and advanced SI methodologies. • Experience with PCB manufacturing and processing effects on SI performance. • Demonstrated leadership and mentoring experience. • Proven record of technical publications, white papers, or conference presentations. EDUCATION • PhD or Master’s in Electrical Engineering or related field required. OTHER CONSIDERATIONS • Fluent in English – required for global communication and technical documentation. • Proficiency in Mandarin Chinese – strongly preferred for engagement with Taiwan/China teams and customers. • Ability to travel regionally and globally as needed.

• As a senior SI engineer you will lead the SI team to work with our customers, internal product development, product marketing, and sales teams. • Provide technical support to sales team for ACS high speed products and help customers to solve their interconnect challenges. • Assist in developing strategies to distinguish our products and solutions from those of our competitors. • Provide guidance and training to junior team members to enable them to effectively handle channel simulation across PCIe and Ethernet BUS, as well as optimize customers’ PCB layouts within the system budget. • Develop SI strategies for customer pinouts and routing challenges. • Design and evaluate next generation production test platforms. • Design, build, and measure circuit boards for measurement and verification of products. • Conduct research on the latest specifications of the committee's next-generation platform and provide integrated solutions for customers.

工作內容 1. 負責Ansys SIwave/HFSS/Q3D 等高頻軟體技術支援，包含售前/售後支援、教育訓練 2. 拜訪客戶介紹、推廣軟體以及解決方案 3. 與原廠技術團隊對接，協助溝通/解決客戶問題、學習軟體新功能 4. 高頻相關工程專案規劃與執行 5. 支援公司市場行銷活動 ---------------------------------------------------- 本公司具備Ansys產品專業技術人員，擁有廣大的技術資源供學習， 市場遍及台灣、中國及東協等地。 我們不斷地開拓新技術及市場，誠摯希望有志一同的你加入~ 歡迎光學、電磁學、電子電路、電磁干擾、光波導、矽光子各領域專家加入我們的團隊!! 思渤科技培養的不只只針對工作需求的專業工程技術人才， 更是培養技術人才自身技術品牌的職涯延伸， 讓你不單只是單一技術在此發展， 而是廣闊長遠的打造出個人技術品牌知名度， 讓你在專業領域中與更多佼佼者一起發光發亮!! ｜遠距辦公。節省通勤成本。溝通不斷線｜ ☆業務試用期三個月通過後，即可申請遠距辦公方式！ ☆每週只需進公司辦公一天，剩下四天靈活運用外勤出差或在家辦公，節省塞車通勤時間，線上溝通快速不斷線。 ｜舒適好開公務車。公務拜訪便利又安全｜ ☆提供三年內新車預約公務拜訪使用，安全又舒適。 ☆不需自己養車，找車位，公司定期保養管理，外勤無負擔。 ｜薪獎優渥。輕鬆get百萬年薪！｜ ☆業績獎金 ☆盈餘獎金 ☆年終獎金 ☆中秋、端午獎金 ☆配發公務機 ☆結婚禮金/生育津貼 ☆推薦人才獎金 ☆近3年平均調薪幅度3~5%

1. 針對高速介面進行信號完整性模擬。 SI simulation : TDR, S parameter,Eye diagram,Crosstalk.. 2. 電路板電源完整性模擬。 PI simulation : IR Drop , PDN.. 3. 對於佈局圖給予改良建議。 Polar應用及評估PCB & VNA材料選擇方式 4. 信號完整性異常除錯。

a. SI訊號/PI電源完整性模擬分析 (Pre-Layout & Post-Layout) b. PCB/Layout設計建議與Guideline制定 c. SI/PI/EMI新技術專研與導入

1.與系統設計人員溝通討論各項高頻參數規格 2.針對連接器高頻與機構需求提出設計建議 3.設計並驗收連接器之高頻測試治具與PCB 4.能進行高頻分析，進行實測並能將兩者match 5.針對客戶PCB設計提出建議layout與debug

The Lead Engineer job is to design and development of Power connector and Cable. • 8 years above connector/cable design working experience. Your job is to provide power solutions to data center, telecom, industrial, and automotive customers. Work closely with key customers and management to develop custom products. • Create drawing, specification documents required to define and build products: drawings, material specifications, bills of materials and manufacturing processes. Work with cross-functional, multi-site teams to develop solutions. • Provide technical support to Sales and marketing personnel including technical training, presentations and customer visits. • Coordinate, analyze and assess testing and qualifications in order to insure product conformity with specifications. Assess the quality and functionality of prototypes and samples for customer use and adherence to performance standards. • Provide support to manufacturing facilities on cost down, quality, customer issues. • Stay abreast of technological developments in the connector and interconnection industries. • Apply patent request when applicable in order to protect intellectual property.

【產品範疇】 1.DDI / TP / TDDI/ TCON/ Power等顯示相關產品 【工作內容】 1. SI/PI/EM issue solving, performance optimization, and design rule development 2. Chip/PKG/Board simulation and measurement for SI/PI/EM issue. 3. Co-work with system engineers, IC designers, and customers on product design-in tasks.

1.SI/PI量測與模分析 2.網路分析儀與探針平台操作 3.量測與模擬數彙整 4.機台操作：網路分析儀 5.專業知識需求：電磁學、微波工程、SI/PI理論分析

1.連接器、測試板高頻產品訊號量測 2.分析SI訊號完整性與提升改善 3.具連接器相關經驗者佳

該職務隸屬於LOTES嘉澤端子研發中心，為長期外派RD職缺! Job responsibilities: 1. 與產品設計人員溝通討論各項高頻參數規格。 2. 針對產品高頻與機構需求提出設計建議。 3. 設計並驗收產品之高頻測試治具。 4. 進行高頻高速信號測量與模擬。 5. 與其他研發團隊協作，提供高頻領域的技術支援和解決方案。

1.類比訊號分析及電路設計。 2.小信號低雜訊放大線路的設計、模擬、量測及驗證。 3.熟悉OPAMP, Filter, ADC/DAC,… 規格, 性能特性及應用。 4.電子電路硬體的設計、驗證，失效分析和故障排除 5.萬潤熱烈招募有意投入設備產業的菁英，如未具備本項職缺所需相關技能與工作資歷者 亦歡迎投遞，薪資另議。 6.上班地點 新竹：新竹市工業東四路24-2號2樓 /新竹縣竹北市保泰三路 78 號 台中：台中市西屯區工業區37路18號 高雄：高雄市路竹區路科十路1號

The Product Design Engineer for overpass solutions is mainly focusing on developing high speed cable solutions for front IO, near chip and Co-package chip applications. This position will highly engage with customer in early design stage, providing technical expertise on mechanical, cable route, and application hardware. Role and Responsibilities - Work closely with customer and their contract manufacturers to understand their design requirements, evaluate the challenging, and provide full workable interconnection solutions including connector interference, connector fitting structural, cable management, and application hardware. - Mechanical design and concepting in 3D model:  Front IO cage overpass solution.  Custom design for cage mechanism.  Work with thermal engineer to optimize thermal solution for customer.  Near chip overpass solutions:  Provide technical guidance to customer on product selection.  Design for different pairs configuration, connector fitting mechanism, cable output and management, and application hardware if needed.  Co-package copper overpass solutions:  Work with customer to complete the design that our connector can fit into customer’s package, including optimize connector layout in substrate, alignment feature and fitting mechanism, application hardware. - Verify if the design if it meets design objectives by varies engineering tools such as tolerance analysis, FEA, failure mode effect analysis… - Create complete cable assembly drawing including two ends solutions, wiring chart, cable pre-bending geometry(if needed). - Work with cross function team(mechanical, signal integrity, manufacturing) to ensure the design can be transited to mass production. - Create test plan and strategy for product in NPI status to verify the reliability, robustness in application before shipment.

• Interact / Interface w/Amphenol Commercial and High-Speed BU teams on material supply, buffer inventory, manage aging inventory, etc. requirements. • Interface/communicate via e-mails, F2F, phone conversations with key account customer on expedites, COS, part number shipment details, RFQ activities. • Integrate with Sales and BU Product Managers on key Design opportunities. • Integration w/Direct and ODM account teams on key metrics that will deliver growth. • Develop a successful Business Continuity Plan. • Integrate with all BUs to develop an annual cost down plan. • Support Business Management Meetings (QBR), and strategic annual business plans. • Integration with all Bus on key metrics • Market share monitor w/BU and Sales team • Align businesses to deliver customer forecasts. • Integrate and manage PCNs internally and externally w/customers • Manage customers’ Key Initiatives by working with Sales/FAE and BU’s. • Integrate with Amphenol’s BU team to support RBA, Resilinc, plant quals., etc

我們正在尋找一位經驗豐富的射頻工程師加入我們的團隊，主要負責高頻結構的設計與分析，並具備優異的專業模擬能力。 職務要求 •RF性能測試與分析: 使用儀器（如網路分析儀、頻譜分析儀）進行RF模組的性能測試與數據分析 •HFSS 模擬專長： 具備使用 Ansys HFSS 進行反射面天線、導波管、OMT (Orthomode Transducer) 與旋轉接頭等高頻元件的建模與全波模擬經驗。 •高頻結構設計與分析： 熟悉高頻結構分析與優化，能針對性能目標進行合理的技術取捨（如反射面、導波管、OMT、旋轉接頭）。 •天線設計：天線設計與優化RF天線，提高通信性能，使用專業模擬軟體進行測試並調整天線形狀和尺寸。 •.微波元件設計、量測及生產導入、微波元件專案開發，實驗製作。 • RF線路除錯： 負責RF路徑信號質量分析，進行阻抗匹配與雜訊隔離，解決性能問題以確保穩定性。 • 性能優化： 設計匹配網路以提高傳輸效率，隔離雜訊，並定期評估與優化RF系統性能，推動持續改進。 •模擬驗證與優化： 能夠驗證模擬結果與實際量測數據，並針對差異進行技術評估與設計調整。 •技術報告與審查： 具備撰寫技術報告的能力，並能參與設計審查，確保模擬結果與產品性能要求一致。 •跨部門溝通與專案管理: 與硬體、機構、韌體、測試等部門協作，推動RF相關專案進度。

PRIMARY JOB DESCRIPTION: • Responsible for performing signal integrity and power integrity simulation analyzing DIMM products in different form factors. • Work with layout team and NPI team for achieving good board routing and releasing to production • Will interface with SMART global design teams PRINCIPAL DUTIES AND RESPONSIBILITIES: • Perform channel margin analysis to provide design tradeoffs among package, board, and connector on products starting from the technical specifications from different controller and NAND flash vendors in different form factors • Perform PCB timing analysis, work with layout designers and hardware engineers to implement all signal integrity rules • Perform PCB power margin analysis, work with layout designers and hardware engineers to implement all power integrity rules • Develop layout signal/power integrity rules guideline or document on new products starting from the technical specifications from different DRAM vendors in different form factors • Capability to execute trouble shooting and provide workable solution to SMART global R&D teams and customers • Communicate and work closely with global R&D teams to achieve targeted schedule for PCB board release • Write a Layout guidance document. Organize and research technical reports and share

1. 進行訊號完整性與電源完整性(SI/PI) 模擬與優化分析 2. 執行SI實體卡測試量測與結果分析 3. 完成其他主管交辦事項

About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to the next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you’ll heighten your potential and broaden your horizons, all while shaping the future of connectivity. Responsibilities - Perform electrical validation of high-speed interfaces such as PCIe Gen3~Gen5, Ethernet (802.3 10G/25G/100G/400G), DDR4/5, SATA, and USB3 - Perform electrical validation of low-speed interface, including I2C, SPI, MDIO, eMMC, and RGMII. - Perform chip-to-chip SerDes signal validation, including SGMII+, UXSGMII interfaces. - Plan and execute power testing strategies for multiphase power stages and DC buck converters. - Perform power integrity validations, including ripple noise analysis, power sequencing verification, electronic load (E-load) operation, and power supply unit (PSU) evaluation. - Develop and execute test scripts under Linux environments, familiar with shell commands and automation scripting. - Collaborate with the HW team and chip vendor to define and document SI/PI validation plans and requirements. - Analyze and identify SI/PI issues, and work closely with HW, FW, layout teams, and chip vendors to develop improvement solutions that enhance electrical performance and signal integrity quality. Requirement - Solid experience with SI test equipment (oscilloscope, BERT, VNA, TDR). - 3+ years of hands-on experience in Signal Integrity, and SerDes/PCIe/USB/DDR validation. - Solid understanding of compliance testing methodologies, eye diagram, and litter analysis. - Strong understanding of low-speed interface protocols and comprehensive experience in AC/DC characteristic validation. - Bachelor’s/Master’s degree in Electrical Engineering, Electronics, or related fields. - Excellent problem-solving skills, ability to debug SI/PI issues, and strong cross-functional communication with HW design and layout teams. Preferred Qualifications - Experience working on system-level signal validation in server, networking, or storage platforms with high-speed interfaces. - Familiarity with Power Integrity validation, including power sequence, ripple noise, OCP, and SCP testing. Benefits - International work environment and collaboration with global development teams - Excellent work conditions - Competitive package: great pay, perks, and benefits - Group insurance and health coverage - Flexible working hours and patterns - Complimentary drinks and snacks at the office

1. Performing DC IR drop and AC impedance simulation. 2. Improve simulation/validation efficiency and performance by automation. 3. Execute SI/PI/RF/EMI verification for the system requirements. 4. Build up SI/PI simulation and measurement correlation database. 5. Build up design and test capability including design guidance and lab setup. 6. Working with HW teams to optimize high-speed signal.

工作需求 (Job Requirements) 1.電子相關科系大學或碩士以上 2.2-5年的SI(訊號完整性)設計相關工作經驗 3.熟悉相關SI模擬軟體工具相關經驗 4.需與亞洲不同地區的辦公室協助合作 5.能獨立完成公司交辦的工作 工作職責 (Job Responsibilities) 1.負責3D高頻模擬軟體之售前拜訪、技術支持、產品培訓及專業規劃與執行。 2.熟悉PCB、SI信號完整性等相關模擬經驗 3.負責3D軟體的應用及技術支持給現有與新的潛力客戶 4.負責準時完成主管分配的工作