【Description】
As a leading worldwide provider of navigation devices and wearable technology, our focus is on developing, designing and supporting superior products.
Our advanced technology promotes performance, safety and ease of use in every market we serve.
That As a leading worldwide provider of navigation devices and wearable technology, our focus is on developing, designing and supporting superior products.
Our advanced technology promotes performance, safety and ease of use in every market we serve.
That makes us an engineering and technology company with a keen focus on recruiting talent in those fields.
But the same vertical integration business model that keeps all design and manufacturing processes in-house also gives us the incentive to hire top performers from different backgrounds, including operations, finance and accounting, information technology, sales, marketing and communications.
【About this Job】
1. Be familiar with high speed circuits, layout guide and EMC suppressor components.
2. Be familiar with automotive EMC standard like CISPR 25, ISO11452-2.
3. Experience in EMC design and trouble shooting.
4. Attend product design review including ME stacking, schematics and PCB layout.
5. Make EMC validation test plan and report.
6. Communicate with 3rd party lab and client for the test plan and validation cost evaluation.
7. Analyze product EMC issues.
8. Study vehicle component level test standards and product specifications.
9. With personal positive characteristic.
About Automotive OEM Engineering group:
◆ https://www.garmin.com/en-US/aoem/
◆ https://gadget.co.za/garminbmw/
- Responsible for EMC system testing.
- Assist pre-sales activity of EMC test and measurement instrument.
- Online/On-site customer support from pre-sale to post-sale, including presentation, demonstration, training and application cases.
- Through providing technical expertise in broad range of complexity, contribute to build a long-term, trustworthy relationships with customers.
Purpose of this Position
深入研究高速訊號,在高速硬體電路Signal Integrity上提供最佳設計且確保生產品質
Major Areas of Responsibility
專案研發
- Perform high speed signal integrity simulation including 10G/40G、25G/100G、PCIE、SATA、DP、USB、DDR3/DDR4/DDR5.
- Perform pre-layout, layout constraint, and post-layout simulation processes.
- PCB stackup design and layout review for high speed signal and PDN.
- Build component models to ensure the correlation between SI/PI simulation and measurement.
- Solid SI experience in resolving technical issues and performing detailed analysis.
團隊合作
- Collaborating with EE teams to refine high-speed signal performance.
- Collaborate with the layout engineer to provide clear layout guidelines and enhance footprint optimization.