「技術工程類-研發工程師(Layout)」的相似工作

This vacancy is open for talent pool collection. We will contact you if we have proper vacancies that fit with your profile. Job Mission Represent manufacturing and act as gatekeeper from manufacturing to D&E function Add value in overall manufacturing processes such as forming, machining, joining, and assembling Job Description Contribute to the solution of faults and takes the necessary initiatives and practical decisions to ensure zero repeat Identify gaps and drive assigned process improvement projects and successful delivery Initiate and drive new procedure changes and projects Develop and maintain networks across several functional stakeholders Prioritize works and projects based on business situation Transfer knowledge and train colleagues on existing and newly introduced products Education Master degree in technical domain (e.g. electrical engineering, mechanical engineering, mechatronics) Experience 3-5 years working experience in design engineering Personal skills Show responsibility for the result of work Show proactive attitude and willing to take initiative Drive for continuous improvement Able to think outside of standard processes Able to work independently Able to co-work with different functional stakeholders Able to demonstrate leadership skills Able to work in a multi-disciplinary team within a high tech(proto) environment Able to think and act within general policies across department levels Diversity and inclusion ASML is an Equal Opportunity Employer that values and respects the importance of a diverse and inclusive workforce. It is the policy of the company to recruit, hire, train and promote persons in all job titles without regard to race, color, religion, sex, age, national origin, veteran status, disability, sexual orientation, or gender identity. We recognize that diversity and inclusion is a driving force in the success of our company. Need to know more about applying for a job at ASML? Read our frequently asked questions.

1.Analog and mixed mode circuit layout and verification 2.Co-work with designer for layout floor planning,routing and physical verifications 3.command file maintain

This role will lead the Package Design Project with R&D team members and deliver advanced and innovative packaging resolutions to clients. (Flip-Chip) 1.Package RFQ and structure & BOM selection. 2.Direct material evaluation and survey. 3.FA and Reverse Engineering. 4.Package design rule maintain & update. 5.Advance products design / NPI projects development. 6.Research & setup package roadmap / material roadmap.

1.鋰電池BMS電路layout設計 2.確認電路PCB及FPC layout 3.開發新的軟性PCB及高速PCB的驅動板 4.相關layout文件處理 5.協助處理其他產品設計相關事宜 6.配合電子及機構工程師作業及主管交辦事項

1.有analog/mixmode ic layout 經驗 2.熟悉laker,virtuoso,calibre 3.有整合能力可以獨立floor plan或有N12/N10/N6製程經驗尤佳 4.需穩定且積極主動與配合度高

【工作內容】 • 我們正在尋找具備先進製程經驗的 IC Layout 工程師，加入團隊後可以參與高階SoC /Analog IP 的實體實現，並負責以下工作： -Mixed-Mode FinFET Layout 設計與繪製，確保電路佈局在效能、面積與可靠性之間取得最佳平衡。 -進行 FinFET 製程相關的 DRC / LVS / ERC 驗證，確保設計符合法規與 Foundry 要求。 -熟悉 XRC & EM/IR 分析流程，進行可靠性評估，並針對潛在問題提出改善方案。 【職務條件】 • 必備條件：具備 FinFET 製程經驗，能獨立進行版圖設計與驗證。 -具備類比電路佈局經驗，了解電路特性與佈局考量，能與設計工程師密切合作。 -具備良好的溝通能力與團隊合作精神，能在專案時程內交付高品質成果。

IC layout

需有Substrate Layout 相關經驗。

Main work content: 1. Fan-out structure/ material/ process flow design 2. Fan-out RDL layout drawing review 3. Packaging direct material survey, evaluation, improvement & qualification 4. Design rule establishment & maintenance 5. Package failure analysis 6. Coordinate & lead project in design portion & co-work with process, integration & simulation teams 7. Direct communication with customers * 薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 * 資深人員薪資另議。

1. 負責IC版圖的自動佈局佈線、優化和驗證。 2. 確保IC佈局符合Circuit Designer設計需求及產品、製程、電氣的規範。

我們正在招募一名經驗豐富的佈線工程師，能獨立作業，並與本地及美國總部相關單位密切合作，包含硬體、機構、製造、供應商等，確保產品從設計到量產順利進行。 • 使用 Cadence Allegro 24.1等工具，進行車用動力傳動系統相關的高電壓與高電流 PCB 佈設計。 • 設定電氣與物理約束條件(Design Rules & Constraints），進行元件配置 (Placement)、阻抗匹配(Impedance Matching 與爬電距離計算（Creepage Distance & Isolation Slot） • 與工程師進行Layer Stack-up之規劃與應用，能針對不同訊號走線需求、參考層分布與功率模組隔離需求設計出高效能疊構架構。 • 熟悉使用不同基材與高Tg材料，配合高電壓/電流性進行設計與材料選擇評估。確保設計符合車用電子的高可靠性標準。 • 與機構與信號完整性團隊密切合作，確保設計符合熱管理、機構結構與 EMI/EMC 要求。 • 建立與管理零件庫(包含3D模型 mapping)，確保元件資料的準確性與一致性，支援設計流程的順利進行。 • 獨立完成出圖（Gerber/ODB++ 製造資料）與設計交付，達到品質與排程要求。 • 與PCB製造商密切協作，確保設計符合製造可行性（DFM）與組裝可行性（DFA）標準，提升產品可靠性，掌握製造成本，縮短生產週期。 • 獨立參與設計審查，提供技術建議，並協助解決設計與製程中的問題。 • 持續研究與應用新技術。 請提供英文履歷。

Full Customer Layout

驅動 IC 產品相關 layout. 類比 IC 相關 layout.

【Customer Engineering Account Management】 (1)Meet and exceed customer’s expectation of advanced package engineering in terms of quality, cost and delivery (2)Offer industrial leader’s advanced package solutions and services through integration of package and process development 【Project management】 (1)Project phase in schedule arrangement and follow up (2)SWR arrangement ,schedule follow up, negotiation…etc. (3)PKD/PMD creation (PLM) (4)Reliability arrangement 【Team Work】 (1)To optimize resource allocation (2)Enhance teamwork in 360° including customer, supplier and our colleagues (3)Develop self and others 1. 薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘； 2. 資深人員薪資另議。

1.Fully custom IC layout for analog 2.Channel or whole chip integration 3.Responsible for layout design,layout verificaion and tapeout.

1. Silicon photonics schematic simulation and chip layout (佈局60%) 2. PIC chip O/E measurement (量測40%)

【職務內容】 ˙需具備HV經驗 Level Shifter（含 HV Device）、Charge Pump、Source Driver、OpAmp / DAC、TCON（含 Digital Layout + Clock Tree） ˙需具備3-5年Driver相關經驗 ˙需熟悉繞線（Routing） ˙Block-Level設計經驗可 ˙能讀懂 Calibre DRC command file 語法佳 ˙具備28/22nm HV製程經驗佳 ˙無需英文能力，全台灣團隊

1.SENSOR-LAYOUT、設計作業 2.產品開發及修改，進度管控、設計改善 3.與供應商技術溝通、時程管控、改善分析 4.其他主管交辦任務

Analog IC Layout Memory Layout IO & ESD Check

1. 具Load board / Probe card 設計經驗者擇優 2. 零件Library 建立 3. 相關設計表單整理與輸出