1. Designing and developing software for real-time video systems
2. Analyzing and solving performance problems
3. Integration of hardware devices for imaging or AI inference using SDKs
<Basic Requirements>
1. 2+ years experience in software development with C++
2. Experience with video systems and/or real-time systems
3. Experience with software development in Linux
4. Familiarity with Git workflow.
5. Good writing and reading skills in English
Development of Wireless AP/Router/Firewall/VPN product.
1. BSP porting.
2. Device driver development.
3. Network function development.
4. Control management function development.
5. Cloud management function development.
6. VPN function development.
7. Firewall function development.
韌體團隊開發範疇:
1. 研究電池特性(例如:鋰電池),開發新的電池電瓶分析演算法。
2. 完成電池測試儀器、電池充電器功能開發。
專案執行過程的常態性工作:
1. 使用MCU開發工具及程式語言,主要是C語言。
2. 進行單元功能程式整合。
3. 單元功能程式撰寫及驗證。
4. 撰寫工程規格 / 技術文件 (包含測試計畫)。
5. 韌體版本管控 (Git)。
Our FW team is responsible for:
1. Developing the functionalities of battery diagnosis/charging products.
2. Investigating new diagnosis algorithm for batteries is part of our job.
Regular duties in project execution:
1. Use MCU development tools and programming languages, primarily C language.
2. Perform unit function program integration.
3. Write and verify unit function programs.
4. Write engineering specifications / technical documentation (including test plans).
5. Firmware version control (Git).
We are looking for an experienced engineer with a strong background in embedded systems and Linux software development to join our R&D team. The role involves participating in the design, development, and system integration of new products.
Responsibilities
◆Develop and maintain firmware and Linux daemons
◆Participate in the system integration process of new products, including design discussions, implementation, testing, and delivery
◆Design and implement network-related features, including video streaming, OAuth2.0, HTTP/HTTPS
◆Utilize Git and other source control tools to ensure code quality and efficient team collaboration
◆Communicate with international colleagues in English, including participation in video conferences for design and requirement discussions
Requirements
◆Proficiency in C programming and Linux OS environments
◆Hands-on experience in embedded system development
◆Solid understanding of network protocols, such as TCP/IP, HTTP/HTTPS
◆English proficiency (listening, speaking, reading, and writing) to collaborate effectively with overseas colleagues
◆Awareness of information security practices; ability to leverage tools like GPT or DeepSeek while ensuring the confidentiality of company data
【About Us】
VICI Holdings' Hardware team is seeking a Senior Digital Design Engineer to join our dynamic group. In this role, you will be pivotal in advancing our trading systems, contributing to the development and enhancement of cutting-edge technologies. We boast the leading digital hardware development team in Taiwan and possess FPGA design technology in parallel with wall street trading firms. This expertise enables us to build ultra-low-latency, fully automated trading systems. Our trading strategies cover stocks, futures, and derivatives, achieving a daily global trading volume in the hundreds of millions dollars.
【Roles/ Responsibilities】
• Micro-architecture, design and implement high-performance digital circuits optimized for low-latency application
• Develop high speed data paths, ensuring minimal logic depth and efficient pipeline
• Optimize critical paths and combinational logic to reduce propagation delays and improve throughput
• Work with Verilog/ SystemVerilog to implement RTL design
• Apply parallelism and resource sharing techniques to enhance performance and throughput
• Develop latency-aware micro-architectures for real-time processing and networking applications
• Debug, optimize and iterate on designs using FPGA platform and cycle-accurate simulation
• Work closely with digital/system verification engineers to ensure functional correctness and performance validation
• Take ownership of FPGA verification tasks to ensure design correctness and performance.
• Develop and execute verification plans for high-speed IPs such as PCIe, Ethernet, and Switches.
• Support system validation engineer to debug FPGA issue
Design Collaboration:
• Collaborate closely with Algorithm, software, design validation and application team to define micro-architecture
Performance Analysis:
• Conduct performance testing and analysis, ensuring the low-latency goals are met across various use cases.
• Capability to solve routing timing issue and analysis FPGA timing report result.
【Candidate Requirements】
• Master’s degree or above in EE, CE, or CS, plus 3–8 years of high-speed digital-design experience
• Hands-on experience in IP-level digital-circuit design or IP integration (preferred)
• Proficient in debugging and optimization with VCS and Verdi simulation tools
• Comfortable working in Linux/Unix environments
• Strong analytical and problem-solving skills with a performance-driven mindset
【Other Requirements】
• Proven ability to solve complex design challenges and deliver robust solutions
• Experience designing ultra-low-latency data paths—arithmetic units, multiplexers, FIFOs, registers—for high-performance applications (preferred)
• Familiarity with FPGA verification tools such as Quartus or Vivado (a plus)
• Knowledge of high-bandwidth memory interfaces (DDR, HBM, etc.)
• Understanding of networking protocols (Ethernet, PCIe, etc.)
【Interview Process】
• Resume Screening → HR Phone Screen → Face-to-Face Interview (with 30-60mins on-site coding test)