「Sr. Staff Hardware Engineer」的相似工作

Key job responsibilities: • Minimum 10 years of technical working experience, and knowledge of consumer, enterprise, and handheld product design • Expertise in embedded system design, system PWR architecture, and related electrical design skillset & knowledge • Expertise in electrical engineering and knowledge of multiple related areas (e.g. SoC architecture, DCDC power design) • Expertise in electrical engineering and knowledge of multiple related areas (Signal Integrity/Power Integrity, and various communications protocols such as I2C, UART, SPI, USB, MIPI, I2S, etc. • Familiar with battery knowhow experience, and power budget estimation. • Experience and familiarity with lab equipment including oscilloscopes, current/voltage probes, power meters, data loggers, and electronic loads.

ᴘᴜʀᴘᴏꜱᴇ ᴏꜰ ᴛʜɪꜱ ᴘᴏꜱɪᴛɪᴏɴ 負責無線網通產品的電子系統設計、驗證與優化，與專案負責人及跨部門團隊緊密協作，確保產品在性能、可靠度與市場競爭力上的持續提升。 MOXA 的工業級網通產品廣泛應用於交通、能源、智慧製造及關鍵基礎設施等產業，您將有機會參與跨國專案，與國際團隊合作，將設計理念落實為高可靠度的產品，直接影響全球客戶的營運穩定性與競爭力。 ᴍᴀᴊᴏʀ ᴀʀᴇᴀꜱ ᴏꜰ ʀᴇꜱᴘᴏɴꜱɪʙɪʟɪᴛʏ • 依據產品需求與規格，進行電子系統的設計與開發 • 執行系統功能驗證與設計優化 • 與專案負責人及跨部門團隊協作，確保專案如期交付 • 針對開發過程中出現的技術問題進行分析與除錯，提出具體解決方案 • 參與產品在全生命週期的持續優化與維護 • 協助處理售後相關技術議題 • 積極參與技術學習活動與分享專業知識，提升個人專業能力與部門貢獻 • 撰寫與維護部門設計文件、議題分析報告、測試數據

【本職缺優先審核至高通官網投遞人選】請至高通官網上傳英文履歷表：https://qualcomm.wd12.myworkdayjobs.com/External/job/Taipei-TWN/Senior-Network-Engineer_3079323 【Talents who apply job through Qualcomm Career Website will be reviewed and considered as top priority】 • Collaborate with IT team members and end users effectively. • Ability to work as part of a virtual global/regional team, navigating cultural and language differences. • Capable of handling ambiguity and working independently with minimal supervision and guidance. • Prepare incident reports, including detailed analysis of troubleshooting findings. • Provide first and second level network operations support during escalations. • Independently or collaboratively troubleshoot and resolve network-related issues, including LAN, WAN, and WLAN. • Strong knowledge of networking technologies such as SD-WAN, QoS, DNS, LAN, and WLAN security including NAC, VLANs, VxLAN, and IPsec. • In-depth understanding of network routing and switching technologies and protocols like OSPF and BGP. • Knowledge of Ansible, Python, and Splunk is advantageous. • Proficient understanding and participation in RFC processes, including documenting and resolving network-impacting changes. • Hands-on experience with products such as Cisco, Arista, and F5 LTM is beneficial. • Bachelor's or higher degree in Computer Science, Information Systems, or Telecommunications. • Minimum of five years of experience in network support and administration. • Current CCNP certification with relevant professional experience; CCIE, Cisco DevNet certification would be an advantage. • Excellent written and verbal communication skills in English; proficiency in Mandarin is a plus.

⚫ Design server system and relative boards and review high-speed PCB layout. ⚫ Work with function team like Power, SI, mechanical and thermal engineers to ensure optimize hardware solutions. ⚫ Come out test plans to ensure base function of hardware. ⚫ Work with suppliers and vendors to select components and solutions. ⚫ Support 2nd source solutions and validation. ⚫ Work closely with firmware teams to integrate and troubleshoot management topology. ⚫ Support manufacturing teams during the production phase.

Welcome to apply from NVIDIA Career page: Server: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Taiwan-Taipei/Senior-System-Application-Engineer_JR1996786-1 Notebook: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Taiwan-Taipei/Senior-System-Application-Engineer_JR1996805 We're Application Engineering team and searching for System Engineer to engage for partner development in ARM-based (Grace CPU) and X86-based servers with NVIDIA solutions. NVIDIA is creating the future of computing and looking for passionate, dedicated, and forward-thinking individuals to help make that happen. What you’ll be doing: - System-level tool development/debug from the product segment needed. - Join the partner design review through system architecture, schematics, and layout, thermal and validation plan. - Work with partners for issue analysis and root cause. - Drive with partner's design quality. - Provide tech training to customers. - Overseas travel will be required if needed. What we need to see: - Master's Degree or equivalent experience in Computer Science/Computer Engineering/Electrical Engineering or related field. - 5+ years of server or PC design work experience. - High-Speed Signal design/ Strong knowledge of GPU Server System Architecture includes X86 and ARM-based. - Familiar with Linux. Good concept of thermal and mechanical design. - Skills of ARM Server System Architecture are a strong plus. Skills of Python/Perl is a plus - Knowledge of the PCIe architecture with AER (Advanced Error Reporting). - Excellent communication skills, flexibility in task assignments, and working under pressure. - Strong communications skills in English, Innovative, Independent, results-oriented problem solver. Ways to stand out from the crowd: -Strong oral & written communication skill (both English and Chinese). -Development experiences in datacenter design or server product. -Self-motivated and aggressive to learn

1.類比訊號分析及電路設計。 2.小信號低雜訊放大線路的設計、模擬、量測及驗證。 3.熟悉OPAMP, Filter, ADC/DAC,… 規格, 性能特性及應用。 4.電子電路硬體的設計、驗證，失效分析和故障排除 5.萬潤熱烈招募有意投入設備產業的菁英，如未具備本項職缺所需相關技能與工作資歷者 亦歡迎投遞，薪資另議。 6.上班地點 新竹：新竹市工業東四路24-2號2樓 /新竹縣竹北市保泰三路 78 號 台中：台中市西屯區工業區37路18號 高雄：高雄市路竹區路科十路1號

THE ROLE The Lead Signal Integrity Engineer is a technical leader responsible for advancing Isola’s laminate materials to meet and exceed high-speed electrical and signal integrity (SI) performance requirements. This role provides mentorship and direction to the Signal Integrity team in Taiwan, drives innovation in SI test methodologies, and ensures strong technical engagement with global OEMs. The Lead serves as a recognized authority in SI, bridging customer needs with material performance and representing Isola in the high-performance electronics community. KEY RESPONSIBILITIES: Customer-Facing Technical Support: • Lead technical engagement with OEMs and direct customers on high-speed laminate characterization. • Act as primary technical contact for SI-related design validation and adoption cycles. • Oversee the creation of technical reports, white papers, and collateral for internal and external use. Strategic & Technical Leadership: • Define and develop advanced SI measurement, modeling, and simulation methodologies. • Collaborate with Product Management, R&D, and Sales to ensure alignment of SI capabilities with product strategy. • Represent Isola as a thought leader through publications, conferences, and industry forums. Organizational Management: • Mentor, guide, and grow the Taiwan-based Signal Integrity Engineering team. • Establish scalable, cost-effective SI test methods that accelerate R&D and customer response. • Drive alignment with global Application Engineering teams to ensure best-in-class technical service. Technology & Standards Thought Leadership: • Maintain expertise in SI methods, PCB processing effects, and high-speed digital design requirements. • Contribute to industry standards development and support customer forums on SI requirements. QUALIFICATIONS & EXPERIENCE • 8+ years of experience in signal integrity engineering, PCB laminates, or high-speed design. • Expertise in VNA measurements, probing techniques, and advanced SI methodologies. • Experience with PCB manufacturing and processing effects on SI performance. • Demonstrated leadership and mentoring experience. • Proven record of technical publications, white papers, or conference presentations. EDUCATION • PhD or Master’s in Electrical Engineering or related field required. OTHER CONSIDERATIONS • Fluent in English – required for global communication and technical documentation. • Proficiency in Mandarin Chinese – strongly preferred for engagement with Taiwan/China teams and customers. • Ability to travel regionally and globally as needed.

1. In-depth knowledge of PCB layout, OrCAD/Allegro tools, circuit design, and PCB structure. 2. Prepare technical documentation including product specifications, layout instructions, test procedures, etc. 3. Transfer products to manufacturing with clear documentation and help C.M. and technical support to solve problems. 4. Hardware engineer need co-working with PM, BIOS, IPMI, EMI, Thermal, ME RD friendly. Need have good team work. Need to have the concept of project ownership. 5. Need have power VR and component design knowledge 6. Resolve complicated issues and drive to root cause on critical engineering problems

Are you passionate about AI, robotics hardware design, or the physical realization of cutting-edge technology? Do you want to physically build the core hardware that defines future intelligent devices? KBay Consulting is looking for an innovative AI/Tech/Robotics Hardware Engineer to join our dynamic team. If you're eager to translate abstract AI concepts into reliable, efficient physical hardware solutions within the fast-evolving tech landscape, this opportunity is for you! ________________________________________ Responsibilities: • Participate in the hardware system design, development, testing, and validation of AI, robotics, or technology-related products. • Responsible for circuit design, PCB layout, component selection, and vendor management. • Collaborate closely with cross-functional teams (including software engineers, mechanical engineers, and project managers) to ensure seamless hardware-software integration. • Conduct hardware performance tuning, diagnostics, and troubleshooting. • Write hardware design documentation, test reports, and technical specifications. • Continuously learn and explore emerging hardware technologies, applying them to projects. Qualifications: • Bachelor's degree in Electrical Engineering, Electronic Engineering, Control Engineering, or a related field (Master's degree preferred). • Strong understanding of analog/digital circuit design principles. • Basic programming skills (e.g., C++, Python,ROS2) for hardware control or testing. • Strong interest and passion for hardware applications in AI/robotics and emerging technologies. • Experience working with software. • Excellent problem-solving and analytical skills. • Strong teamwork spirit and good communication skills. • Fluency in both Chinese (Mandarin) and proficiency in English are required. Salary & Benefits: • Salary commensurate with experience • Benefits Package: Includes commission/profit sharing

NVIDIA is seeking an outstanding Lead Design Engineer to join our team. In this role, you will collaborate with other key design teams to develop NVIDIA’s next-generation products including GeForce, Virtualization, Datacenter, and Automotive products. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of AI computing. Are you passionate about technology enabling growth in AI markets and want to change the world? Then apply now to join NVIDIA! What you will be doing: -Design responsibility for the creation of new products designed around our GPUs, DPUs, and CPUs to cover Graphics, Self-driving platforms, and Data centers. -The LDE is responsible for driving every aspect of design execution, initial testing, bringing, and managing the documentation required to release the product to manufacturing and partners. It also serves as the primary interface to the Silicon/Thermal/Mechanical/SI/EMC engineers. -The scope of the LDE role has been carefully tailored to allow these individuals to consistently deliver world-class product quality on a challenging schedule while applying great attention to detail and quality of execution. -Research the new feature/circuits/architecture and involve the establishment/discussion of industry standards, then implement them in the next-generation product/platform development. What we need to see: -BS/MSEE and 3+ years of board/System design experience -Knowledgeable in high-speed signal design rules and power design methodologies -Proficiency in digital/analog circuit simulation and fault diagnosis. -Proven ability to deliver complex projects from specification through to production. -Your work displays your passion for circuit development and strong problem-solving skills. -Strong communication and Critical thinking are required. -Deep system knowledge of at least 2 areas: Switch tray /Computer tray/Datacenter architecture development or PC/Graphics/Automotive product development. Ways to stand out from the crowd: Experience in high-speed interconnection technology in switch tray development. Proficient in IB/Ethernet switching chip system design and bring-up. Successful Candidate will possess the following traits: Can-do attitude; Critical thinking; Leadership; Ability to learn complex concepts in a fast-paced environment; Strong desire for creativity; Strategic thinking and good decision-making skills; Good interpersonal skills. NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people on the planet working for us. We welcome candidates from all backgrounds and are committed to building a diverse and inclusive team. If you are creative and autonomous, we want to hear from you!

ASIC design engineer responsible for post-RTL design flow. He/She will be responsible for block and /or chip level synthesis, timing closure, DFT generation, and ECOs. The responsibilities include but are not limited to. •    Improve the design methodology and flow. •    Synthesis, timing closure, and DFT support for various types of SerDes IPs ranging from 10Gbps to 224Gbps data rates for different applications. •    Collaborate with Analog/Digital design teams to deliver competitive SerDes IP solutions for all the Marvell product lines. •    Provide support to the product teams, for both pre and post-silicon

負責x86 系統主機板的硬體研發設計與驗證，確保產品符合性能和可靠性，協助解決設計與生產中遇到的問題。 主要負責x86系統主機板的 1‧線路設計 2.layout review 3. HW issue debug 4. 主機板 BOM

1. 熟悉Server Board、x86或ARM based (nVidia、Rockchip、TI、Qualcomm..等) 硬體設計。 2. 硬體線路設計、驗證及除錯，PCBA layout檢查及驗證。 3. 主導專案研發進度，管理硬體研發團隊，掌控設計品質與產品開發進度。 4. 研究產業新技術，導入創新產品設計。 5. 管理零件承認並執行CIS導入設計流程。 6. 跨部門溝通協調，軟韌體/機構/設計測試驗證/生產製造等系統整合相關問題。 7. ODM產品設計專案的技術管理，包括帶領團隊從RFQ到設計實現的全過程，與國際客戶直接溝通，理解並轉化其需求為具體設計方案，作為技術窗口參與客戶會議，提供技術解決方案。

硬體團隊開發範疇： 我們致力於開發高瓦數、高效率的電力電子電路、精準的測試電路以及整合聯網功能通訊界面。我們重視每個開發過程中的細節和流程，並與其他部門緊密的合作與溝通，致力完成高品質的設計、製造、服務，從硬體到整合韌體與應用程式再結合雲端服務，提供使用者一個完整的電池管理服務。 工作內容主要包含： EE Engineer (工程師、高級工程師 or 資深工程師) Job description: 1. 電子電路設計(電源設計、MCU周邊硬體功能設計)。 2. 使用Altium Designer畫電路圖。 3. 需要與機構、軟體、韌體、驗證、業務、採購、生管等部門共同溝通合作，一起開發新產品。 4. 協助安規事項處理與現有產品安規維護更新。 5. 協助其他同事測試&現有產品換料測試，並產出測試結果報告。 6. 協助產線治具，排除在硬體上的問題。 7. 不定時與同事一同出差至安規實驗室，協助測試產品EMI。

Purpose of this Position 深入研究高速訊號，在高速硬體電路Signal Integrity上提供最佳設計且確保生產品質 Major Areas of Responsibility 專案研發 - Perform high speed signal integrity simulation including 10G/40G、25G/100G、PCIE、SATA、DP、USB、DDR3/DDR4/DDR5. - Perform pre-layout, layout constraint, and post-layout simulation processes. - PCB stackup design and layout review for high speed signal and PDN. - Build component models to ensure the correlation between SI/PI simulation and measurement. - Solid SI experience in resolving technical issues and performing detailed analysis. 團隊合作 - Collaborating with EE teams to refine high-speed signal performance. - Collaborate with the layout engineer to provide clear layout guidelines and enhance footprint optimization.

Job Summary: This FAE will provide technical support to the Sales and FAE teams in developing potential opportunities that incorporate MPS products and solutions. The FAE will also identify and communicate current and emerging customer technical needs to enhance both tactical and strategic product positioning. Qualifications: • BS or MS in Electronic Engineering is required. • At least 2 years of experience in the power electronics industry (DC/DC or AC/DC); experience in a power IC vendor as an AE or FAE will be a plus. Familiar with general NB/Server DC/DC power design; experience with Buck converter design will be a plus. • Strong problem-solving and initiative skills. • Good interpersonal and communication skills. • Adaptable and able to work under changing conditions. • Highly responsible, self-motivated, and good team player.

Summary: Part of design automation team to enable and verify Printed Circuit Board (PCB) hardware and layout designs. Essential Duties and Responsibilities: • Execute Power Integrity (PI) tools and provide inputs to design and lab teams • Execute Signal Integrity (SI) tools and provide inputs to design and lab teams • Develop scripts to provide solutions in design and PCB manufacturing issues • Define and develop design methodologies to improve design quality and productivity • Engage with Computer Aided Design (CAD) tool vendors for tool evaluation and support • Engage with PCB and CM vendors to understand and evaluate PCB materials and stackups

PRIMARY JOB DESCRIPTION: • Responsible for performing signal integrity and power integrity simulation analyzing DIMM products in different form factors. • Work with layout team and NPI team for achieving good board routing and releasing to production • Will interface with SMART global design teams PRINCIPAL DUTIES AND RESPONSIBILITIES: • Perform channel margin analysis to provide design tradeoffs among package, board, and connector on products starting from the technical specifications from different controller and NAND flash vendors in different form factors • Perform PCB timing analysis, work with layout designers and hardware engineers to implement all signal integrity rules • Perform PCB power margin analysis, work with layout designers and hardware engineers to implement all power integrity rules • Develop layout signal/power integrity rules guideline or document on new products starting from the technical specifications from different DRAM vendors in different form factors • Capability to execute trouble shooting and provide workable solution to SMART global R&D teams and customers • Communicate and work closely with global R&D teams to achieve targeted schedule for PCB board release • Write a Layout guidance document. Organize and research technical reports and share

About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to the next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you’ll heighten your potential and broaden your horizons, all while shaping the future of connectivity. Responsibilities - Perform electrical validation of high-speed interfaces such as PCIe Gen3~Gen5, Ethernet (802.3 10G/25G/100G/400G), DDR4/5, SATA, and USB3 - Perform electrical validation of low-speed interface, including I2C, SPI, MDIO, eMMC, and RGMII. - Perform chip-to-chip SerDes signal validation, including SGMII+, UXSGMII interfaces. - Plan and execute power testing strategies for multiphase power stages and DC buck converters. - Perform power integrity validations, including ripple noise analysis, power sequencing verification, electronic load (E-load) operation, and power supply unit (PSU) evaluation. - Develop and execute test scripts under Linux environments, familiar with shell commands and automation scripting. - Collaborate with the HW team and chip vendor to define and document SI/PI validation plans and requirements. - Analyze and identify SI/PI issues, and work closely with HW, FW, layout teams, and chip vendors to develop improvement solutions that enhance electrical performance and signal integrity quality. Requirement - Solid experience with SI test equipment (oscilloscope, BERT, VNA, TDR). - 3+ years of hands-on experience in Signal Integrity, and SerDes/PCIe/USB/DDR validation. - Solid understanding of compliance testing methodologies, eye diagram, and litter analysis. - Strong understanding of low-speed interface protocols and comprehensive experience in AC/DC characteristic validation. - Bachelor’s/Master’s degree in Electrical Engineering, Electronics, or related fields. - Excellent problem-solving skills, ability to debug SI/PI issues, and strong cross-functional communication with HW design and layout teams. Preferred Qualifications - Experience working on system-level signal validation in server, networking, or storage platforms with high-speed interfaces. - Familiarity with Power Integrity validation, including power sequence, ripple noise, OCP, and SCP testing. Benefits - International work environment and collaboration with global development teams - Excellent work conditions - Competitive package: great pay, perks, and benefits - Group insurance and health coverage - Flexible working hours and patterns - Complimentary drinks and snacks at the office

Please apply this role through https://careers.synopsys.com/job/hsinchu/r-and-d-engineering-sr-staff-engineer/44408/84900058096 Synopsys is looking for motivated Product Engineer to help design, develop and test state of the art Static Timing, Characterization and Library modelling tools. The primary focus of the Product Engineer is closely working with R&D team, to influence technologies/solution roadmaps and provide R&D team with accurate input from Field AEs, helping them focus on the most critical design challenges and help define solutions to critical problems. The engineer will work closely with Field AEs, ensuring overall consistency of end-to-end design and analysis flow to meet customer needs. The engineer will also work with Sales and Marketing teams to find and develop new markets, drive new tool evaluations and help customers with the adoption and continuous usage of Static Timing, Characterization and Library Modelling, thus enabling Chip Design customers achieve best Timing, Power and Characterization Goals. Synopsys’ existing and forthcoming tools offer an advanced transistor-level static timing characterization and library modelling solution that addresses the existing and emerging challenges in custom and memory design. They offer predictability and improved productivity to designers. Their concurrent timing, SI features and advanced variation aware analysis enables designers to accurately and quickly identify design issues early-on and avoid expensive late-finding of problems in silicon. Main responsibilities: • Drive new products and new product features that exceed customer needs. • Work with RnD to enable timely implementation of new products and features, and important bug fixes. • Provide consultation to prospective users and/or product capability assessment and validation. • Provide tool trainings to customers and Field AEs. • Provides technical expertise to sales staff through sales presentations and product demonstrations. • Assists the sales staff in assessing potential application of company products to meet customer needs and preparing detailed product specifications for the development and implementation of customer applications/solutions. Requirements: We are looking for an innovative, motivated, and dependable person, with at least BS degree and 8+ years of recent hands-on experience including: · Exceptional expertise in transistor-level analysis and debug circuit level issues for SRAM, RF, ROM memories and Standard Cells. · Good exposure to static timing concepts and CMOS engineering fundamentals. · Good knowledge of TCL and or other scripting languages. · Very good communication, social and leadership skills. Plus: · NanoTime or PrimeLib experience highly desirable.