Summary :
you will create and refine PCB Layout designs for a variety of products and work closely with engineers and customers to finalize our product specifications. To be successful in this position you should have hands-on experience using CAD software and be detail-oriented and a team player.
Responsibilities :
•Complete development of CAD layout from footprint definition, detailed component placement and constraints management.
•Set up constraints for each PCB layout.
•Be responsible for the design releases required generation of artwork files, ODB++, FAB drawings, ICT report, and electronic PCB documentation.
•Delivery Gerber file to PCB fabrication and assembly house and plan the lead time.
•To resolve DFM / DFM issues.
Qualification :
•10+ years in PCB layout design and direct working experience using Cadence OrCAD schematics Capture and Allegro software.
•Familiar with PCB design SW tools (Allegro, DraftSight, CAM350…), Altium is plus.
Detailed understanding of multilayer PCB construction.
•Experience with advanced PCB manufacturing techniques such as blind vias and microvias.
•Power Electronics/Power management experience is desired.
•Familiar with PCB fabrication and assembly process are desirable.
•Bachelor/Master in EE, computer science, or relative majors, or equivalent experience.
•Possess basic English communication skills.
1.Layuot設計,PCB發包製作,SMT/DIP發包製作。
2.研究製作PCB產品相關分析與報告。
3.協助技術文件編寫。
Job Description
1.Layout design, PCB outsourcing and production, SMT/DIP outsourcing and production.
2.Research and create analyses and reports related to PCB product manufacturing.
3.Assist in the preparation of technical documents.
Roles & Responsibilities:
-To design High-Speed/High Density (Multi-Layer, Up to 46 layers) PCB Layout projects. Challenges involve highly complex electrical & mechanilcal contraint driven designs, high density interconnects and packaging, meeting client's SI,EMC, DFM, DFA, DFT.
-Troubleshooting and fault finding in PCB layout at Design level.
-Placement of components based on mechanical constranints and schematic flow.
-Routing of signal based on SI constraints.
-DFx Analysis implementation.
-PCB Manufacturing/Assembly files Geneation.
PRIMARY JOB DESCRIPTION:
• Responsible for performing signal integrity and power integrity simulation analyzing DIMM products in different form factors.
• Work with layout team and NPI team for achieving good board routing and releasing to production
• Will interface with SMART global design teams
PRINCIPAL DUTIES AND RESPONSIBILITIES:
• Perform channel margin analysis to provide design tradeoffs among package, board, and connector on products starting from the technical specifications from different controller and NAND flash vendors in different form factors
• Perform PCB timing analysis, work with layout designers and hardware engineers to implement all signal integrity rules
• Perform PCB power margin analysis, work with layout designers and hardware engineers to implement all power integrity rules
• Develop layout signal/power integrity rules guideline or document on new products starting from the technical specifications from different DRAM vendors in different form factors
• Capability to execute trouble shooting and provide workable solution to SMART global R&D teams and customers
• Communicate and work closely with global R&D teams to achieve targeted schedule for PCB board release
• Write a Layout guidance document. Organize and research technical reports and share