* OSAT (Assembly/Test) 良率異常分析 & 處理。
量產測試驗證,確保量測參數 & 規格符合設計要求。
* 測試結果資料分析,提供良率改善 & 測試流程優化建議。
* CP / FT / SLT 數據追蹤,擬定調整製程參數 or 條件。
測試開發、Debug & 參數優化,提升測試效率 & 良率穩定度。
* 與內部製程/設備/品保單位進行問題分析,釐清異常並提出改善方案。
* 支援測試需求 & 技術交流,確保產品測試時程 & 品質達成量產目標。
1. Co-work w/ functional engineering team member (TME/DE/TD/TE/RE) to make new product has good definition, Risk evaluation and Build comprehensive testing plan / Qual plan, etc.
2. Co-work w/ other Engineering team member to ensure all new product can be thoroughly Manufactured, Characterized and Qualified for reliabilities and qualities.
3. Organize assignments and independently schedules to complete assigned tasks timely and make project finished efficiently.
4. Have good Coordination and Data Analysis to solve difficult problems through application of various techniques and approaches to develop effective and practical solutions that result in improved products, processes with good quality.
5. Co-work with MediaTek - Taiwan Team, and HCLTech - India Team.
6. Annual salary: 800K NTD and above
7. Onsite MediaTek - Hsinchu Science Park Office
This position is set for PE (Product Engineer) to coordinate new product development activities, ensure timely completion of all new products manufacturing, testing, characterization, qualification and releasing with good consistency, quality and efficiency.
Ref.
* CP (Wafer level - Chip Probing)
* FT (Packaged chip level - Final Test)
* SLT (Packaged chip level - System Level Test)
* ATE (Automated Test Equipment)
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1) In charge of NPI release with well document, process and recipe control
2) Direct interface Between customer and engineering to align the technical and quality requirement
3) Lead and organize internal parties to drive the excellent outcome to fulfill customer requirement
4) NPI BOM generation and release control
5) Engineering lot handling
6) Supervisor of product yield improvement
7) Map creation and control
8) Packing fitting analysis and review
Role Summary/Purpose:
Hardware design engineer will closely work with worldwide engineers to perform engineering works for hardware testing solution of next generation semiconductor devices. The work includes requirement analysis, feasibility study, solution evaluation, task planning, project management, design execution, quality control and verification. We are working on cutting edge requirement and future technology.
Responsibilities:
• Provide global semiconductor interface test hardware solutions of next generation semiconductor devices for world-wide customers
• Provide chip test interface HW solution engineering to compare pros and cons of different approaches and recommend best option to customers considering both performance, lead time, cost
• Responsible for Testing circuits Design and super high layers PCB design for high complexity ATE device interface board correspond to various device testing, eg. Mobile application processor, High performance computer, AI, RF etc.
• Responsible for scheme selection of a SUBSTRATE/MLO design in wafer testing, research for low Cost of Test scheme (considering TDE, Skip DIE, substrate stack-up)
• Responsible for power integrity (PI) and signal integrity (SI) simulation at board level or system level, frequency domain or time domain to ensure HW product performance at design stage
• Implement complex mechanical design/simulation, cable design, thermal evaluation by collaborating with PCB design to achieve premium quality in hardware solution according to customer device testing ultimate challenges.
• Responsible for global end to end hardware project management to ensure best quality and on time delivery
-Device testing requirement assessment and Feasibility study
-Risk analysis and mitigation planning
-Schedule planning and project management
-Design execution
-Regular review with global internal and external customers
-Quality Control and Verification
• Work closely with Global supply chain, provide solution to solve manufacture (DFM), assembly (DFA) challenges, ensure hardware products on time delivery and very high first pass rate
• New technology research, new products, new materials evaluation for next generation device testing
• Deliver hardware design training and seminars to customers