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「元件工程師」的相似工作

昱叡電子股份有限公司
共500筆
10/15
新竹市5年以上碩士以上
Overview: The Senior TCAD Engineer will be a key member of our technology development team, responsible for advanced modeling and simulation of semiconductor devices and fabrication processes. This role involves defining and executing TCAD projects for novel device architectures, optimizing performance, and analyzing results to guide process integration and design teams. Key Responsibilities: • Develop and validate TCAD models for advanced technology nodes. • Run simulations to assess device performance (IV, CV, breakdown, reliability). • Interpret results to guide design and process improvements. • Collaborate with engineering teams to align on technology roadmap. • Act as TCAD expert and provide technical support. • Automate simulation tasks using scripting (Python, Perl, TCL). • Compare simulations with silicon data and resolve discrepancies. • Prepare technical reports and present to cross-functional teams. • Stay updated on TCAD trends and enhance modeling capabilities. • Mentor junior engineers and contribute to IP development. Qualifications: • 5+ years of hands-on experience in TCAD process and device simulation within the semiconductor industry. • Deep understanding of semiconductor device physics and fabrication processes. • Expertise with commercial TCAD simulation tools such as Synopsys Sentaurus or Silvaco Atlas. • Proficiency in scripting languages (e.g., Python, Perl, TCL) for tool automation. • Experience with analog focused process technologies, particularly high voltage transistors such as drain extended CMOS or LDMOS devices.
應徵
09/26
新竹市4年以上碩士以上
1. 專案開發前期: 協同SA訂定規格/設計環境建構/競品特性分析/協同PM訂定開發時程表 2. 專案開發期間: 支援電路設計及整合/定期招開設計檢查會議/定期追蹤開發進度/確保專案各站點完成時程/準備各站點檢查資料及文件/測試相關資料的準備 3. 專案開發後期: 分析CP驗證數據/確保良率達標/協同SA,RD,TE進行除錯分析/確保達送樣標準
應徵
10/17
昇佳電子股份有限公司其他電子零組件相關業
新竹縣竹北市1年以上碩士以上
Tcad模擬、元件量測與分析
10/14
台北市內湖區3年以上碩士
製程整合/元件開發
應徵
10/09
博盛半導體股份有限公司其他半導體相關業
新竹縣竹北市經歷不拘大學以上
1. 產品電性量測分析與測試報告產出 (MOSFET、DC-DC IC、AC-DC IC) 2. 產品規格書製作 3. 新產品單體與系統驗證 4. 協助客戶問題回覆(需跨部門合作以及客戶溝通)
應徵
10/15
新竹市3年以上大學以上
* OSAT (Assembly/Test) 良率異常分析 & 處理。 量產測試驗證,確保量測參數 & 規格符合設計要求。 * 測試結果資料分析,提供良率改善 & 測試流程優化建議。 * CP / FT / SLT 數據追蹤,擬定調整製程參數 or 條件。 測試開發、Debug & 參數優化,提升測試效率 & 良率穩定度。 * 與內部製程/設備/品保單位進行問題分析,釐清異常並提出改善方案。 * 支援測試需求 & 技術交流,確保產品測試時程 & 品質達成量產目標。 1. Co-work w/ functional engineering team member (TME/DE/TD/TE/RE) to make new product has good definition, Risk evaluation and Build comprehensive testing plan / Qual plan, etc. 2. Co-work w/ other Engineering team member to ensure all new product can be thoroughly Manufactured, Characterized and Qualified for reliabilities and qualities. 3. Organize assignments and independently schedules to complete assigned tasks timely and make project finished efficiently. 4. Have good Coordination and Data Analysis to solve difficult problems through application of various techniques and approaches to develop effective and practical solutions that result in improved products, processes with good quality. 5. Co-work with MediaTek - Taiwan Team, and HCLTech - India Team. 6. Annual salary: 800K NTD and above 7. Onsite MediaTek - Hsinchu Science Park Office This position is set for PE (Product Engineer) to coordinate new product development activities, ensure timely completion of all new products manufacturing, testing, characterization, qualification and releasing with good consistency, quality and efficiency. Ref. * CP (Wafer level - Chip Probing) * FT (Packaged chip level - Final Test) * SLT (Packaged chip level - System Level Test) * ATE (Automated Test Equipment)
應徵
09/16
新竹縣竹北市3年以上專科
1.新評估項目導入,稽核及品質相關會議安排與執行,有品質管理經驗佳。 2.具有客戶服務意識和了解客戶需求能力,能夠主動回應客戶並提供有效的解決方案。 3.廠商客戶品質問題的處理與回覆、後續的分析追蹤與執行。 4.撰寫與審核8D Report,具備英文撰寫能力及良好跨部門溝通能力,針對品質問題進行追蹤處理。 5.協同維護氣體鋼瓶及化學品更換,氣體及化學產品出貨與倉儲管理。 6.異常排除,緊急應變處理,需多元性發展以協助其他專案報告及設備相關維護活動。 7.主管交辦事務執行。
應徵
10/13
新北市中和區經歷不拘大學
1. MOSFET device research and development, especially Trench MOSFET/ SGT/ SJ. a). Define device layout design and product design rule b). TCAD simulations to build device structure c). Device measurement d). DOE plan for MOSFET new product 2. Interface with Product engineer and Marketing. 3. EFA/ PFA for trouble shooting 4. Build related patent for new design
應徵
09/24
新竹縣竹北市5年以上大學以上
Reporting to MOSFET Development Manager, you will work as Sr. MOS Development Engineer to be responsible for process integration, development and optimization. About the job: Work with product designer to create new device structure ideas and develop the necessary Mosfet/ IGBT /Diode technologies Closely work with internal process experts and external foundry partners to set up the required technologies and processes to produce the prototypes and with test labs to assess results vs. simulations / expected behavior. Responsible for experimental matrix design to evaluate and optimize design vs. specification. Co-work with fab engineering teams to generate the final design rule menu and electrical parametric specifications. Participation in fab selection and evaluation for future foundry locations. Participate and help the Design Engineers and Product Engineers on reverse engineering analysis when necessary. Act as the internal expert of semiconductor devices and processes to provide the necessary information and advices to designers on new technologies. Short term travels for business trips and trainings. About you: Knowledge of semiconductor device physics, such as Diode, BJT, MOSFET, and IGBT…etc and understanding of complex interactions between different fabrication processes. Experiences in semiconductor process development, and basic knowledge in semiconductor device characterization. Ability of arranging tests with 3rd party labs and comfortable with working in Lab for device characterization. Good writing/reading/communication in English is a MUST. The ability to operate independently in a cross-cultural working environment. Experiences in both conventional Bipolar, CMOS, DMOS processe Understanding or experiences in power semiconductor devices assembly and applications would be preferred. Knowledge and experiences of material analysis or Failure analysis tools, such as SRP, SIMS, SEM…etc. Familiar with mask generation, wafer fab process flow and in-line/PCM specifications. Knowledge and experience in one or more of the following areas would be a plus, but not must: o Test pattern generation o Semiconductor process/device modeling o Basic assembly & test processes.
應徵
10/08
新竹縣竹北市2年以上大學
1.了解基礎電路設計。 2.測量RF電信。 3.有低良率分析經驗。 4. Characterize and analyze the performance of PA/LNA/Switch and RF Front-end Module. 有以上經驗者佳。
應徵
10/16
歐特明電子股份有限公司汽車及其零件製造業
新竹市經歷不拘大學
1.製造流程建立與SOP撰寫、維護 2.產品導入及問題處置追蹤 3.良率提升及製程優化 4.客訴、不良分析與處置 5.工程變更導入及追蹤. 6.設備治工具開發驗證及維護管理與異常檢修 7.工廠與產品開發人員之間的溝通協調 8.其他主管交辦事項
應徵
10/13
新竹縣竹北市3年以上碩士以上
【工作內容】 1. 熟悉2.5D/3D架構,如CoWoS、WoW等技術家族。 2. 具備WoW hybrid bonding技術,能支援開發與量產。 3. 執行電性失效分析(EFA)與產品參數規格特性分析,協助問題釐清與品質提升。 【職務需求】 1. 3年以上製程整合相關經驗,熟悉2.5D, 3DIC, Hybrid Bonding優先。 2. 熟悉半導體DRAM製程技術,包括光罩設計、蝕刻、CMP、鍵合。 3. 具備製程良率分析、故障排除與問題解決能力。 4. 熟悉跨部門溝通與專案管理,能有效協調多方資源。
10/15
新北市三重區3年以上碩士以上
1. Develop power device. 2. Design new device architectures and layout to meet customer's request. 3. Work closely with foundry team to reach mass production of the new process. 4. Device reliability judgment and analysis.
應徵
10/13
新竹市3年以上大學
1. 新產品開發驗證以及量產條件的決定 (Corner skew, implant fine tune) 2. 量產品管理及良率(CP/FT)改善 1) Single/Sysematic Low Yield : WAT Correlation, inline tool correlation)分析比對 2) Device fine tune for Yield maintain 3) WAT parameters layout, measurement condition 3. 量產品產品特性分析,客退品分析報告 4. 新技術開發平台開發 (New device development)
10/16
新北市新店區經歷不拘碩士以上
1. 新元件的開發和元件特性量測,和失效分析。 2. 新製程的導入和整合。 3. 協助產品開發過程將成本降低。
應徵
10/14
新北市樹林區經歷不拘碩士以上
1.研發 SiC / GaN 新技術與產品設計,應用於 5G、IoT、AI Server、電動車等領域 2.負責新產品導入、封裝設計與量產評估 3.優化製程與成本結構,提升產品良率與競爭力 4.規劃與執行可靠度測試,撰寫技術文件並回應客戶導入需求 5.與內部團隊協作推進專案並支援技術移轉 1.Develop innovative SiC / GaN technologies and product designs for applications in 5G, IoT, AI servers, and EVs 2.Lead new product introduction, packaging structure, and mass production evaluation 3.Optimize process flow and cost performance to enhance product competitiveness 4.Plan and execute reliability testing, documentation, and customer technical engagement 5.Collaborate with cross-functional teams to ensure smooth project delivery and knowledge transfer
應徵
10/09
永翎電子有限公司半導體製造業
新竹縣竹北市5年以上大學以上
•Design reliability test plan process for device life time evaluation •Coordinate with third party suppliers on device WAT/CP •Coordinate with third party suppliers on reliability test and failure analysis of power devices
應徵
10/14
新竹縣寶山鄉3年以上大學以上
1.客訴分析處理與協助廠內改善跟催 2.處理客戶生產加工上所遭遇的問題, 解決並提供協助與對策 3.協助集團公司處理產品可靠度驗證與客訴問題 4.產品可靠度驗證暨產品可靠度監控 5.協助改善可靠度作業流程 6.HTOL/bHAST/PTC burn-in board規劃 7.ISO文件/表單制定及修改 8.其它主管交辦事項
應徵
10/13
歐特明電子股份有限公司汽車及其零件製造業
新竹市3年以上專科
1. 小批量試產實作 2. 新產品製造流程制定 3. 治工具設計、優化 3. 試製參數、DATA收集、分析 4. 試產問題發掘、回饋、追蹤 5. 量產前初版SOP撰寫
應徵
10/01
新竹市5年以上碩士以上
Please apply this role through https://careers.synopsys.com/job/hsinchu/r-and-d-engineering-sr-staff-engineer/44408/84900058096 Synopsys is looking for motivated Product Engineer to help design, develop and test state of the art Static Timing, Characterization and Library modelling tools. The primary focus of the Product Engineer is closely working with R&D team, to influence technologies/solution roadmaps and provide R&D team with accurate input from Field AEs, helping them focus on the most critical design challenges and help define solutions to critical problems. The engineer will work closely with Field AEs, ensuring overall consistency of end-to-end design and analysis flow to meet customer needs. The engineer will also work with Sales and Marketing teams to find and develop new markets, drive new tool evaluations and help customers with the adoption and continuous usage of Static Timing, Characterization and Library Modelling, thus enabling Chip Design customers achieve best Timing, Power and Characterization Goals. Synopsys’ existing and forthcoming tools offer an advanced transistor-level static timing characterization and library modelling solution that addresses the existing and emerging challenges in custom and memory design. They offer predictability and improved productivity to designers. Their concurrent timing, SI features and advanced variation aware analysis enables designers to accurately and quickly identify design issues early-on and avoid expensive late-finding of problems in silicon. Main responsibilities: • Drive new products and new product features that exceed customer needs. • Work with RnD to enable timely implementation of new products and features, and important bug fixes. • Provide consultation to prospective users and/or product capability assessment and validation. • Provide tool trainings to customers and Field AEs. • Provides technical expertise to sales staff through sales presentations and product demonstrations. • Assists the sales staff in assessing potential application of company products to meet customer needs and preparing detailed product specifications for the development and implementation of customer applications/solutions. Requirements: We are looking for an innovative, motivated, and dependable person, with at least BS degree and 8+ years of recent hands-on experience including: · Exceptional expertise in transistor-level analysis and debug circuit level issues for SRAM, RF, ROM memories and Standard Cells. · Good exposure to static timing concepts and CMOS engineering fundamentals. · Good knowledge of TCL and or other scripting languages. · Very good communication, social and leadership skills. Plus: · NanoTime or PrimeLib experience highly desirable.
應徵