「元件工程師」的相似工作

Overview: The Senior TCAD Engineer will be a key member of our technology development team, responsible for advanced modeling and simulation of semiconductor devices and fabrication processes. This role involves defining and executing TCAD projects for novel device architectures, optimizing performance, and analyzing results to guide process integration and design teams. Key Responsibilities: • Develop and validate TCAD models for advanced technology nodes. • Run simulations to assess device performance (IV, CV, breakdown, reliability). • Interpret results to guide design and process improvements. • Collaborate with engineering teams to align on technology roadmap. • Act as TCAD expert and provide technical support. • Automate simulation tasks using scripting (Python, Perl, TCL). • Compare simulations with silicon data and resolve discrepancies. • Prepare technical reports and present to cross-functional teams. • Stay updated on TCAD trends and enhance modeling capabilities. • Mentor junior engineers and contribute to IP development. Qualifications: • 5+ years of hands-on experience in TCAD process and device simulation within the semiconductor industry. • Deep understanding of semiconductor device physics and fabrication processes. • Expertise with commercial TCAD simulation tools such as Synopsys Sentaurus or Silvaco Atlas. • Proficiency in scripting languages (e.g., Python, Perl, TCL) for tool automation. • Experience with analog focused process technologies, particularly high voltage transistors such as drain extended CMOS or LDMOS devices.

1. 專案開發前期: 協同SA訂定規格/設計環境建構/競品特性分析/協同PM訂定開發時程表 2. 專案開發期間: 支援電路設計及整合/定期招開設計檢查會議/定期追蹤開發進度/確保專案各站點完成時程/準備各站點檢查資料及文件/測試相關資料的準備 3. 專案開發後期: 分析CP驗證數據/確保良率達標/協同SA,RD,TE進行除錯分析/確保達送樣標準

Overview: The Senior High Voltage LNDMOS Device Engineer at Diodes, Inc. leads the design and development of advanced power semiconductor devices. This role focuses on enhancing LNDMOS technology to deliver reliable and efficient solutions for automotive, industrial, consumer, and renewable energy applications. By combining device physics with practical manufacturing, the engineer ensures high-performance products that meet industry standards. Key Responsibilities: • Device Design: Develop high-voltage LNDMOS devices using CAD/TCAD tools, optimizing performance and reliability. • Process Integration: Work with process teams to define fabrication flows and ensure manufacturability and yield. • Characterization: Conduct electrical and reliability testing; analyze data to improve device performance. • Technology Innovation: Explore new structures and materials to enhance LNDMOS capabilities. • Failure Analysis: Investigate device issues using diagnostic tools; provide solutions and improvements. • Cross-functional Collaboration: Coordinate with design, process, test, packaging, and product teams. • Documentation: Prepare technical reports and present findings to stakeholders. • Product Qualification: Support reliability testing and ensure compliance with standards. • Yield & Cost Optimization: Analyze production data to improve yield and reduce costs. • Technical Support: Assist application teams and customers with device integration and troubleshooting. Qualifications: • At least 10 years in power semiconductor device engineering, focusing on high-voltage LNDMOS or LDMOS design and fabrication. Experience with IGBT or SiC/GaN MOSFETs is a plus. • Skilled in device/process simulation tools (e.g., Sentaurus, Atlas). • Solid understanding of semiconductor physics, breakdown mechanisms, and reliability. • Practical experience in wafer fabrication, cleanroom operations, and device testing. • Familiar with advanced failure analysis tools and techniques. • Knowledge of reliability standards and ruggedness requirements. • Proficient in statistical analysis and data-driven problem solving.

● 光學模組機構設計 ● 光學系統架設與檢測分析 ● 光學系統相關技術專利佈局 ● RF射頻電路設計與分析 ●矽光子產品DC/RF量測與分析

1.新評估項目導入，稽核及品質相關會議安排與執行，有品質管理經驗佳。 2.具有客戶服務意識和了解客戶需求能力，能夠主動回應客戶並提供有效的解決方案。 3.廠商客戶品質問題的處理與回覆、後續的分析追蹤與執行。 4.撰寫與審核8D Report，具備英文撰寫能力及良好跨部門溝通能力，針對品質問題進行追蹤處理。 5.協同維護氣體鋼瓶及化學品更換，氣體及化學產品出貨與倉儲管理。 6.異常排除，緊急應變處理，需多元性發展以協助其他專案報告及設備相關維護活動。 7.主管交辦事務執行。

1.了解基礎電路設計。 2.測量RF電信。 3.有低良率分析經驗。 4. Characterize and analyze the performance of PA/LNA/Switch and RF Front-end Module. 有以上經驗者佳。

Reporting to MOSFET Development Manager, you will work as Sr. MOS Development Engineer to be responsible for process integration, development and optimization. About the job: Work with product designer to create new device structure ideas and develop the necessary Mosfet/ IGBT /Diode technologies Closely work with internal process experts and external foundry partners to set up the required technologies and processes to produce the prototypes and with test labs to assess results vs. simulations / expected behavior. Responsible for experimental matrix design to evaluate and optimize design vs. specification. Co-work with fab engineering teams to generate the final design rule menu and electrical parametric specifications. Participation in fab selection and evaluation for future foundry locations. Participate and help the Design Engineers and Product Engineers on reverse engineering analysis when necessary. Act as the internal expert of semiconductor devices and processes to provide the necessary information and advices to designers on new technologies. Short term travels for business trips and trainings. About you: Knowledge of semiconductor device physics, such as Diode, BJT, MOSFET, and IGBT…etc and understanding of complex interactions between different fabrication processes. Experiences in semiconductor process development, and basic knowledge in semiconductor device characterization. Ability of arranging tests with 3rd party labs and comfortable with working in Lab for device characterization. Good writing/reading/communication in English is a MUST. The ability to operate independently in a cross-cultural working environment. Experiences in both conventional Bipolar, CMOS, DMOS processe Understanding or experiences in power semiconductor devices assembly and applications would be preferred. Knowledge and experiences of material analysis or Failure analysis tools, such as SRP, SIMS, SEM…etc. Familiar with mask generation, wafer fab process flow and in-line/PCM specifications. Knowledge and experience in one or more of the following areas would be a plus, but not must: o Test pattern generation o Semiconductor process/device modeling o Basic assembly & test processes.

【工作內容】 1. 熟悉2.5D/3D架構，如CoWoS、WoW等技術家族。 2. 具備WoW hybrid bonding技術，能支援開發與量產。 3. 執行電性失效分析（EFA）與產品參數規格特性分析，協助問題釐清與品質提升。 【職務需求】 1. 3年以上製程整合相關經驗，熟悉2.5D, 3DIC, Hybrid Bonding優先。 2. 熟悉半導體DRAM製程技術，包括光罩設計、蝕刻、CMP、鍵合。 3. 具備製程良率分析、故障排除與問題解決能力。 4. 熟悉跨部門溝通與專案管理，能有效協調多方資源。

•Design reliability test plan process for device life time evaluation •Coordinate with third party suppliers on device WAT/CP •Coordinate with third party suppliers on reliability test and failure analysis of power devices

製程整合/元件開發

1. Foundry co-work and contact window. 2. Handle co-development of power, MCU related applications , mass production & yield ramp up . 3. It's better with Foundry process integration or product experience.

1.ESD/TVS保護元件設計 2.積體電路系統級ESD防護設計 3.等主管交辦事項

1.製造流程建立與SOP撰寫、維護 2.產品導入及問題處置追蹤 3.良率提升及製程優化 4.客訴、不良分析與處置 5.工程變更導入及追蹤. 6.設備治工具開發驗證及維護管理與異常檢修 7.工廠與產品開發人員之間的溝通協調 8.其他主管交辦事項

1.客訴分析處理與協助廠內改善跟催 2.處理客戶生產加工上所遭遇的問題, 解決並提供協助與對策 3.協助集團公司處理產品可靠度驗證與客訴問題 4.產品可靠度驗證暨產品可靠度監控 5.協助改善可靠度作業流程 6.HTOL/bHAST/PTC burn-in board規劃 7.ISO文件/表單制定及修改 8.其它主管交辦事項

1. 具備矽光子相關 EDA 版圖設計軟體 使用經驗（如 Cadence Virtuoso、Synopsys OptoDesigner、Luceda IPKISS 等）。 2. 熟悉矽光子 光學模擬與設計優化，能操作 Lumerical FDTD / MODE / INTERCONNECT 等模擬軟體，並具備量測與驗證能力。 3. 具備矽光子 / 光學測試 / 光學元件開發與設計相關經驗。 4. 具有良好的技術文件撰寫能力，能清楚表達設計思路與實驗結果。

【產品範疇】 1.LCD display driver 2.AMOLED display driver 3.TDDI display driver 4.Automotive 【工作內容】 1.Display driver 電性量測 2.量測環境設立 3.報告彙整與確認 4.RC Loading評估 【需求條件】 1.熟悉電路圖繪製 2.熟悉示波器 / 數位電表操作

1. New FAB & new process survey. 2. Design kit preparation. 3. New product tape-out / pilot run / yield enhancement .

Focus areas: Delivery, cycle time, and line yield. 1. Handover from RD and maintain mass production product 2. Line Yield enhancement and monitor 3. 有在MOS CP/FT廠，或BGBM 廠，孰悉運作等相關經驗者尤佳。 4. 擴產驗證評估 5. Back-end process monitor and maintain

1. 根據DRAM新開發產品規格協助測試部門完成相關測試程式、設備之準備。 2. 從事產品(含本公司及競爭者)特性分析與比較，提供工程技術改進或產品利基市場之推廣。 3. 參與DRAM新產品開發驗證及系統驗證除錯，協助將產品快速導入量產。 4. 規劃良率/可靠性改進時程，協調外包廠、代工廠、設計單位從事產品良率/可靠性提升。 5. 製訂量產流程，從事量產流程之最佳化。 6. 規劃後段工程成本改進時程，降低後段工程成本。 7. 量產移轉時，須完成產品特性報告，並解決客戶端應用問題。

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