「Semiconductor Packaging Engineer, Up to Senior Staff (3078479)」的相似工作

1.新產品導入 2.工程實驗 3.Module Board驗證及維修 4.異常排除及分析 5.產線良率改善

★乾坤科技(台達集團): 放眼全球製造舞台，多項職缺歡迎挑戰 優渥獎酬多項福利，共事頂尖人才！ 您對海外舞台抱持著熱情與抱負，覺得沒有機會施展嗎 現在，我們歡迎對海外工作有興趣的您，一同加入我們的行列！ 乾坤科技(台達集團)提供給您絕佳的工作機會，將於【製造體系單位】接受一系列教育訓練，安排至乾坤海外製造廠據點輪調歷練，未來有機會外派【模具設計_相關職務】。若具其他語言能力如英文、泰文、日文、德文或西班牙文更佳，歡迎有興趣的您投遞此職缺，我們將竭誠為您安排相關面談事宜。 乾坤科技(台達集團)，期待與您一同成長！ 【Preference】 大學以上畢業(電子電機、機械、工程系所尤佳)。 具良好溝通協調、團隊合作、問題解決能力、積極主動、抗壓性佳、能快速學習適應，對生產製造及海外事務富熱忱者，歡迎您的加入!

Job Description · Optimize die bonding pad, flip chip die plot, and substrate layout to streamline design complexity and reduce cost for ASIC and SiP packaging solutions, including SSD controllers, NAND BGA, uSD, SD, and USB products. · Support the development and integration of advanced packaging technologies, with a focus on standalone ASIC, MCM FCBGA, and silicon interposer designs. Emphasis is placed on interposer/substrate co-design, design rule definition, and cross-functional collaboration. · Conduct substrate layout feasibility studies, die fitment analysis, and prepare comprehensive design documentation. · Maintain and manage design libraries, and generate accurate bonding diagrams to support layout and assembly processes. · Collaborate closely with hardware, assembly, and packaging engineering teams across multiple sites to enable new product development and continuous substrate design improvement. · Interface with assembly houses and substrate vendors to perform design reviews, ensure compliance with design rules, and support manufacturability. Qualifications REQUIRED: Master’s or Bachelor’s degree in Materials Science, Electrical/Electronics Engineering, or other relevant engineering or science disciplines. Up to 3 years of design experience in semiconductor packaging, substrate design, or related fields. Familiarity with advanced packaging technologies such as FCBGA, MCM, or interposer-based designs is a plus. Strong foundation in design principles, materials, and electrical performance considerations. Ability to work collaboratively in cross-functional teams and communicate effectively across disciplines. SKILLS: Proficient in EDA tools, including Cadence SIP/Allegro, AutoCAD, CAM, and Valor for substrate and package design. Solid understanding of advanced packaging design and manufacturing processes, particularly for flip chip and substrate-based technologies. Strong communication and interpersonal skills to effectively collaborate across cross-functional and global teams. Familiar with substrate fabrication and manufacturing workflows, including design rule interpretation and vendor engagement.

工作內容： 負責 IPM 與 SoC 封裝結構熱路設計與分析 進行散熱模擬（ANSYS / COMSOL / Icepak） 設計基板與 RTL layer 封裝導熱路徑 協助機構工程師整合熱界面材料（TIM、散熱底座） 分析模組熱阻、功率密度與可靠度 條件需求： 機械 / 材料 / 電子封裝相關科系 熟悉熱傳導分析與模擬工具 理解電力電子模組或半導體封裝結構 能閱讀英文技術文件與規格書 加分條件： 有 CoFOS / SiP / GaN 封裝設計經驗 熟悉散熱材料、導熱膠與基板製程 具新創研發經驗或產品整合能力 工作地點： 台北市大安區基隆路四段 43 號 國立臺灣科技大學國際大樓育成中心

* OSAT (Assembly/Test) 良率異常分析 & 處理。 量產測試驗證，確保量測參數 & 規格符合設計要求。 * 測試結果資料分析，提供良率改善 & 測試流程優化建議。 * CP / FT / SLT 數據追蹤，擬定調整製程參數 or 條件。 測試開發、Debug & 參數優化，提升測試效率 & 良率穩定度。 * 與內部製程/設備/品保單位進行問題分析，釐清異常並提出改善方案。 * 支援測試需求 & 技術交流，確保產品測試時程 & 品質達成量產目標。 1. Co-work w/ functional engineering team member (TME/DE/TD/TE/RE) to make new product has good definition, Risk evaluation and Build comprehensive testing plan / Qual plan, etc. 2. Co-work w/ other Engineering team member to ensure all new product can be thoroughly Manufactured, Characterized and Qualified for reliabilities and qualities. 3. Organize assignments and independently schedules to complete assigned tasks timely and make project finished efficiently. 4. Have good Coordination and Data Analysis to solve difficult problems through application of various techniques and approaches to develop effective and practical solutions that result in improved products, processes with good quality. 5. Co-work with MediaTek - Taiwan Team, and HCLTech - India Team. 6. Annual salary: 800K NTD and above 7. Onsite MediaTek - Hsinchu Science Park Office This position is set for PE (Product Engineer) to coordinate new product development activities, ensure timely completion of all new products manufacturing, testing, characterization, qualification and releasing with good consistency, quality and efficiency. Ref. * CP (Wafer level - Chip Probing) * FT (Packaged chip level - Final Test) * SLT (Packaged chip level - System Level Test) * ATE (Automated Test Equipment)

MaxLinear is seeking a highly skilled and motivated Semiconductor Technologist to join our global team. This role requires a strong foundation in semiconductor process technologies, excellent analytical capabilities, and the ability to collaborate effectively across regions and functions. In this role, you will be responsible for the following: • Interface to semiconductor foundries (not limited to fabs in Taiwan) and other technology partners (e.g. design tool vendors & IP vendors). • Work with the technology team in US to review and analyze process technology, PDK and related for new product development. • Work with the technology team & the operations teams (product engineering, test development, and quality & reliability assurance) in US, EU, & Asia to complete product transfer to production. • Work with the operations teams to sustain volume production including, but limited to : - Process WAT/PCM data analysis - Process yield analysis and improvement – continuous improvement - Product yield analysis and improvement – specific to each low yield issue - Logistics management for both engineering & production lots. - Address any production issues – for example, wafer RMA, and foundry excursion. - Review monthly Cpk, yield and CIP activities with foundry partners. • Excellent communicator with internal and external partners to acquire necessary information for technical and business decisions.

1.Communicate with customer/partner and subcontractor to define the package design requirements, or specifications. 2.Propose the package size, structure according to requirements and specifications from customer. 3.Design the package and optimize to meet product specifications, coworking with related layout, electrical and thermal engineering teams. 4.Prototyping document preparation 5.Link with suppliers and follow up the development trend.

你將加入的團隊： 我們是一個重視 協作與知識分享 的團隊，鼓勵開放溝通與跨部門合作。你將有機會參與多樣化的專案，並在導師與資深工程師的指導下快速成長。我們提供技術培訓、職涯發展規劃，以及參與國際合作的機會，幫助你在職涯中持續進步。 【職位描述】 我們正在尋找一位細心且積極學習的 Layout 工程師 加入我們的團隊。此職位將參與 IC 及封裝設計的物理佈局工作，並與設計、製程及驗證團隊密切合作，確保設計品質與時程。 這是一個絕佳的機會，讓你在專業領域中持續成長，並與經驗豐富的工程師一同合作，學習最先進的技術與流程。 【工作內容】 1.協助執行 IC 佈局設計，包括 floorplanning、placement、routing 及驗證。 2.參與 Package Layout 設計，並與封裝工程師合作完成設計需求。 3.使用 Allegro 等工具進行封裝佈局設計與修改。 4.執行 DRC、LVS、ERC 等設計檢查，確保設計符合規範。 5.支援 Tape-out 相關流程與文件準備。 6.撰寫與維護設計流程文件與佈局規範。 7.積極參與團隊討論與技術交流，分享學習成果並協助他人。 【基本資格】 • 電機、電子、資訊工程或相關科系學士學位。 • 具備 2 年以上 Package Layout 設計經驗。 • 熟悉 Allegro 或其他封裝佈局工具。 • 具備基本 IC 佈局知識，並願意學習 Analog/Digital Layout 技術。 • 良好的溝通能力與團隊合作精神。 • 細心負責，能在時程壓力下完成工作。

1、先進封裝評估與設計 (Flip Chip, LGA, ToF...) 2、封裝設計 (QFN, QFP, BGA) 3、封裝wire bonding 製圖評估 4、封裝Thermal評估與改良 5、封裝成本改善/良率提升研究

★Job Purpose: Drive and execute packaging development with OSATs, and support iCana team for package define, assembly build, package qualification, and safe launch. ★Principal Accountabilities: 1. Work with OSATs for package development and execute the projects from prototying, NPI, to Mass Production 2. Cooperate with design/engineering team for package define, assembly build, and package qualification plan 3. Provide build-related document (build instruction, bonding diagram, POD, BOM..etc) 4. Responsible for package yield management, on time delivery and good quality of deliverables 5. Support failure analysis, root cause finding, and continuous improvement process 6. Oversee the new technologies and package innovation

About the job We are looking for a new key member of the Process Engineering team that is responsible for all programs related to the improvement of yield and manufacturing robustness as well as constituting the company's center of excellence with regards to semiconductor manufacturing technology. This position will be responsible for tape-out handling, qualification-build coordination, and driving the respective processes. You will also be working in close interaction with subcontractors and internal departments (R&D/Project Manager/Test engineering) to achieve a smooth and robust path to first silicon success, while ensuring continuous development by adding your personal expertise and experience. Key Responsibilities • Liaise among subcons, R&D and PM to provide technical support for the new product introduction (NPI) process • Facilitate tape-out handling and training for R&D and Product Engineering • Interface between foundry and R&D for new technology adoption including optional process step evaluation to meet NPI performance requirement • Lead design rule check (DRC) related discussions and drive DRC issue closure for NPI • Track NPI process through tape out to final test and ensure 1st Si success • Support the analysis of bench test yield or automatic test equipment yield issue of pilot run wrt manufacturing, c/o R&D, TE • Work with R&D and define corner split condition and summarize NPI corner lot report • Coordinate product qualification builds and work with the reliability team on qualification issues encountered • Coordinate process parameter fine-tuning within a defined range to meet the performance requirement • Assess new process technologies in terms of cost/performance/reliability • Drive corrective actions and continuous improvement programs related to qualification builds Qualifications and Skills • Bachelor's or Master’s degree within a relevant field • At least 8 years of experience in semiconductor manufacturing, IC design, or product engineering • The ability to navigate in a global matrix organization • Good written and verbal communication skills in English Working for Nordic Working for Nordic Semiconductor, you will be inspired and supported to develop yourself. Our teams enjoy a professional and informal working environment. We value and encourage the continuous development of skills and expertise to the highest levels. We are proud of our Norwegian heritage, our highly skilled international workforce, our world-leading innovation, and our professional brilliance. We offer a variety of tasks and projects and the possibility to work alongside some of the world’s industry experts within their field. We encourage our employees to question the established and innovate while expecting professionalism, commitment, and the will to learn. Benefits • Competitive salary with short- and long-term incentive plan • Flexible working hours • Group insurance • Family-friendly policies, insurance, and benefits

1. 封裝固晶(Die-Bond)製程作業。 2. 固晶(Die-Bond)相關設備保養維護、異常排除、效能改善、改機調機。 3. 封裝固晶(Die-Bond)製程改善與開發。 【本職缺可透過104應徵，也歡迎直接至穩懋官方網站投遞，增加履歷曝光度】請至穩懋官方網站投遞個人履歷表，此職缺履歷登錄網址：https://www.winfoundry.com/WinTalentPool/JobRequirement/Edit/1047

Please apply for this position on NXP official website: https://pse.is/836k2a Job Responsibilities: APAC Central Competence Team works with external foundries to ensure stable chip supply for business lines across NXP. The primary responsibility of this role is to locally drive the lead products ramp up under new technology introduction (NTI). The key areas of responsibility of the jobholder are: 1. Close collaboration with foundries, NXP technology groups, the business lines and various other stakeholders to qualify and release process 2. Front end process safe launch owner. Closely work with foundries at ramp up phase and drive for manufacturability and yield improvement. 3. Interface with key customers on critical projects. 4. Lead and steer the projects towards timely completion to support NXP business needs 5. Main decision maker on subjects related to process integration, striking a good balance between the various dynamics in a project; not limiting to technical judgement, resource planning, project schedule, logistics, supplier relationships etc Requirements / preferences: 1. Bachelor or MSc in physics or electrical engineering. 2. >10 years of experience with front-end IC process integration, working in foundries’ production or development teams 3. In-depth knowledge of IC devices and processes. FinFET and NVM knowledge is a plus. 4. Strong understanding of yield enhancement techniques and data analysis 5. Must be fluent in English and Mandarin 6. Hands on experience in being a lead; leading teams with responsibilities in development / transfer projects or production ramp up. 7. Good communication skills. Having the ability to influence and steer a discussion 8. Pro-active working attitude, creative, pragmatic, enterprising and result driven. 9. Familiar in managing/working with foundries, maximizing leverage from foundries

1.了解基礎電路設計。 2.測量RF電信。 3.有低良率分析經驗。 4. Characterize and analyze the performance of PA/LNA/Switch and RF Front-end Module. 有以上經驗者佳。

- Collaboration with sales team to approach new business opportunities. - Presentation of factory engineering capability and R&D technology roadmap to customer. - Preliminary information collection and technical topics discussion with customer. - Following up customers’ needs, coordinate cross function teams and come out solid proposal for internal/external review. - Tracking the progress of the engaged projects and provide the status updated report periodically. - Jobs assigned by supervisor.

1. Foundry co-work and contact window. 2. Handle co-development of power, MCU related applications , mass production & yield ramp up . 3. It's better with Foundry process integration or product experience.

【The Role】 The Product development engineer will provide technical solution in Microenvironment mainly focus on FOUP (Front Opening Unified Pod) products through product testing in laboratory and simulation software. This role is ideal for someone who is passionate about mechanical design, problem-solving, and working closely with cross-functional teams to deliver high-quality solutions for the semiconductor industry. 【In this role you will】 • Design and simulate mechanical components using SolidWorks • Develop and test mechanical structures and systems • Develop and test FOUP functions per internal and external requirement • Collaborate with customers to troubleshoot issues, build models, and identify root causes • Work closely with the Sales and MTS teams to align on product requirements and solutions • Support the design team in refining and improving product specifications • Contribute to continuous improvement efforts across product development 【Traits we believe make a strong candidate】 • Bachelor's degree or above in Mechanical Engineering or a related field • 3~5 years of relevant engineering experience • Proficient in SolidWorks, including both design and simulation tools • Hands-on experience with injection molding (required) • Strong mechanical design and testing background • Knowledge or practical experience in CFD (Computational Fluid Dynamics) • Excellent problem-solving and analytical thinking skills • Fluent in English, both written and spoken, with the ability to communicate technical concepts clearly • Strong team collaboration skills; able to work effectively with others, share ideas, and contribute to team success • Self-motivated, detail-oriented, and eager to learn and grow • Experience in the semiconductor industry is a plus • Familiarity with FOUP (Front Opening Unified Pod) systems is a plus 【Your success will be measured by】 • Quality, reliability, and innovation in mechanical design and simulation • Effectiveness in identifying and resolving customer issues • Contribution to cross-functional collaboration with Sales, MTS, and design teams • Timely delivery of project milestones and technical solutions • Impact on product improvement and alignment with customer needs

UltraSense Systems is looking for strong Mechanical & Simulation Engineer. Main responsibilities include integrating UltraSense HMI products across multiple applications from mobile to automotive to IoT and involved in the entire development process from initial concept through manufacturing. Major Responsibilities 1. In charge of product designs of consumer electronics, automotive, and appliances and involved in the entire development process from initial concept through manufacturing 2. Assess/analyze the mechanical structure and new piezoelectrical sensor with commercial finite element software and optimize sensor performance by the simulation result. 3. Provide detail design recommendations to the Product Design teams based on Finite Element Analysis (FEA) results, contributing to the product design and sensor performance assessment. 4. Aim at improving user experience through well-executed design with our sensor interface and build Mockup in practices 5. Cooperate with cross-functional teams for innovative solutions, inclusive of Mechanical Engineering, Optimizing Sensor Design and Issue-resolving Design Minimum Qualifications Master's degree or above in science or technical discipline with a minimum of 3 years of mechanical design/simulation experience 1. Proficient with commercial finite element software, mainly ABAQUS; can build meshes for thermal and structural simulations. Other fields are pluses. 2. Computing expertise in one or more of the following areas: FEM tools, programming language (python, MATLAB, C, Fortran, etc.), PDE solving methodology and technics. 3. Familiar with system/product level characterization and material testing 4. Strong conceptualization and creative problem-solving skills, strong mechanical aptitude, and basic understanding of stress-strain 5. Must be effectively bilingual in Mandarin and English; excellent written and spoken communication skills are required.

目前所代理的其中之一原廠_韓國知名大廠Simmtech Co., Ltd. 正擴大徵才招募優秀的專業人才加入，以擴大營運版圖及創造共享共榮的職涯未來。 1.開發潛在客戶，拓展市場，以達成業績目標。 2.定期拜訪客戶，維繫穩定客戶關係。 3.針對客戶及原廠狀況訂定策略及行動計劃。 4.開發新產品及拓展業務。 5.負責業務推展，傳達及說明公司各項業務重大訊息、活動及產品。 6.國外原廠與客戶間的溝通橋樑，需不定期國內外出差。 7.提昇客戶送樣次數，除sales的角色外，亦擔任TPM及Pre-sales的角色。 ※資深產品經理另需負責：設定年度業務目標及規劃行動執行策略。 Simmtech官網，請參考：https://eng.simmtech.com/ Simmtech 企業簡介Video請參考：https://eng.simmtech.com/video/video3.aspx

【職位描述】 RVI公司新創的光通訊引擎(Optical Engine)封裝製程開發。負責設計、開發、製程整合、測試先進封裝光模組，涵蓋矽中介層、玻璃中介層、光學器件製程整合、與高階基板。負責從概念到生產的封裝製程設計，製程整合、光源系統封裝、與光引擎品質和性能研究。 【主要職責】 1.負責矽光子產品的光引擎光學結構設計、熱管理、光電轉換、封裝製程整合。 2.協作電路模擬、光學模擬、設計，以及晶片與光學元件的選擇與驗證。 3.與上游廠商討論光引擎電子元件規格、光學元件規格，並提供封裝技術建議。 4.協助完成矽光子光引擎樣品的製作，確保產品符合設計要求並達到高品質標準。 Position Description: Join RVI's innovative Optical Engine development team, focusing on advanced packaging processes for next-generation optical communication engines. This role involves the design, development, process integration, and testing of advanced optical modules, including silicon interposers, glass interposers, optical component integration, and high-end substrates. The engineer will lead packaging process design from concept to production, ensuring system-level performance, thermal and optical optimization, and overall product quality. Key Responsibilities: 1.Lead the design and integration of optical engine packaging for silicon photonics products, including optical structure design, thermal management, optoelectronic conversion, and process integration. 2.Collaborate on electrical and optical simulation, design validation, and component selection for chips and optical elements. 3.Communicate with upstream vendors to define specifications for electronic and optical components, and provide packaging technology recommendations. 4.Assist in the prototyping and fabrication of silicon photonic optical engines, ensuring compliance with design specifications and achieving high product quality standards.

1. Project management for new package (WB/ Hybrid with FC & SiP) 2. Risk assessment for all process of new package. 3. Support new materials and new process development. 4. Cross-functional coordination to meet customer requirements. Required expertise: Proficiency in backend packaging processes, such as Mold, Marking, Ball Mount, or Singulation Saw.

1. 矽光封裝設備評估與測試，參與設備的調試和升級以提升生產效率。 2. 相關封裝材料選用、開發與和製程調整應用。 3. 矽光封裝製程設計測試技術開發 測試與數據收集，協助分析製程參數與結果。 4. 主管交辦事項 5. 與其他部門密切合作，支持新產品開發和製程改善