公司介紹

產業類別

聯絡人

HR

產業描述

其他半導體相關業

電話

暫不提供

資本額

傳真

暫不提供

員工人數

75人

地址

新北市新店區寶高路28-2號501室 (寶高智慧產業園區)

相關連結


公司簡介

iCana是一家專門設計製造用於前瞻無線通訊系統(包含無線通訊基礎設施、互聯網和電動車)無晶圓半導體的供應商,在臺灣、比利時、美國及新加坡均設有辦公室。2022年完成由鴻海集團收購,並與鴻海旗下美國子公司 AchernarTek Inc. 合併,成為鴻海旗下間接持有100%之子公司及事業單位,也是全球 RF 半導體元件供應商。iCana將持續投入無線通訊基礎建設的高性能應用研發,同時強化 5G Sub-6 與毫米波的產品開發,以期在不斷成長的互聯網和電動車市場中擴大業務規模,支援鴻海與無線通訊市場客戶在車輛應用領域及 5G 基礎設施所需。 辦公室位於新店寶高智慧產業園區內。目前資本額為682,299,000元。 iCana 擁有高端技術並提供高端產品,我們非常重視人才,鼓勵創新,歡迎優質人才加入安科諾公司。 At iCana, we are passionate and dedicated to designing and building RF Semiconductor ICs for Wireless Communication. Our company was formed in 2022 when Foxconn acquired arQana Technologies 5G Wireless Telecommunication business. iCana, with R&D offices in Taiwan, Belgium, and USA, is a dynamic international company in the semiconductor industry. We focus on 5G infrastructure and automotive for connected vehicles. In iCana we manage the end-to-end process from designing RF and mmWave integrated circuits to manufacturing them with the foundries. If you are looking for a challenging and exciting career in the world of technology and semiconductors, then look no further. Imagine what you could reach at iCana, where new ideas are turned into inspiring products with extraordinary performance.

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主要商品 / 服務項目

iCana product range is comprised of high-efficiency and cost-effective RF components including power amplifiers, driver amplifiers, low noise amplifiers, and integrated front-end modules along with control components covering a large range of frequency bands for the Wireless Telecommunication industry including applications in Automotive, Consumer, and Wireless Infrastructure. Our products cover: • RF components for next-generation Automotive industry: C-V2X and GNSS • RF components for the Consumer industry: Wi-Fi • RF components for 5G/6G Wireless Infrastructure: sub6GHz/FR1 and mm-wave/FR2 Please visit our web site for more detailed information.

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公司環境照片(4張)

福利制度

法定項目

其他福利

安科諾公司提供優渥的薪資及福利,除了基本的勞健保、退休金提撥及員工福利金之外,並提供團保、健康檢查、Team Building、公司旅遊等。 入職後第一年即享有10天年休假,每年提供10天帶薪病假及2天帶薪家庭照顧假。 每年固定發14個月,另提供績效獎金及研發人員Project Award。

公司發展歷程

2022.08

鴻海集團現金增資新台幣50395萬元

2022.03

由鴻海集團併購, 成為旗下100%持有之子公司, 並更名為iCana.

2019.01

成立安科諾科技有限公司 (Taiwan arQana Technologies Ltd.), 為新加坡arQana Technologies Pte Ltd. 100%持有之子公司

工作機會

廠商排序
8/28
新北市新店區3年以上大學待遇面議
1. 數位電路設計模擬與實作 2. 靜態時序分析,邏輯等價性檢查 3. 跨單位溝通、協調合作完成數位功能設計,確認符合系統規格要求 4. 低功耗設計驗證和自動測試圖樣產生驗證 5. 執行產品研發流程及技術文件產出 6. 持續關注相關技術的發展,精進產品性能和創新 We are seeking a enthusiastic Digital Design Engineer to join our product development team. The chips include digital signal processing data paths and embedded microprocessor systems combined with high precision analog/RF subsystems. This is an excellent opportunity to employ state-of-the-art design methodologies, get exposure to a wide range of technical disciplines and career growth. Key Responsibilities: • Design, simulation, and implementing high-performance digital circuits, ensuring their integration and functionality within our advanced IC products • Static Timing Analysis (STA), Logical Equivalence Checking (LEC), Gate Level Simulations (GLS) • Collaborate with analog/RF engineers to create designs and meet performance and functional requirements • Verifications of Low Power Design Flow, Scan Insertion and ATPG • Validate and characterize digital designs through rigorous laboratory testing and measurements. • Work closely with cross-functional teams, including analog designers, system architects, and test engineers, to ensure successful integration and overall system performance. • Document design specifications, test plans, and results, ensuring thorough and accurate reporting. • Stay current with advancements in digital design techniques and semiconductor technologies, contributing to continuous improvement and innovation initiatives.
應徵
8/28
新竹市3年以上大學待遇面議
1. 數位電路設計模擬與實作 2. 靜態時序分析,邏輯等價性檢查 3. 跨單位溝通、協調合作完成數位功能設計,確認符合系統規格要求 4. 低功耗設計驗證和自動測試圖樣產生驗證 5. 執行產品研發流程及技術文件產出 6. 持續關注相關技術的發展,精進產品性能和創新 We are seeking a enthusiastic Digital Design Engineer to join our product development team. The chips include digital signal processing data paths and embedded microprocessor systems combined with high precision analog/RF subsystems. This is an excellent opportunity to employ state-of-the-art design methodologies, get exposure to a wide range of technical disciplines and career growth. Key Responsibilities: • Design, simulation, and implementing high-performance digital circuits, ensuring their integration and functionality within our advanced IC products • Static Timing Analysis (STA), Logical Equivalence Checking (LEC), Gate Level Simulations (GLS) • Collaborate with analog/RF engineers to create designs and meet performance and functional requirements • Verifications of Low Power Design Flow, Scan Insertion and ATPG • Validate and characterize digital designs through rigorous laboratory testing and measurements. • Work closely with cross-functional teams, including analog designers, system architects, and test engineers, to ensure successful integration and overall system performance. • Document design specifications, test plans, and results, ensuring thorough and accurate reporting. • Stay current with advancements in digital design techniques and semiconductor technologies, contributing to continuous improvement and innovation initiatives.
應徵
8/28
新北市新店區5年以上專科待遇面議
1. 採用CMOS、SOI技術或是III-V GaAs製程進行混合訊號、類比電路和RF射頻電路的電路佈局。 2. 溝通能力佳,能與電路設計工程師一起進行晶片布局檢視和分析。 3. 能配合不同電路設計團隊規劃及安排工作時程,必要時針對佈局工作做出相關的權衡。 4. 解釋LVS、DRC和ERC報告,並和電路設計工程師討論完成佈局的最佳方法。 • Designing complex layout for mixed signal, analog and RF circuits in deep sub-micron CMOS technologies and / or III-V processes. • Reviewing and analyzing floorplans and complex circuits with circuit design engineers. • Working with circuit design team to plan/schedule work and negotiate any necessary layout tradeoffs as needed. • Interpreting LVS, DRC and ERC reports to find the fastest way to complete layout. • Utilizing advanced CAD tools and mask design knowledge to deliver correct and robust layout that meet stringent matching performance, area and power requirements.
應徵
8/28
新竹市5年以上專科待遇面議
1. 採用CMOS、SOI技術或是III-V GaAs製程進行混合訊號、類比電路和RF射頻電路的電路佈局。 2. 溝通能力佳,能與電路設計工程師一起進行晶片布局檢視和分析。 3. 能配合不同電路設計團隊規劃及安排工作時程,必要時針對佈局工作做出相關的權衡。 4. 解釋LVS、DRC和ERC報告,並和電路設計工程師討論完成佈局的最佳方法。 • Designing complex layout for mixed signal, analog and RF circuits in deep sub-micron CMOS technologies and / or III-V processes. • Reviewing and analyzing floorplans and complex circuits with circuit design engineers. • Working with circuit design team to plan/schedule work and negotiate any necessary layout tradeoffs as needed. • Interpreting LVS, DRC and ERC reports to find the fastest way to complete layout. • Utilizing advanced CAD tools and mask design knowledge to deliver correct and robust layout that meet stringent matching performance, area and power requirements.
應徵
8/22
新北市新店區5年以上碩士以上待遇面議
The System Engineer is responsible for RF link budget, for targeted ongoing projects but also for NPI cases. This role plays a pivotal role within the company, serving as a bridge between R&D, Sales and Marketing, and Engineering teams. To ensure these missions, the System Engineer will be in charge of: 1. Detailed Product specifications definition and maintenance - By surveying the competitors’ parts with help of S&M - By compiling and surveying new standards and protocols - By discussing acceptable and realistic numbers with R&D 2. RF link budget simulation and modeling using tools such as Matlab, System vue, ADS,… - RF interference and compatibility - Spectrum management - Help on the definition of key metrics to evaluate the performances, such as AM/AM, AM/PM, EVM, ACLR,… and potential interoperability between them. 3. Providing necessary signals for engineering and R&D teams 4. Guiding the design of RF reference boards including the different product parts of the company 5. Participate to NPI meetings 6. Participate to design review meetings 7. Mentoring the different teams on the new requirements defined by the standards 8. Reporting
應徵
8/27
新北市新店區經歷不拘碩士以上月薪70,000元以上
1. 設計類比電路 (CMOS製程/SOI製程OP、LDO、ADC、DAC等類比電路單元) 2. 電路特性分析和模擬 3. 跨單位溝通、協調合作完成電路、佈局設計,及確認符合系統規格要求 4. 電路板測試驗證及除錯檢討 5. 執行產品研發流程及技術文件產出 6. 持續關注相關技術的發展,精進產品性能和創新 We are seeking a motivated Analog Design Engineer to join our dynamic team. The successful candidate will be responsible for designing, simulating, and implementing high-performance analog circuits, ensuring their integration and functionality within our advanced IC products. Key Responsibilities: • Design and develop analog integrated circuits such as operational amplifiers, voltage regulators, ADCs, DACs, and other analog building blocks in in CMOS and SOI processes • Perform circuit simulations using Cadence Virtuoso, Spectre RF and EMX • Collaborate with layout engineers to create optimized layout designs that meet performance and manufacturability requirements. • Validate and characterize analog circuit designs through rigorous laboratory testing and measurements. • Work closely with cross-functional teams, including digital designers, system architects, and test engineers, to ensure successful integration and overall system performance. • Document design specifications, test plans, and results, ensuring thorough and accurate reporting. • Stay current with advancements in analog design techniques and semiconductor technologies, contributing to continuous improvement and innovation initiatives.
應徵
8/27
新竹市經歷不拘碩士以上月薪70,000元以上
1. 設計類比電路 (CMOS製程/SOI製程OP、LDO、ADC、DAC等類比電路單元) 2. 電路特性分析和模擬 3. 跨單位溝通、協調合作完成電路、佈局設計,及確認符合系統規格要求 4. 電路板測試驗證及除錯檢討 5. 執行產品研發流程及技術文件產出 6. 持續關注相關技術的發展,精進產品性能和創新 We are seeking a motivated Analog Design Engineer to join our dynamic team. The successful candidate will be responsible for designing, simulating, and implementing high-performance analog circuits, ensuring their integration and functionality within our advanced IC products. Key Responsibilities: • Design and develop analog integrated circuits such as operational amplifiers, voltage regulators, ADCs, DACs, and other analog building blocks in in CMOS and SOI processes • Perform circuit simulations using Cadence Virtuoso, Spectre RF and EMX • Collaborate with layout engineers to create optimized layout designs that meet performance and manufacturability requirements. • Validate and characterize analog circuit designs through rigorous laboratory testing and measurements. • Work closely with cross-functional teams, including digital designers, system architects, and test engineers, to ensure successful integration and overall system performance. • Document design specifications, test plans, and results, ensuring thorough and accurate reporting. • Stay current with advancements in analog design techniques and semiconductor technologies, contributing to continuous improvement and innovation initiatives.
應徵
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