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「5G手機,AR,VR 顯示技術 數位IC設計工程師(M1)」的相似工作

聯詠科技股份有限公司
共500筆
09/02
新竹市經歷不拘碩士以上
【產品線描述】 Evolution Video Display 新興顯示器開發: 1. Gaming monitor controller for LCD, OLED and Mini-LED. 專業電競螢幕,極致沉浸競界曲面螢幕,遊戲體驗身歷其境 2. Public display controller for LCD and Micro/Mini-LED. 大型商用顯示器,極窄邊框拼接電視牆,電子白板 3. Electronic Vehicle Display Controller. AR/2D HUD(抬頭顯示器),車用高速顯示介面 4. Advanced Projector Controller. 低延遲的遊戲投影機、短焦投影機、浮空影像顯示器 【工作說明】 電路硬體設計與開發 1. 顯示器或車用顯示系統架構開發 (System Architecture Development) (a) CPU/MCU架構整合 (b) SoC system bus 與 bridge架構規劃設計 Familiar with AXI/AHB/APB/Arbiter (c) DDR memory controller 2. 高速數位介面 High-Speed I/F (a) HDMI TX/RX link layer (HDMI1.4/2.0/2.1) (b) DP TX/RX link layer (DP1.4/2.0) (c) MIPI RX link layer (d) Vx1 link layer (e) USB Type-C controller 3. Picture Quality(PQ) (a) 視訊影像處理,色彩轉換演算法開發有興趣或具經驗 (b) HDR10+, Dobly Vision 4. FPGA 平台設計 5. APR flow (a) Synthesis/STA (b) DFT (c) Low-power flow (d) APR co-work 【必要條件】(熟悉或有相關經驗) 1. 顯示器或車用顯示 CPU/MCU/DDR controller/bus bridge相關經驗 2. 高速數位介面 High-Speed I/F HDMI TX/RX / DP TX/RX / Vx1 相關經驗 3. Picture Quality(PQ) 視訊影像處理經驗 車用相關IC 設計經驗 4. SOC 整合經驗
應徵
09/02
新竹市經歷不拘碩士以上
【產品線描述】 Evolution Video Display 新興顯示器開發: 1. Gaming monitor controller for LCD, OLED and Mini-LED. 專業電競螢幕,極致沉浸競界曲面螢幕,遊戲體驗身歷其境 2. Public display controller for LCD and Micro/Mini-LED. 大型商用顯示器,極窄邊框拼接電視牆,電子白板 3. Electronic Vehicle Display Controller. AR/2D HUD(抬頭顯示器),車用高速顯示介面 4. Advanced Projector Controller. 低延遲的遊戲投影機、短焦投影機、浮空影像顯示器 【工作說明】 1. Gaming 高階顯示器及戶外大型顯示看板 SoC 控制IC 設計, 驗證及量產測試 2. Video/Image/Color 相關演算法開發 3. 高階製程 whole chip 及 IP 整合, DFT 及 low power 設計流程及驗證 【必要條件】(符合下列一或多項者) 1. SoC IC 設計流程實務經驗 2. Whole chip 整合, STA timing 分析, 以及 APR co-work 經驗 3. CPU 架構與整合經驗 4. SoC internal bus 及 bridge 架構規劃及整合經驗 5. 高速數位介面 HDMI,DP, MHL,Vby1 等controller 電路開發經驗 6. 加解密(例如: HDCP 1.x, HDCP 2.2, ...) 硬體電路設計經驗 7. SDR/DDR Memory Controller 設計經驗 8. USB Type C controller 設計經驗 9. 對視訊影像處理,色彩轉換演算法開發有興趣或具經驗
02/04
新竹市4年以上碩士以上
(a) 負責Tcon IC開發 (b) 負責數位影像處理IP開發 (C) 1.整合使用 FPGA IP,具模擬驗證以達功能的需求 2.系統驗證項目的規劃及系統整合與測試 3.開發、撰寫及驗證 Verilog code (D) 1.使用System Verilog、UVM驗證數位IP 2.依據規格擬定測試計畫並建立隨機測試向量 3.與Design Team密切合作,提高function/code test coverage
應徵
08/31
新竹市2年以上碩士以上
1. Architecture design and RTL implementation of Automotive/Smartphone chipset 2. SoC system power and performance analysis 3. SoC system bus and memory subsystem design, integration, and modeling 4. SoC low power design, integration, and modeling 5. SoC functional safety analysis, design, integration, and modeling 6. SoC cyber security analysis, design, integration, and modeling
應徵
09/02
新竹市經歷不拘碩士以上
【產品線描述】 Smart TV Solutions:提供TVSoC、MEMC/FRC及面板相關顯示裝置的控制晶片 ASIC Solutions:提供智能手機、智能電視、電競螢幕、AI Server等產品各種ASIC(包含CoWoS/ChipLet平台)解決方案 【工作說明】 1. 執行SoC IC 設計開發,整合驗證,量產規劃。 2. 高整合 SoC 架構設計與整合規劃 ( Smart TV、FRC)。 3. 應用COWOS、Chiplet 、ADAS的專業知識,解決設計挑戰,持續更新技術趨勢。 4. 先進製程 RTL to Netlist 設計流程規劃與實踐 ( low power、synthesis、STA、LINT、CDC)。 5. 與 APR 合作,確認 Implement (Placement、CTS、Route) & Sign-off (IR、STA、Thermal) 設計品質 。 【必要條件】 1. 電機/電子/通訊/電信工程相關科系 2. 需具備數位電路設計基礎
09/04
新竹縣竹北市經歷不拘碩士以上
【產品範疇】 MOBILE(手持裝置)驅動晶片 【工作內容】 LCD driver(含OLED) Timing Control數位電路的研發設計與驗證 【需求條件】 1.熟悉HDL coding, simulation, synthesis, and STA flow,有量產經驗尤佳 2.熟悉LCD driver(或OLED)規格,具有相關工作經驗尤佳 3.熟悉Timing Control(Global Timing or SRC control timing or GIP timing)數位電路設計,有相關開發經驗者尤佳
應徵
09/05
新竹市經歷不拘學歷不拘
Design CPU functional units. Responsibilities  Defining micro-architecture of the functional units  Writing RTL codes of the functional units  Writing documents of the function units  Working with cross-division teams to resolve functional, performance, power, and frequency issues related to the functional units Qualifications  3+ years of recent experience with Verilog logic design  Knows CPU micro-architecture, e.g. instructions, pipeline, caches, MMU  Knows power consumption of digital circuits  Good communicator in verbal and writing in English
應徵
09/02
新竹市經歷不拘大學以上
【本職缺優先審核至高通官網投遞人選】請至高通官網上傳英文履歷表https://careers.qualcomm.com/careers/job/446706469791 【Talents who apply job through Qualcomm Career Website will be reviewed and considered as top priority】 https://careers.qualcomm.com/careers/job/446706469791 【The Potential Areas To Work】 The main responsibility of this position is to do the performance verification for world-class custom CPU for mobile and portable computers. 【Roles and Responsibilities】 -Proficiency in one or more areas of CPU architecture: fetch, decode, branch prediction, renaming, execute units, SIMD, load/store, MMU, caches, retire, etc. -Verify performance feature between RTL and model, and have ability to troubleshooting -Work with design team and performance team to develop test case and validate new feature
應徵
09/02
新竹市經歷不拘大學以上
【本職缺優先審核至高通官網投遞人選】請至高通官網上傳英文履歷表:https://qualcomm.wd12.myworkdayjobs.com/External/job/Hsinchu-City-TWN/GPU-Compiler-Development-Engineer--up-to-Sr-Staff--Hsinchu-_3057774 【Talents who apply job through Qualcomm Career Website will be reviewed and considered as top priority】 https://qualcomm.wd12.myworkdayjobs.com/External/job/Hsinchu-City-TWN/GPU-Compiler-Development-Engineer--up-to-Sr-Staff--Hsinchu-_3057774 【Job Description】 The largest provider of premium mobile SoC (system on chip) solutions. Adreno GPU has been driving the mobile industry toward rich graphics and gaming experience on smartphones. Now its power efficient GPU technology becomes fundamental to enable some new exciting markets beyond the smartphone like VR/AR, IoT, AI, drone, autonomous driving. GPU compiler is a key component of overall graphics technology, especially in terms of its influence on application’s performance on GPU. We are looking for talented engineers to create world class GPU compiler products to enable high performance graphics and compute with low power consumption. 【Responsibilities】 This position will be responsible for research, development and delivery of Qualcomm's Adreno GPU compiler products to our worldwide customers. At same time, there will be opportunities to influence GPU hardware design based on experience on how our GPU compiler has been used by real world users. 【Minimum Qualifications】 * Good C/C++ programming skills * Good communication skills and teamwork spirit, reliable and self-motivated 【Preferred Qualifications】 * Compiler development. For example, LLVM or GCC * Graphics knowledge or graphics/game software development * DirectX, OpenGL/Vulkan, OpenCL, or CUDA compiler development * D3D/OpenGL/Vulkan/OpenCL/CUDA driver development
應徵
09/01
新竹縣竹北市5年以上碩士
1. Project integration support & implementation, to deliver qualified nestlist from RTL. 2. preSTA/SYN/LEC/postSTA/etc. EDA flow execution and enhancement 3. Timing & power closure 4. Schedule control, netlist optimization, flow coordinator
應徵
09/02
新竹縣竹北市經歷不拘碩士以上
【工作內容】 1. 手機/平板/穿戴/VR/AR…等移動式產品應用環境開發 (軟體/韌體/硬體/FPGA數位電路設計) 2. IC效能最佳化調試演算法研發與自動調校系統開發 3. 協助客戶量產測試方法制定與自動測試系統軟韌體整合 4. 協助客戶產品軟體與驅動程式偵錯 【必要條件】 需熟練C++ / C# 程式語言與Microsoft Visual Studio 開發環境
應徵
06/12
新竹縣竹北市經歷不拘大學以上
a. Job Description: We are looking for a highly motivated RTL Designer to join our team in developing high-performance digital IPs. The ideal candidate will have experience in Register Transfer Level (RTL) design and verification, with a strong understanding of digital logic, microarchitecture, and ASIC/FPGA development processes. The role involves designing and verifying custom hardware IPs for cutting-edge applications. b. Verification: Develop and execute test plans to verify functionality, performance, and power requirements. Create testbenches using SystemVerilog/UVM for functional verification. Perform simulation, debugging, and root cause analysis for design issues. Conduct code coverage and functional coverage analysis to ensure comprehensive testing. Collaborate with verification and firmware teams to validate IP functionality. c. Qualifications: Bachelor’s/Master’s degree in Electrical Engineering, Computer Engineering, or a related field. 2+ years of experience in RTL design and verification. Proficiency in Verilog, SystemVerilog Strong understanding of digital design concepts, including pipelining, clock domains, and low-power design techniques. Experience with simulation tools (e.g., ModelSim, VCS, Questa) and formal verification techniques. Familiarity with UVM methodology and testbench development. Knowledge of scripting (Python, TCL, Perl, Shell) for automation. Experience with FPGA or ASIC development flows, including synthesis and timing analysis. Strong debugging and problem-solving skills. Excellent communication and teamwork abilities. - Non smoking
應徵
09/02
創未來科技股份有限公司消費性電子產品製造業
新竹市經歷不拘碩士以上
## 職務說明 - 應用於無人機雷達系統 - 數位IP架構設計與實作。 - 透過MATLAB/C++協助數位IP驗證 - 透過FPGA整合與驗證。 ## 技能要求 - 具備數位訊號處理經驗 - 具備數位電路設計經驗 - 程式語言必要:Verilog/VHDL, TCL, ##加分條件: - 具備雷達/通訊訊號處理、數位設計架構 - 具備RF/Analog 知識與RF/Analog校準設計 - 程式語言: MATLAB, python, c, c++, Chisel3
應徵
09/01
新竹縣竹北市經歷不拘碩士
1. 光通訊產品相關高速介面數位設計 (112G PAM4 SerDes) 2. 依據系統規格, 執行架構設計以及撰寫硬體描述語言 (RTL) 3. 具有高速介面, 低功耗, 以及D/A混合電路設計經驗者尤佳
應徵
09/02
新竹市經歷不拘碩士以上
【產品線描述】 Smart TV Solutions:提供TVSoC、MEMC/FRC及面板相關顯示裝置的控制晶片 ASIC Solutions:提供智能手機、智能電視、電競螢幕、AI Server等產品各種ASIC(包含CoWoS/ChipLet平台)解決方案 【工作說明】 電視 / 手機相關晶片設計,負責影像視訊處理相關功能的硬體設計、架構規劃等. 1. 影像處理 IP 的硬體設計. (MEMC, Scaler, Super-Resolution, De-contour, contrast enhancement) 2. 電視 / 手機相關晶片的 data path 架構規劃 & 系統 Bus 處理 (AHB, AXI). 3. Design flow check (Synthesis, low power, CDC, nLint) 4. 建構 FPGA 驗證平台 【必要條件】 1. 需具備數位電路設計基礎 2. 需熟悉 Verilog
應徵
09/01
新竹縣竹北市3年以上大學以上
【成為円星人】 円星科技由一群專業與充滿熱情的夥伴創立於2011年,為積體電路矽智財設計服務業之新秀,秉持著『成為半導體業最值得信賴之IP公司』的願景,追求永續經營與成長。 誠摯歡迎您成為円星人,加入我們,站上國際舞台! 一起共同打拚,以精品文化之精神,創造價值,追求卓越! 【職務簡介】 M31主要業務為向 IC 設計業者和晶圓代工廠授權 IP,此職務為負責高速介面 IP(High Speed Interface IP)開發相關的數位RD職缺。 【將負責的工作內容】 1. RTL design & verification 2. Customer support and debug 3. MIPI,USB, PCIE等高速介面IP開發。 4. 不同製程的IP Porting。 5. PHY Test Chip整合。 【條件與特質】 1. 具備數位設計流程經驗 (Synthesis/LEC/DFT/ATPG/STA) 2. 熟悉完整的Tape out flow 3. 熟悉MIPI,USB,DDR(LPDDR)相關高速混合信號介面(PHY)尤佳 4. 有數位IC設計工程師相關工作經歷3年以上 5. 電機電子/資訊工程碩士畢業 如果您有以上相關經驗且對此職缺有興趣,歡迎投遞您的履歷!
應徵
09/01
瓦雷科技有限公司IC設計相關業
新竹市經歷不拘大學以上
[job description] Wolley is seeking candidates for a digital design engineer position. You will join an experienced team designing next-generation memory, storage controllers, and high-speed interface standard. You will also contribute to design concept discussion, architecture definition, as well as design implementation. ‧ Architecture design and RTL implementation ‧ System bus and related peripheral designs ‧ SoC and emulation platform design ‧ SoC system performance analysis [Requirement] 1. Bachelor's or Master's degree in Electrical Engineering or related fields 2. Familiar with RTL design, SystemVerilog, front-end design flow 3. The following working knowledge is desired: * Python programming * TCL scripting * Universal Verification Methodology (UVM) * Low power design and analysis
應徵
09/04
新竹縣竹北市經歷不拘碩士以上
【產品範疇】 LCD – Mobile TDDI/車載/平板/工控 【工作內容】 1.Verilog RTL電路的設計與驗證 2.Chip及 IP 整合, DFT 及 Cad Tools 設計流程及驗證 3.CP/FT測試規劃及產出test pattern 【需求條件】 1. MS or PhD degree in EE, or relevant fields 2. 熟悉Verilog HDL, IC Design CAD Tools(simulation, synthesis, LEC, STA, etc.) 3. Whole-chip整合、邏輯電路設計及相關IC設計流程
應徵
09/05
新北市新店區經歷不拘碩士
1.RTC Module/ IP design. 2.Design synthesis. 3.Design verification. 4.DFT/ siemens tools.
應徵
09/05
台北市內湖區3年以上大學
我們專注於3D影像立體雙目視覺技術 產品應用於3D 影像辨識、360 度環景拍照、攝影或AR 與VR 職務內容: ★ USB2.0/3.1或 MIPI 介面之2D/ 3D 影像處理與壓縮之 IC 開發 ★ 影像處理與壓縮相關數位 IP暨產品之開發設計、測試、驗證 條件要求: 1. 對IP Verification, System Verification 有興趣 2. 熟Verilog coding 與 ASIC design Flow 與 Timing Closure 3. 或有 SoC IC 開發經驗 4. 對開發人工智慧((AI) 晶片與邊緣運算有興趣者
應徵