1. Architecture design and RTL implementation of Automotive/Smartphone chipset
2. SoC system power and performance analysis
3. SoC system bus and memory subsystem design, integration, and modeling
4. SoC low power design, integration, and modeling
5. SoC functional safety analysis, design, integration, and modeling
6. SoC cyber security analysis, design, integration, and modeling
Design CPU functional units.
Responsibilities
Defining micro-architecture of the functional units
Writing RTL codes of the functional units
Writing documents of the function units
Working with cross-division teams to resolve functional, performance, power, and frequency issues related to the functional units
Qualifications
3+ years of recent experience with Verilog logic design
Knows CPU micro-architecture, e.g. instructions, pipeline, caches, MMU
Knows power consumption of digital circuits
Good communicator in verbal and writing in English
【本職缺優先審核至高通官網投遞人選】請至高通官網上傳英文履歷表https://careers.qualcomm.com/careers/job/446706469791
【Talents who apply job through Qualcomm Career Website will be reviewed and considered as top priority】
https://careers.qualcomm.com/careers/job/446706469791
【The Potential Areas To Work】
The main responsibility of this position is to do the performance verification for world-class custom CPU for mobile and portable computers.
【Roles and Responsibilities】
-Proficiency in one or more areas of CPU architecture: fetch, decode, branch prediction, renaming, execute units, SIMD, load/store, MMU, caches, retire, etc.
-Verify performance feature between RTL and model, and have ability to troubleshooting
-Work with design team and performance team to develop test case and validate new feature
【本職缺優先審核至高通官網投遞人選】請至高通官網上傳英文履歷表:https://qualcomm.wd12.myworkdayjobs.com/External/job/Hsinchu-City-TWN/GPU-Compiler-Development-Engineer--up-to-Sr-Staff--Hsinchu-_3057774
【Talents who apply job through Qualcomm Career Website will be reviewed and considered as top priority】
https://qualcomm.wd12.myworkdayjobs.com/External/job/Hsinchu-City-TWN/GPU-Compiler-Development-Engineer--up-to-Sr-Staff--Hsinchu-_3057774
【Job Description】
The largest provider of premium mobile SoC (system on chip) solutions. Adreno GPU has been driving the mobile industry toward rich graphics and gaming experience on smartphones. Now its power efficient GPU technology becomes fundamental to enable some new exciting markets beyond the smartphone like VR/AR, IoT, AI, drone, autonomous driving. GPU compiler is a key component of overall graphics technology, especially in terms of its influence on application’s performance on GPU. We are looking for talented engineers to create world class GPU compiler products to enable high performance graphics and compute with low power consumption.
【Responsibilities】
This position will be responsible for research, development and delivery of Qualcomm's Adreno GPU compiler products to our worldwide customers. At same time, there will be opportunities to influence GPU hardware design based on experience on how our GPU compiler has been used by real world users.
【Minimum Qualifications】
* Good C/C++ programming skills
* Good communication skills and teamwork spirit, reliable and self-motivated
【Preferred Qualifications】
* Compiler development. For example, LLVM or GCC
* Graphics knowledge or graphics/game software development
* DirectX, OpenGL/Vulkan, OpenCL, or CUDA compiler development
* D3D/OpenGL/Vulkan/OpenCL/CUDA driver development
a. Job Description:
We are looking for a highly motivated RTL Designer to join our team
in developing high-performance digital IPs. The ideal candidate will
have experience in Register Transfer Level (RTL) design and verification,
with a strong understanding of digital logic, microarchitecture,
and ASIC/FPGA development processes. The role involves designing and
verifying custom hardware IPs for cutting-edge applications.
b. Verification:
Develop and execute test plans to verify functionality, performance, and power requirements.
Create testbenches using SystemVerilog/UVM for functional verification.
Perform simulation, debugging, and root cause analysis for design issues.
Conduct code coverage and functional coverage analysis to ensure comprehensive testing.
Collaborate with verification and firmware teams to validate IP functionality.
c. Qualifications:
Bachelor’s/Master’s degree in Electrical Engineering, Computer Engineering,
or a related field. 2+ years of experience in RTL design and verification.
Proficiency in Verilog, SystemVerilog
Strong understanding of digital design concepts, including pipelining, clock domains, and low-power design techniques.
Experience with simulation tools (e.g., ModelSim, VCS, Questa) and formal verification techniques.
Familiarity with UVM methodology and testbench development.
Knowledge of scripting (Python, TCL, Perl, Shell) for automation.
Experience with FPGA or ASIC development flows, including synthesis and timing analysis.
Strong debugging and problem-solving skills. Excellent communication and teamwork abilities.
- Non smoking
[job description]
Wolley is seeking candidates for a digital design engineer position. You will join an experienced team designing next-generation memory, storage controllers, and high-speed interface standard.
You will also contribute to design concept discussion, architecture definition, as well as design implementation.
‧ Architecture design and RTL implementation
‧ System bus and related peripheral designs
‧ SoC and emulation platform design
‧ SoC system performance analysis
[Requirement]
1. Bachelor's or Master's degree in Electrical Engineering or related fields
2. Familiar with RTL design, SystemVerilog, front-end design flow
3. The following working knowledge is desired:
* Python programming
* TCL scripting
* Universal Verification Methodology (UVM)
* Low power design and analysis