「技術工程類-研發工程師Package designer(記憶體封裝)」的相似工作

This role will lead the Package Design Project with R&D team members and deliver advanced and innovative packaging resolutions to clients. (Flip-Chip) 1.Package RFQ and structure & BOM selection. 2.Direct material evaluation and survey. 3.FA and Reverse Engineering. 4.Package design rule maintain & update. 5.Advance products design / NPI projects development. 6.Research & setup package roadmap / material roadmap.

1.負責測試用電路板(Test board/Load board/Probe card)的電路與布局設計 2.依據IC, SOC, 元件特性規劃電源, 訊號, 接地與測試點分布 3.熟悉高速訊號,模擬訊號, 電源完整性(PI)與訊號完整性(SI)設計規範 4.熟悉PCB設計流程, 佈局軟體如 Allergo ,Orcad ,Cam350 ,Auto CAD完成佈局繪圖 * 實際薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 * 資深人員薪資另議。

【Customer Engineering Account Management】 (1)Meet and exceed customer’s expectation of advanced package engineering in terms of quality, cost and delivery (2)Offer industrial leader’s advanced package solutions and services through integration of package and process development 【Project management】 (1)Project phase in schedule arrangement and follow up (2)SWR arrangement ,schedule follow up, negotiation…etc. (3)PKD/PMD creation (PLM) (4)Reliability arrangement 【Team Work】 (1)To optimize resource allocation (2)Enhance teamwork in 360° including customer, supplier and our colleagues (3)Develop self and others

Main work content: 1. Fan-out structure/ material/ process flow design 2. Fan-out RDL layout drawing review 3. Packaging direct material survey, evaluation, improvement & qualification 4. Design rule establishment & maintenance 5. Package failure analysis 6. Coordinate & lead project in design portion & co-work with process, integration & simulation teams 7. Direct communication with customers * 薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 * 資深人員薪資另議。

1. Electrical package warpage and component stress simulation and analysis (FBGA, FCBGA, FOWLP, FOPLP, 3D IC CIS CSP, TSOP, QFN, QFP......). 2. Electrical package thermal simulation and analysis (JESD51 standard). 3. Electrical package mold flow and wire sweep simulation and analysis. 4. Board level drop test experiment and analysis (JESD22-B111 standard). 5. Warpage measurement by shadow moire (JESD22-B112 standard). 6. Database establishment and utility development. 7. New simulation capability development. ＊實際薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 ＊資深人員薪資另議。

【Customer Engineering Account Management】 (1)Meet and exceed customer’s expectation of advanced package engineering in terms of quality, cost and delivery (2)Offer industrial leader’s advanced package solutions and services through integration of package and process development 【Project management】 (1)Project phase in schedule arrangement and follow up (2)SWR arrangement ,schedule follow up, negotiation…etc. (3)PKD/PMD creation (PLM) (4)Reliability arrangement 【Team Work】 (1)To optimize resource allocation (2)Enhance teamwork in 360° including customer, supplier and our colleagues (3)Develop self and others 1. 薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘； 2. 資深人員薪資另議。

職務內容： • 負責 Flip Chip 封裝製程（Flip Chip Bond / Thermal Compression Bond / Assembly）的開發與優化 • 與產品、研發、設備單位合作導入新製程 • 解決量產良率、可靠度、製程參數問題 • 規劃與執行先進封裝技術平台（如FCBGA、FCCSP、HBPOP） 職務要求： • 電機/材料/化工/機械等相關科系，學士以上 • 5年以上Flip Chip製程開發或量產經驗 • 熟悉半導體封裝流程與相關設備 • 具備良好跨部門溝通能力，能獨立主導專案者尤佳 Job Description • Responsible for the development and optimization of Flip Chip packaging processes (Flip Chip Bond / Thermal Compression Bond / Assembly). • Collaborate with product, R&D, and equipment units to introduce new processes. • Resolve issues related to production yield, reliability, and process parameters. • Plan and execute advanced packaging technology platforms (such as FCBGA, FCCSP, HBPOP). Job Requirements • Bachelor's degree or higher in Electrical Engineering, Materials Science, Chemical Engineering, Mechanical Engineering, or related fields. • Over 5 years of experience in Flip Chip process development or mass production. • Familiar with semiconductor packaging processes and related equipment. • Excellent cross-department communication skills, with the ability to independently lead projects being a plus. ＊實際薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 Actual salary will be determined based on education, field of study, relevant work experience, professional certifications, special skills, and language proficiency. ＊歡迎具備日月光(高雄)、矽品(台中)、南茂、欣興、臻鼎等Flip Chip量產經驗者投遞，薪資從優核敘。 Candidates with Flip Chip mass production experience from ASE (Kaohsiung), SPIL (Taichung), ChipMOS, Unimicron, and Zhen Ding are welcome to apply. Will be offered a competitive salary!

1. 封裝固晶(Die-Bond)製程作業。 2. 固晶(Die-Bond)相關設備保養維護、異常排除、效能改善、改機調機。 3. 封裝固晶(Die-Bond)製程改善與開發。 【本職缺可透過104應徵，也歡迎直接至穩懋官方網站投遞，增加履歷曝光度】請至穩懋官方網站投遞個人履歷表，此職缺履歷登錄網址：https://www.winfoundry.com/WinTalentPool/JobRequirement/Edit/1047

1. Customer Engineering Account Management -Meet and exceed customer's expectation of advanced package engineering in teams oof quality,cost and delivery. -Offer industrial leader's advanced package solutions and services through integration of package and process development. 2.Team work -To optimize resource allocation. -Enhance teamwork in 360。 including customer,supplier and our colleagues. -Develop self and others. 3. New product introduction 4. Implement and coordinate NPI plans 5. Process integration data analysis and reporting 6. Abnormal analysis and experimental DOE Plan 7. New materials and process evaluation plan ＊實際薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 ＊資深人員薪資另議。 　 　 　 　

This position is responsible for resolving customer quality related issues and acting to resolve quality problems.This team will act as a key point of communication with customers on subjects as examples but not limited to customer complaints, customer requests. If have over 1 years quality related experience will be preferred. 【Key Responsibilities】 1.Customer claim and CAR disposition & follow-up. 2.Customer audit arrangement and finding follow-up. 3.Regular audit report preparation and meeting with customer. 4.Interface between PTI & customer on quality issue. 5.Strengthen customer relationship. 6.Satisfy customer on quality service. 【Problem Solving】 Recognizes and solves typical problems that can occur in own work area; evaluates and selects solutions from established options 【Interpersonal Skills】 Uses communication skills to exchange information; fluent English skill is perfect. TOEIC at least 600.

1.封裝後段製程良率提升 2.制訂製造程序與產品標準 3.評估製程專案計劃，訂出最適化的製造流程 4.負責新產品製程的導入、檢測，使新產品能夠穩定生產且符合相關標準 具封裝後段(Molding、Marking、植球、切割、AOI...)製程經驗者優先面試。 歡迎理工科系之應屆畢業生、兵役屆退者、半導體相關產業製程經驗一年以上人士加入。 ＊實際薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 ＊資深人員薪資另議。

**Job Duties & Responsibilities** • Process flow design for CIS / HBM / FOPLP NPI products. • Coordinator for issue analysis and progress follow-up with internal cross-functional teams. • Regular meetings with customer and end customer to provide issue explanation and root cause analysis. • Serve as the interface between the PE team and customer for engineering-related discussions; work with customers and lead internal teams for all NPI phase-related activities such as setup reports, FACA, and PFMEA. • Lead new process development, machine surveys, and material evaluations in collaboration with internal cross-functional teams and vendors. **Candidate Requirements** • Passion for learning new processes across different fields. **Preferred Qualifications** • Fluent in English speaking (TOEIC 650+). • 2+ years of experience in customer interaction. • 2+ years of experience in project handling, such as CIP, cost reduction, or yield improvement. • Familiar with wafer-level assembly processes (CIS / HBM / FOPLP). * 熟悉半導體MEOL/BEOL各製程或具備跨部門溝通經驗尤佳。 ＊實際薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 ＊資深人員薪資另議。 　 　 　 　

1. 先進封裝製程(MEOL/BEOL)優化、產品良率提升及異常產品分析 2. 新產品製程開發及實驗計畫進行 ＊具備Flip Chip Bond/Die Bond/CoWoS/ HBM/ CIS經驗者佳 ＊實際薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 ＊資深人員薪資另議。

1. Marketing analysis and customer relationship management. 2. Take business opportunity and promote at customer site. 3. Define business direction based on PTI strategy and cost structure. 4. Contract review and price negotiation. 5. Well communication between customer and internal team. 6. Achieve monthly and annual sales target.

1. Power module/PMIC/MOS/GaN package design. 2. Substrate and leadframe and Cu clip design 3. Customized package design 4. Electrical & thermal simulation through Q3D & IcePAK 5. Co-work with process engineer to solve process and reliability 6. Define thermal resistance through T3Ster measurement or simulation

1. 黃光製程相關製程優化、產品良率提升及異常產品分析 2. 新產品製程開發及實驗計畫進行 * 熟悉FOWLP、Bumping、3DIC、TSV等製程開發流程尤佳 * 實際薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 * 資深人員薪資另議。

1.追蹤客戶提供之預測生產量，並提出生產計劃與機台負荷計劃 2.展開業務與生產企劃單位提出之生產計劃量至製造單位各主要站別，並擬定日生產計畫，每日追蹤製造各站別達成狀況，並擬定recover plan。 3.召開日生產會議，與各單位檢討實際生產量與計畫生產量之差異，並請落後之單位提出原因與追回落後的計畫，追蹤異常原因的單位提出之改善計畫，並追蹤各單位之執行計畫之進度與成效，並回饋於負責之生產企劃與封裝產品工程單位。 4.召開周投產會議，協調各客戶、不同產品之生產企劃單位、封裝產品工程單位、模組製程工程單位、模組設備單位、模組製造單位之日排程與周排程，讓各需求單位可以依照客戶需求預測所規畫之生產計畫，落實在周生產計劃與日生產計劃，並在各需求單位有額外需求或是生產異常導致落後，居中協調並重新安排生產排程。 5.監控各產品別半成品如基板與模組之庫存水位，與生產企劃與製造單位確認日與周生產計劃是否需要調整。 6.監控管理生產線治工具數量與狀態，確保生產排程能順利運用合理資源，避免影響生產計劃。 7.持續跟催各單位在日生產會議與周投產會議之待辦事項，確實追蹤完成影響生產線之問題。 8.跨產品含Power Module 線、SiP 線、SSD線、醫療與其他各項產品之生產資源協調，與負責之各排程人員做安排與管理，以協助模組生產處利用最少成本完成最大生產量。 9建構各項生產指標，訂立目標以追蹤並管理，以持續提升模組整體生產能力與維持良好水準 10.追蹤掌握SWR 及各種急件進度 11.檢討各站別與設備之產能參數達成度，並回饋給產能模擬、工業工程與製造單位，以確保生產計畫之目標達成。 12.使用Excel VBA技術開發自動程序或與資訊工程單位人員開發並導入新系統來減少排程與製造人員之報表工作負擔，協助排程與製造人員解決基礎生產報表發生之問題，開發新程式用以追蹤各項生產指標。 13.機台使用率提升及生產力提升 14.其他主管交辦事項 ＊實際薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 ＊資深人員薪資另議。

1. 先進封裝後段製程(BEOL)優化、產品良率提升及異常產品分析 2. 新產品製程開發及實驗計畫進行 ＊具備Flip Chip Bond/Die Boning/CoWoS經驗者佳 ＊實際薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 ＊資深人員薪資另議。

1.封裝製程良率提升 2.製程異常處理與分析 3.改善現有生產製程 4.新產品導入專案 ＊實際薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 ＊資深人員薪資另議。 具封裝前段(切割研磨、DB、WB...)製程經驗者優先面試。 歡迎理工科系之應屆畢業生、兵役屆退者、 半導體相關產業，製程經驗一年以上人士加入。

1. 新產品量產問題改善/條件優化 2. cost down / second source專案 3. 具製程能力/統計槪念 4. 執行上級交付任務