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「類比IC設計工程師(台北/新竹/台南)」的相似工作

奇景光電股份有限公司
共500筆
10/03
新竹市2年以上碩士以上
Digital IC design engineer - Familiar with Verilog RTL coding - Familiar with digital design flow (pre-layout simulation, timing constraint, synthesis, post-layout simulation) - Will be working on high speed Serdes IPs - Experience or interest in all-digital PLLs or clock-data recovery circuits is a big plus
應徵
10/03
新竹縣竹北市經歷不拘碩士以上
1. SAR ADC / Current steering DAC/ SDM ADC/ DAC related 2. Analog Baseband related 3. 據有類比整合相關經驗佳
應徵
10/03
台南市新市區2年以上碩士以上
1. PLL design 2. High speed receiver design (1.5Gbps/4Gbps/5.4Gbps/8.1Gbps/12Gbps) 3. High speed transmitter design (1.5Gbps/4Gbps/5.4Gbps/8.1Gbps/12Gbps) 4. eDP receiver 5. V-by-One receiver 6. MIPI D-PHY 7. HDMI Receiver 8. HDMI Transmitter 9. LCD P2P interface Transmitter 10. LDO and DCDC design 工作地點:新竹/台南
應徵
10/01
新竹市經歷不拘碩士以上
Job description Join our innovative team specializing in cutting-edge embedded memory solutions. We are seeking Analog Circuit Engineers to play a key role in the design and development of high-performance embedded DRAM and associated peripheral circuits. In this position, you will be responsible for the complete cycle of DRAM circuit design and simulation verification. Your tasks will involve developing novel circuit topologies, transistor-level design, optimizing performance metrics, and ensuring robust functionality through extensive simulations using industry-standard EDA tools. Required qualifications include a strong technical background in Electrical Engineering, Electronics Engineering, Computer Engineering, Physics, or a closely related field. Candidates must possess demonstrated, significant experience in DRAM circuit design and comprehensive simulation verification methodologies. Ideally, candidates will have proven design experience in specific DRAM-related circuit blocks, including but not limited to: Row and Column Decoder circuits Control path logic DC-DC converters, Charge Pumps, and Bandgap References Delay Locked Loops (DLLs) and Phase Locked Loops (PLLs) Negative voltage generators (NVG) and other critical peripheral circuits This is an excellent opportunity to contribute to state-of-the-art embedded memory designs in a dynamic, collaborative environment. If you are a skilled analog designer passionate about solving complex challenges in DRAM circuitry, we encourage you to apply and help shape the future of embedded memory technology.
應徵
10/07
新北市汐止區經歷不拘碩士以上
Job Summary: Designing analog and mixed-signal ICs for Power Management Products utilizing leading edge sub-micron BiCMOS /DMOS technologies. Products to be designed may include, switching regulators, display drivers, audio amplifiers and power management ICs for fast-growing portable and non-portable markets such as broadband modems, PDAs, notebooks, cell phones, telecom, fiber optics, digital camera, network equipment, and automotive. Essential Functions: • Works on product definition, circuit synthesis from the transistor/resistor level up to the system level, simulation, layout supervision • Participates in the entire product development cycle, from product definition through product release. Qualifications: • MSEE / PhD of electronic engineering, analog or digital IC design topics • For analog, familiar to power converter (buck/boost/buck-boost/LDO) analog design will be the plus • Self-motivated, could have strong team work/collaboration with overseas colleges.
應徵
10/03
台北市內湖區經歷不拘碩士以上
Responsible for developing custom IP for SoC design from specification definition, circuit design to testing, and familiar with component and process characteristics.
應徵
10/07
新竹縣竹北市經歷不拘碩士以上
【產品範疇】 1.Touch panel controller 2.TDDI 【工作內容】 1.Analog front-end design 2.ADC design 3.Switched-capacitor circuit design 4.負責layout floorplan規劃,與layout工程師合作完成相關驗證 【需求條件】 1.Device physics knowledge applied to analog IC design 2.Familiar with analog IC design flow 3.Familiar with Hspice or Spectre
應徵
10/01
新竹市經歷不拘碩士以上
Job desicription: Our Design Team specializes in the challenging field of Non-Volatile Memory (NVM) IC circuit design. We are actively seeking an experienced Analog Circuit Design Engineer to contribute to our cutting-edge developments in embedded NVM solutions and surrounding circuitry. As a key member of our team, you will be responsible for the design, verification, and debugging of essential analog building blocks like Bandgap references, LDOs, and Charge Pumps. A significant part of your role will involve designing critical memory peripheral circuits for NVM IP and test chips, including Array interfaces, Decoding logic, and Sense Amplifiers. Your responsibilities will span the design lifecycle, from contributing to IP specifications and core circuit design to ensuring performance through layout optimization and comprehensive corner simulations of NVM IPs. We are looking for candidates with proven expertise in analog circuit design, ideally with prior experience in embedded memory or NVM technologies. If you are an experienced analog designer eager to tackle complex challenges in non-volatile memory, we encourage you to apply and help shape the future of memory technology.
應徵
10/03
新竹縣竹北市經歷不拘碩士以上
5G手機,AR,VR 顯示技術,AI 人機介面的3D觸控顯示技術,整合生物特徵的全面屏顯示技術。 【工作說明】 1. 高速介面的電路評估,規劃,設計與驗證. 2. 低功耗,高速的SRAM電路評估,規劃,設計與驗證. 3. 高精度,低溫漂的時脈電路評估規劃,設計與驗證. 4. 低功耗,快速嚮應的regulator 電路評估,規劃,設計與驗證. 5. 非揮發性記憶體電路評估,規劃,設計與驗證. 6. 高效率 DC/DC circuit design評估,規劃,設計與驗證. 7. 低功耗,低偏移的OPAMP電路評估,規劃,設計與驗證. 8. 低雜訊的DAC/ADC電路評估,規劃,設計與驗證. 【必要條件】 研究所以上相關科系畢業 熟悉類比電路設計,混合信號處理, 對類比電路設計充滿熱忱者
應徵
10/07
新竹縣竹北市經歷不拘碩士以上
【產品範疇】 1.LCD display driver 2.AMOLED display driver 3.TDDI 4.TCON 【工作內容】 1.High speed interface 電路設計 (DP/eDP, DDR, MIPI) 2.Clock associated IP 電路設計 (PLL, OSC) 3.Build system behavior model 4.負責layout floorplan規劃,與layout工程師合作完成相關驗證 【需求條件】 1.Familiar with Hspice or Spectre 2.Familiar with PLL/Equalizer/CDR/SERDES circuit design
應徵
10/02
新竹市經歷不拘碩士以上
(1)Circuit Design. (2)Circuit Simulation. (3)Layout Verification. (4)Silicon verification and debugging. (5)Transfer design to production.
應徵
10/01
瑞利光智能股份有限公司其他半導體相關業
新竹市經歷不拘大學以上
【職位描述】 設計RVI公司新創的光通訊引擎(Optical Engine)類比電路設計工程師,負責設計、開發、測試、優化和調試類比電路及系統,產品矽中介層、玻璃中介層與高階基板。負責從概念到生產的電路設計,確保光引擎達到品質和性能標準。 【主要職責】 1.設計和開發創新的類比電路和系統,應用於光引擎和相關技術領域。 2.測試、優化和調試類比電路,確保其性能符合設計規範和功能需求。 3.與跨部門團隊合作,包括系統工程師、軟體工程師、光學工程師及其他專業人員,共同實現產品開發目標。 4.與客戶密切合作,理解其需求並提供技術支持和解決方案。 5.制定和執行測試計畫,分析測試數據,並提出改進建議。 6.保持對最新技術趨勢的了解,並將其應用於產品設計中以提升競爭力。 Position Description: As an Analog Circuit Design Engineer at RVI, you will be a key contributor to the development of our next-generation Optical Engine. You will be responsible for designing, developing, testing, optimizing, and debugging analog circuits and systems used in advanced optical communication modules, including silicon interposers, glass interposers, and high-end substrates. This role spans from initial concept to mass production, ensuring the performance and quality of the optical engine meet industry standards. Key Responsibilities: 1.Design and develop innovative analog circuits and systems for optical engines and related applications. 2.Test, optimize, and debug analog circuits to ensure performance meets design specifications and functional requirements. 3.Collaborate with cross-functional teams, including system engineers, software engineers, and optical engineers, to achieve product development goals. 4.Work closely with customers to understand their requirements and provide technical support and tailored solutions. 5.Develop and execute test plans, analyze test data, and propose design improvements. 6.Stay updated on emerging technologies and incorporate relevant advancements into circuit design to enhance product competitiveness.
應徵
07/22
台北市內湖區經歷不拘碩士以上
歡迎2026年畢業並正在找尋研發替代役的同學申請! 職位選擇: Direction 1: Mixed Signal Design Engineer Direction 2: Mixed Signal Analog Circuit Designer What you’ll be doing: • Develop and implement high speed interfaces and analog circuits. You will have hands on experience taking innovative integrated circuit designs at data rates of 25Gbps and higher from concept through silicon characterization. • Help by defining circuit requirements and complete design from schematic, layout, and verification to characterization. • Conduct schematic design of deep-submicron CMOS technologies using Spectre, Hspice or like. • Take ownership for the architecture, transistor design and verification using industry standard EDA tools such as Cadence virtuoso. • Optimize circuit to meet the specifications for system performance. • Work closely with layout engineers by providing detailed floorplan and guidance for matching and high-speed routings. • Provide support for post-silicon bring-up and debugging. What we need to see: • Hold a Master of Science/Ph.D in Electrical Engineering, Computer Engineering or related field with strong analog design background • CMOS Analog / Mixed Signal Circuit Design Experience in deep sub-micron process (especially in FINFET) • Experience with design and verification tools (Cadence's IC design environment, analog circuit simulation tools like Spectre, HSpice, Finesim, XA) • Experience in crafting test bench environments for component and top level circuit verification • Behavioral modeling of analog and digital circuits • Strong debugging and analytical skills • Analog simulation for noise analysis, loop stability analysis, ac/dc/tran analysis, monte-carlo, etc. • Strong interpersonal skills and ability & desire to work as a great teammate are huge plus. 應徵方式: 請提供以下資料: • 英文個人履歷 • 學士+碩士成績單 (中英文皆可) 提交申請: 請將上述資料投遞至104,符合資格者將會收到進一步的聯繫通知。
應徵
10/07
新竹市經歷不拘碩士
1.類比/電源管理 IC電路設計. 2.參與LCD PMIC, LED Driver專案. 3.DC-DC, Charger-Pump, LDO, OP, DAC,ADC相關電路設計
應徵
08/29
台南市永康區經歷不拘碩士以上
1. 從事以下其中一種電路的設計/模擬/除錯工作: a. Touch Sensor, ADC circuit design. b. Charge Pump include flying cap & capless circuit design. c. Memory circuit design. d. High Speed Interface, PLL circuit design. e. Band Gap, LDO circuit design. f. Source & Gate Driver circuit design. 2. 熟悉類比子電路專業知識如OP-AMP的設計。 3. 熟悉工作站與EDA軟體的使⽤。 4. 個性主動積極、樂觀、熱誠。
應徵
10/03
台北市內湖區經歷不拘碩士
1. High speed ADC/DAC design(具備Ethernet PHY RX/TX 設計經驗佳) 2. ADC/DAC IP test 3. Familiar with behavior model simulation
應徵
09/24
神雋股份有限公司IC設計相關業
台北市南港區3年以上碩士以上
1.熟悉類比混合訊號IP開發, 例如PLL,LDO,USB PHY,MIPI PHY 2.對類比電路設計充滿熱忱者
應徵
09/25
鋒迪亞股份有限公司其他半導體相關業
台中市西屯區1年以上專科
我們專注於能源晶片與深度演算法的融合創新,誠徵類比IC演算法工程師,將傳統的手工類比設計流程轉化為自動化的智慧演算法,讓電路設計更高效、更穩定,推動類比設計的未來。 你將負責: 開發電路拓撲分析演算法 設計 sizing 最佳化演算法(基於 gm/Id methodology 等) 將手工設計流程轉化為程式化流程 協助建立類比IC設計自動化工具 與軟體團隊合作進行演算法驗證與優化 熟練使用 Vibe Coding 工具(Cursor、Github Copilot、Claude… 等)更佳 我們期待你具備: 類比IC設計實務經驗 熟悉運算放大器、ADC/DAC、電源管理電路等拓撲設計 精通 SPICE 模擬與電路參數萃取 深度理解 sizing methodology(如 gm/Id 設計法) 能清楚闡述設計 trade-off 與電路原理 加分條件: 具備 Python 程式能力 有將手工設計方法轉換為程式實現的經驗 具備統計分析能力(Monte Carlo / corner analysis) 有 EDA 工具 API 開發經驗 熟悉圖論演算法與資料結構 如果你熱愛把設計方法變成程式,並用演算法重新定義類比IC設計的可能性,歡迎加入我們!
應徵
09/11
新唐科技股份有限公司其他半導體相關業
新竹縣竹北市經歷不拘大學
•Design high-speed/RF analog circuits for wireless/wired communication systems. •Characterize high-speed/RF transceiver and building blocks. •Work with closely with communication algorithm/digital design team for system design and performance optimization.
應徵
10/02
台北市松山區經歷不拘大學
【WE ARE HIRING – TI應用工程師線上招募說明會!】 想在半導體產業開啟職涯新頁? TI 2026預聘暨研發替代役招募正式啟動,參與活動有機會搶先獲得2026 offer! 善於溝通、熱愛科技與解決問題的你,FAE應用工程師將是你的最佳選擇! 想體驗在全球領先半導體企業TI工作? 立即報名,名額有限!>> https://reurl.cc/VWe7vn 活動日期 : 9月25日(四)18:30至19:30 活動形式 : 線上進行 報名後請留意信箱,以收到「報名成功通知信件」為準。 ▋ 關於德州儀器 德州儀器(TI)是位居類比晶片世界領導地位的半導體設計與製造公司,持續提供創新及頂尖的半導體技術與產品,協助客戶開發最先進的電子產品。除此之外,TI也針對在校學生及初入社會新鮮人設計完整的培訓制度與挑戰性的工作內容,並提供具競爭力的薪資與福利、完善的升遷管、輪調培訓計畫以及活潑與國際化的工作環境。 ▋科技菁英計劃 - TI 應用工程師輪調培訓計畫 有思考過RD、IC設計之外的另一種職涯可能嗎? 喜歡與人互動並充滿挑戰的工作卻又擔心新鮮人無法立即上手嗎? 別擔心! TI針對FAE新鮮人提供海內外全面且扎實的系列培訓課程, 透過課堂及工作日常的任務的學習,您將具備FAE應具備的各項知識與技能,在客戶面前成為專業與自信的FAE! 另外,TI亦提供完整的輪調計劃,透過給予新人不同職務內容的學習, 使其能在公司有更多成長及發展的機會。 ▋ 應用工程師職務說明 >>在TI做FAE,您可以… • 參與FAE完整培訓計畫,包含1對1 coach、豐富教育訓練資源 • 與全世界技術專家合作,參與跨國會議及海內外輪調計畫,在國際舞台成長 • 接觸TI多元產品線,包含熟悉的#消費性電子、時下最夯的#車用電子 ,以及工業用等產品,共超過8萬顆產品,學無止境! • 透過專案及團隊合作,快速累積技術硬實力及溝通軟實力 • 享受開放扁平的組織氛圍,不論是專業領域或職涯發展,都能夠勇敢表達 • 走出多元職涯,不論是技術導向的技術專家(technical ladder program) 或是領導團隊的用人主管,TI提供暢通的升遷管道讓您有機會被全世界看見 >>FAE在做什麼 作為“Technical Expert”,與Technical Sales Engineer併肩合作,了解客戶的技術需求、解決客戶的技術痛點,將TI產品特性與客戶系統需求聯結起來。運用產品選擇、系統、實現和調試方面的技術能力,從而實現業務目標。 • 積極與客戶建立關係,及時掌握客戶開案訊息,進而瞭解其需求與系統設計,推展TI的產品讓客戶的設計更有市場競爭力。 • 透過TI全球技術資源,提供專業技術服務,解決TI產品應用在客戶系統上的技術問題,協助客戶順利導入量產。 • 了解TI系統及產品,並研究同業競爭的狀況,反應客戶需求及市場資訊給研發團隊做為未來產品開發的參考。 看更多徵才資訊與FAE工作介紹=> https://www.facebook.com/texasinstrumentsTW/videos/1382188632429211 歡迎至https://www.cakeresume.com/resources/texas-instruments?locale=zh-TW 看更多內容 #R&D外的另一種選擇 #IC Design的另一種選擇 #結合技術及與人溝通 #探索不同產品之技術與應用 #走出多元彈性的職涯 #年薪(含紅利)百萬起跳 ▋ 面試準備: • Phone interview: 1. 對德州儀器及此職務的了解: o 針對德州儀器的業務範圍或是德州儀器在台灣的業務發展 2. 投遞動機 o 針對此職務為什麼想要投遞 o 對職務的了解程度 o 未來工作發展方向 • 第一關面試準備: 1. 英文自我介紹 2. 簡報(碩論題目或是DC/Amplifier介紹) • 第二關面試準備: 1. 針對工作內容了解 2. 職涯發展方向 3. 情境考題
應徵