Responsible for developing custom IP for SoC design from specification definition, circuit design to testing, and familiar with component and process characteristics.
待遇面議
(經常性薪資達 4 萬元或以上)
◆ Professional Knowledge: 1. Proficient in Cadence design environment and simulation tools. 2. Experience with high-speed I/O related circuits. 3. Familiarity with Spectre/Verilog mixed simulation environment is preferred. ◆ Other Special Requirement: 1. Understanding of ESD design in advanced process technology is preferred. 2. Good English proficiency. 3. Self-driven and highly interested in custom IP development at advanced process nodes.
1.分紅奬金 (依公司獲利、組織目標達成率與個人績效決定) 2.三節獎金 3.勞健保及退休金提撥 4.員工團保 (意外、壽險及防癌險) 5.國內外旅遊/旅遊補助 6.工程師介紹獎金 7.全薪病假及彈性休假 8.員工汽機車停車位或交通津貼 9.員工健康檢查 10.福委會相關福利活動