「Product Line Manager (新竹)」的相似工作

Job Overview As our Program Manager, you’ll lead the symphony of IC design projects—from concept to tape-out. Your baton will guide cross-functional teams, ensuring harmonious execution and successful product launches. Responsibilities: 1.Project Score Composition: 1-1 Develop project plans, timelines, and milestones. Imagine them as musical scores—the roadmap for our performance. 1-2 Collaborate with design, verification, and layout teams. Each instrument (or team) plays a crucial part. 2. Resource Allocation Sonata: 2-1 Allocate resources—people, tools, and budgets. Balance the orchestra, ensuring no section is drowned out. 2-2 Monitor progress, adjust tempo, and keep everyone in sync. 3. Risk Management Crescendo: 3-1 Identify risks—those unexpected dissonances. Mitigate them through proactive planning. 3-2 Be the troubadour—addressing issues swiftly and harmoniously. 4. Customer Symphony: 4-1 Engage with stakeholders—customers, marketing, and executives. Understand their expectations. 4-2 Deliver updates, manage expectations, and ensure customer satisfaction.

我們正在尋找一位能夠結合產業洞察與國際視野的智慧製造專案經理，與全球解決方案夥伴攜手開拓市場、打造卓越成就。 •精通 Siemens NX 或 PTC Creo 的模組架構（CAD、CAM、CAE、Simulation 等），能將專業技術與商務策略結合。 •深諳 二級/三級經銷商體系、行業解決方案及 Teamcenter 等 PLM 系統整合模式，善於從需求中找到商機。 •曾任 NX、Creo、Catia、SolidWorks 經銷商管理，或於其通路體系工作者優先考慮。 •擅長建立並經營國際經銷商網絡，熟悉獎勵政策與授權模式，能依市場優先順序制定合作模式與行銷策略，推動業績成長。 •能與研發、技術團隊深入探討 API、二次開發、插件整合，並將其轉化為具說服力的商業賣點。 •具備流利的中英文溝通能力，能在跨文化背景下自信談判，贏得夥伴與客戶的信任。 •擁有明確的 KPI 與年度業績管理經驗與策略，能以數據驅動成果。 We are seeking a Project Manager for Smart Manufacturing who can combine industry insight with a global perspective, working with international solution partners to expand markets and deliver exceptional results. •Proficient in the product portfolio of Siemens NX or PTC Creo (CAD, CAM, CAE, Simulation, etc.), with the ability to integrate technical expertise into business strategies. •In-depth knowledge of tier-2/tier-3 distributor networks, industry-specific solutions, and integration models with PLM systems such as Teamcenter, with a strong capability to identify business opportunities from market needs. •Prior experience in managing or working within distribution channels for NX, Creo, Catia, or SolidWorks is highly preferred. •Skilled in building and managing international distributor networks, familiar with incentive programs and licensing models, and able to design market entry strategies, partnership models, and marketing plans that drive growth. •Able to collaborate closely with R&D and technical teams on API development, customization, and plug-in integration, translating technical concepts into compelling business value propositions. •Fluent in both English and Mandarin, with strong cross-cultural negotiation skills to secure trust and long-term partnerships. •Proven experience in KPI setting and annual performance management, with a data-driven approach to achieving results.

我們正在尋找熱衷技術挑戰並希望在創新環境中成長的夥伴。加入我們的團隊，您將參與尖端技術的開發，並在多元化的專案中發揮影響力。我們提供學習和成長的機會，期待與您共同推動技術進步！ 【職務內容】 1. 專案管理 - 可行性評估 - 開發成本考量 - 流程進度規劃 - 生命周期管理 - 風險管理 2. 產品開發 - 機構硬體設計 - 軟體功能開發 - 列印材料應用 - 產品整合測試驗證 3. 跨部門協作與溝通 - 協調跨部門資源與溝通 （如研發、設計、業務、行銷、客服、採購、製造等） 4. 其他主管交辦之專案或行政事項 【加分條件】 -熟悉列印材料特性及應用，具備相關材料學背景。 -具備硬體設計經驗，了解3D列印機結構及機械運作原理。 -具備軟體開發與控制系統整合的經驗，熟悉相關開發工具與語言。 -具有跨領域溝通協調能力，能管理多部門合作。 -有3D列印領域經驗者優先，具備產品管理或專案管理經驗者佳。 -具備高度問題解決能力與自我驅動力。 為什麼加入我們？ 成長機會：您將有機會參與前沿技術的開發，並持續學習和挑戰自己。 創新環境：我們致力於創新技術，鼓勵創意思維和技術突破。 團隊文化：我們重視合作與共享，並為員工提供開放包容的工作氛圍。

愛普科技力求不斷創新、挑戰市場現況，為客戶和記憶體晶片設計產業帶來碾新樣貌； 如果您也具備這樣的人格特質，歡迎投遞您的履歷，與我們共創不一樣的未來！ 【Job Description】 1. Define product specifications that meet the needs of targeted customer and applications.​ 2. Collaborate with cross-functional teams to gather inputs and requirements of development of IOT products.​ 3. Conduct market research and competitor analysis to identify IOT products​. 4. Work closely with development team, ensure to match business scope​. 【Work Experience】 1. over 5 years of experience in IC industrial. ​ 2. Advanced knowledge of IC design & development flow​. 3. Excellent communication skills with the ability to interact with cross-function teams​. (Nice to have)​ 1. Deep understand of the IOT market and Memory requirement .​ 2. Familiar with Memory controller & IP synthesis flow. ​ 3. Strong presentation skills​. ​

1. Ensure PKG design is optimized with SI/PI/Thermal requirements. 2. Create the PKG/RDL/Subtract SI 3D modeling and perform extraction of S-Parameters and RLGC model. 3. Full-wave modeling of VIAs, Connectors, Package and PCB channels, components using 3D full-wave EM tools. 4. Provide the CM(Construction rules) and Design Rules(guidelines) for the PKG/RDL/Subtract design. 5. Provide the Substrate manufacturing process and material property. 6. SI(Signal integrity) simulation and optimization on package stack-up, power/ ground plane assignment and optimization, decoupling cap locations to minimize power ground noise. 7. PI(Power integrity) analysis for state of art package/system designs, which include but not limited to package layout model extraction, transient noise analysis to meet the silicon noise spec, decoupling strategy and analysis. 8. CTK(Crosstalk) analysis and reduction on-package considering mutual-effect by on-die, on-silicon interposer and on-PCB. 9. SSN(Simultaneous Switching Noise)/SSO analysis for I/O (DDR5/4/3, LPDDR5/4/3, etc.) power domain. 10. Eye diagram(ZRZ/PAM4) and jitter analysis for CPS(Die Chip-PKG-System PCB) co-simulations. 11. Familiar with trade-offs among package cost, technologies, design, performance, power, and thermal requirements. 12. Familiar with assembly and substrate manufacturing process is a plus. 13. Familiar with programming/scripting in Java, VBScript, PERL, TCL, MatLab and/or equivalent. 14. Experienced in SI PI automation tool development with Python or PyAEDT is a plus. 15. Working with ASIC/HW/Production team.

1.Project Management 2.Biz Development 3.協助產品管理、廠商及客戶聯絡相關事宜 4.新產品規劃 5.英文聽說讀寫流利

1. Foundry co-work and contact window. 2. Handle co-development of power, MCU related applications , mass production & yield ramp up . 3. It's better with Foundry process integration or product experience.

* 良率異常分析與處理。 * WAT / CP / FT 數據追蹤，擬定調整製程參數或條件。 * 跨部門溝通協調處理量產問題執行 & 製程監控。 * 晶圓製程開發、改善製程 & 元件優化、產品良率管理 & 改善 & 降低成本。 1. Co-work w/ functional engineering team member (TME/DE/TD/TE/RE) to make new product has good definition, Risk evaluation and Build comprehensive testing plan / Qual plan, etc. 2. Co-work w/ other Engineering team member to ensure all new product can be thoroughly Manufactured, Characterized and Qualified for reliabilities and qualities. 3. Organize assignments and independently schedules to complete assigned tasks timely and make project finished efficiently. 4. Have good Coordination and Data Analysis to solve difficult problems through application of various techniques and approaches to develop effective and practical solutions that result in improved products, processes with good quality. 6. Annual salary: 800K NTD and above 7. Onsite MediaTek - Hsinchu Science Park Office This position is set for PE (Product Engineer) to coordinate new product development activities, ensure timely completion of all new products manufacturing, testing, characterization, qualification and releasing with good consistency, quality and efficiency.

1.掌握關鍵IP (CPU, GPU, DSP, interface IP, etc.) 技術及產業發展動態 2.跨單位管理以完成IP技術藍圖規劃及關鍵IP授權廠商之商務分析，作為公司IP策略規劃依據 3.掌握主要IP授權廠商之關鍵資訊流，並配合公司IP策略具體引導其相關 IP 藍圖規劃 4.領導與外部夥伴、內部工程、業務及法務團隊的合作，完成目標性商務談判以及高品質合約管理 1.Managing critical IP (CPU, GPU, DSP, interface IP, etc.) technology development and market dynamics. 2.Cross-team management to generate IP technology roadmap and key IP licensors business analysis as a reference for corporate IP strategy forming. 3.Good alignment with major IP licensors and substantial influence on their roadmap planning following corporate IP strategy. 4. Leadership in collaborating with external partners, internal engineers, business and legal teams to proceed with on-target business negotiation and quality contract process management.

1.Coordinate the Automotive logic IC qualification and ORT with labs (AEC-Q100, AEC-Q006). 2.Coordinate AEC-Q004 (zero defect framework) deployment for company. 3.Clarify the mission profile with customer (OEM and Tier1) then evaluate the HTOL and related testing. 4.Clarify the qual quotation from labs based on Automotive IC spec. 5.Work with RD,TE to prepare test patterns to verify the HAST board, HTOL board and ensure PE to prepare Qual samples as expected. 6.Contact foundry and OSAT to review their qual related report for different test group of AEC-Q100 7.Handle FA and track the qual test defect until closure. 8.Review customer CSR that related to qualification and AEC-Q004 9.Coordinate the APQP Phase 3~5

Please apply this role through https://careers.synopsys.com/job/hsinchu/r-and-d-engineering-sr-staff-engineer/44408/84900058096 Synopsys is looking for motivated Product Engineer to help design, develop and test state of the art Static Timing, Characterization and Library modelling tools. The primary focus of the Product Engineer is closely working with R&D team, to influence technologies/solution roadmaps and provide R&D team with accurate input from Field AEs, helping them focus on the most critical design challenges and help define solutions to critical problems. The engineer will work closely with Field AEs, ensuring overall consistency of end-to-end design and analysis flow to meet customer needs. The engineer will also work with Sales and Marketing teams to find and develop new markets, drive new tool evaluations and help customers with the adoption and continuous usage of Static Timing, Characterization and Library Modelling, thus enabling Chip Design customers achieve best Timing, Power and Characterization Goals. Synopsys’ existing and forthcoming tools offer an advanced transistor-level static timing characterization and library modelling solution that addresses the existing and emerging challenges in custom and memory design. They offer predictability and improved productivity to designers. Their concurrent timing, SI features and advanced variation aware analysis enables designers to accurately and quickly identify design issues early-on and avoid expensive late-finding of problems in silicon. Main responsibilities: • Drive new products and new product features that exceed customer needs. • Work with RnD to enable timely implementation of new products and features, and important bug fixes. • Provide consultation to prospective users and/or product capability assessment and validation. • Provide tool trainings to customers and Field AEs. • Provides technical expertise to sales staff through sales presentations and product demonstrations. • Assists the sales staff in assessing potential application of company products to meet customer needs and preparing detailed product specifications for the development and implementation of customer applications/solutions. Requirements: We are looking for an innovative, motivated, and dependable person, with at least BS degree and 8+ years of recent hands-on experience including: · Exceptional expertise in transistor-level analysis and debug circuit level issues for SRAM, RF, ROM memories and Standard Cells. · Good exposure to static timing concepts and CMOS engineering fundamentals. · Good knowledge of TCL and or other scripting languages. · Very good communication, social and leadership skills. Plus: · NanoTime or PrimeLib experience highly desirable.

1.具PM經驗3-5年, 英文溝通應對需流暢 2.新產品開發專案之規劃, 執行, 設計及開發進度掌控, 成本控制等及負責項目的內部ISO文件 建立與修訂 3.協助產品功能,規格,品質, 實驗室認證及相關之可靠性測試確認 4.溝通協調跨部門問題(包含SALES, RD, ME, SW, PE...etc.) 5.統籌進行開發階段各項會議策劃, 召集,記錄及進度跟催等工作 6.與業務協同進行客戶溝通(Cost/Schedule/SPEC./Quality...etc.) 7.新產品偕同業務對應新客人的開發與RFQ/RFI回覆 8.配合公司產品開發必要性之國內, 外出差 9.配合公司國內,外參展支援與準備

1. Foundry Tapeout Account 申請。 2. Foundry 製程能力評估和Tapeout 與良率提升。 負責評估Foundry製程能力，Tapeout 作業，持續推動製程優化，進而提升產品良率。 3. 跨單位工程問題協調 代表公司與客戶、Foundry、封裝廠及光罩公司協同解決各項工程相關問題。 4. 產品流程管理與分析 負責從Tape Out、Mask Job Review到產品量產的全流程管理，並進行與協力商處理ESD與Latch Up分析。 5. 封裝評估與導入,與測試數據分析. 6. HTOL QUAL 和 Package QUAL可靠度測試,與RMA分析. 7. 異常問題查證與製程改善 當產品異常發生時，運用EFA/PFA找出低良率原因，並與RD、Fab及Assembly部門協作解決，持續推動製程改善。 8. 熟悉Packaging(WLCSP、wire bond、Molding...)與Testing(CP、FT...)各階段等，知道如何與Test Engineer/外包討論ATE平台、測試coverage、bin split 等議題 9. PDK及相關文件管控 主導PDK及相關文件的申請作業，並與PM/RD團隊密切合作，嚴格控管文件版本，確保資料一致性與最新狀態。 10. 主管交辦事項.

1. 專案管理：開發與生產各項進度跟催與協調 2. 訂單管理 3. 產品文案設計 4. Forecast 管理 5. APQP跨部門溝通協作 6. 其他主管交辦事項

MaxLinear is seeking a Staff Product Engineer to join our growing team in Taiwan. In this role, you will be responsible and focus on the following: • Full product life cycle ownership • Co-define ATE test, characterization, qualification, manufacturing plans • Co-define test spec and control limit • Co-work on CRAs analysis • COGS analysis and reduction • Data and yield analysis and improvement • Co-work with internal cross-functional teams and OSATs

* 良率異常分析與處理。 * WAT / CP / FT 數據追蹤，擬定調整製程參數或條件。 * 跨部門溝通協調處理量產問題執行 & 製程監控。 * 晶圓製程開發、改善製程 & 元件優化、產品良率管理 & 改善 & 降低成本。 1. Co-work w/ functional engineering team member (TME/DE/TD/TE/RE) to make new product has good definition, Risk evaluation and Build comprehensive testing plan / Qual plan, etc. 2. Co-work w/ other Engineering team member to ensure all new product can be thoroughly Manufactured, Characterized and Qualified for reliabilities and qualities. 3. Organize assignments and independently schedules to complete assigned tasks timely and make project finished efficiently. 4. Have good Coordination and Data Analysis to solve difficult problems through application of various techniques and approaches to develop effective and practical solutions that result in improved products, processes with good quality. 6. Annual salary: 800K NTD and above 7. Onsite MediaTek - Hsinchu Science Park Office This position is set for PE (Product Engineer) to coordinate new product development activities, ensure timely completion of all new products manufacturing, testing, characterization, qualification and releasing with good consistency, quality and efficiency.

Responsible for technical assessment, requirements analysis, and feasibility studies of IC design projects, systematically converting customers' business and functional requirements into precise technical specifications and clear project scopes. Key Responsibilities: 1. Requirements Analysis and IC Architecture Planning : (1) Conduct in-depth technical discussions to understand customer business objectives and functional requirements. (2)Key focus on requirements conversion and architecture planning. 2. Assess technical feasibility of IC design projects. 3. Cost and Vendor Management : Skilled in assessing IC development costs, managing vendors effectively, and ensuring timely project delivery with high quality standards. 4. Cross-Department Collaboration : Strong team player with excellent communication and coordination skills for working across departments and disciplines.

本公司是運用 AI 與大數據技術協助客戶建置智能製造系統的領導廠商，客戶群遍佈各大半導體廠與面板廠。 此職位負責帶領專案團隊，協助客戶導入本公司開發之APS(高階規劃與排程系統)，為客戶提升產能、縮短生產週期，提高訂單交期達交率。 實際工作內容：專案經理的職務包括： 1. 確保客戶導入APS專案時程符合目標並成功驗收。 2. 訓練客戶相關專案成員了解系統對產線的實質意義，熟悉系統操作，並釐清客戶對APS系統使用的疑慮。 3. 定期和客戶開會溝通，針對系統分析結果與客戶研擬工廠改善計畫並追蹤改善進度。 4. 不定期至海外 (例如中國、新加坡) 出差，對客戶高階主管報告APS導入專案的計畫與進度，現場輔導客戶相關專案成員進行有效改善。 5. 處理並追蹤客戶反饋系統問題與需求。 現有客戶群包含國內外各大半導體晶圓製造廠、顯示器面板製造廠、印刷電路板廠等。 應徵條件： 1. 曾擔任專案經理並有成功專案驗收經驗。 2. 具備對客戶高階主管簡報能力。 3. 熟悉工廠生產作業流程與產能管理經驗，有二年以上工廠製造管理經驗者佳。 4. 對系統建置與導入有興趣或經驗，有三年以上系統開發經驗者佳。 5. 對資料分析有興趣者且具備經驗，熟悉 SQL 者尤佳。 6. 個性積極，善於協調溝通，勇於承擔責任。

1. 執行專案之規劃、執行、管控、狀態報告、結案與追蹤檢討。 2. 管控各專案進度，確保各專案符合時程規劃。 3. 專案人員之工作指派、工作進度追蹤、人員溝通與管理。 4. 客戶溝通、專案事務協調、專案資源協調、委外與供應商協調。 5. 管控各專案的品質。 6. 風險應變。 7. 進行跨部門溝通協調，以利專案之執行。

【職務說明】 我們是一條以AI 驅動的先進封裝產線，專注於 MicroLED 與 VCSEL 的巨量轉移、檢測與修補，致力於打造下一世代的 先進顯示技術與矽光子應用。我們正在尋找一位具備頂尖 AI 專業與智慧製造導入經驗的領導者，帶領團隊建構以資料為核心的決策平台，全面提升製程效率、良率與品質穩定性，加速 AI 技術在封裝產線中的實際落地與規模化應用。 【工作內容】 1. 制定 AI 導入策略，聚焦於 MicroLED / VCSEL 巨量轉移、瑕疵檢測、重工修補與製程參數最佳化等核心環節。 2. 領導資料科學家、AI/ML 工程師與軟體開發團隊，推動跨部門 AI 研發與部署。 3. 深度解析封裝產線之異質數據（如機台 log、SPC、AOI 影像、MES 資訊），建構可解釋性高的分析架構。 4. 開發高效能之缺陷分類、良率預測、自動瑕疵標註、根因分析模型，並落地於產線即時應用。 5. 應用強化學習於巨量轉移製程參數之動態調整與優化，突破微組件對位與轉移良率瓶頸。 6. 導入大型語言模型（LLM）與視覺語言模型（VLM），應用於智慧良率歸因、報表生成與製程決策輔助。 7. 建立並優化 MLOps 架構與模型版本管理系統，支援模型從研發到部署的全生命週期。 8. 推動公司內部 AI 能力建設，協助夥伴部門建立資料思維與基本技術知識。 9. 與製造、測試、IT、設備等部門緊密協作，確保模型輸出能轉化為實際效益。 Job Description: We are seeking a visionary leader with top-tier expertise in Artificial Intelligence and a proven track record in smart manufacturing implementation. In this role, you will lead the development of a data-driven intelligent manufacturing decision platform focused on MicroLED process optimization, production efficiency, yield maximization, and automated quality assurance. You will be responsible for the strategic planning of AI technology integration, cross-functional collaboration, advanced model development and deployment, and ensuring the successful adoption of AI innovations that significantly enhance manufacturing performance and product quality. Key Responsibilities: 1.Formulate AI strategies and roadmaps for MicroLED smart manufacturing, driving cutting-edge research, project planning, and prioritization. 2.Lead and develop a multidisciplinary AI team, including data scientists, AI/ML engineers, and software developers. 3.Perform in-depth analysis and mining of complex production data (e.g., equipment logs, sensor data, SPC, MES systems) to uncover deep insights and correlations. 4.Spearhead the development and optimization of advanced machine learning and deep learning models for defect detection, automated quality control, anomaly prediction, and root cause analysis. 5.Drive intelligent process optimization for key manufacturing steps (e.g., mass transfer) using advanced algorithms such as reinforcement learning to achieve dynamic parameter tuning and breakthrough efficiency gains. 6.Explore and implement applications of large language models (LLMs) and vision-language models (VLMs) for yield analysis, process knowledge extraction, and decision-making support. 7.Plan and implement efficient MLOps systems and lifecycle management for AI models. 8.Build internal AI capabilities and promote cross-functional AI thinking through education and training initiatives. 9.Collaborate closely with manufacturing, equipment, IT, and quality departments to ensure successful deployment and realization of AI solutions on the production floor.