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「SerDes類比電路設計-經理[年薪高於上市公司中位數, 且另有股票]」的相似工作

巨量移動科技股份有限公司
共500筆
10/15
新北市泰山區3年以上碩士
記憶體power system 設計 『具工作經驗者,薪資另議』
應徵
10/13
新竹縣竹北市經歷不拘碩士以上
1. SAR ADC / Current steering DAC/ SDM ADC/ DAC related 2. Analog Baseband related 3. 據有類比整合相關經驗佳
應徵
10/15
台北市內湖區3年以上碩士以上
1. 類比IP相關功能的設計與實現 ADC, DAC, OSC, PLL, high speed interface...etc. 2. 類比IP設計方法和品質改進 3. 類比IP仿真與分析 4. 與第三方類比 IP 供應商合作 5. 與數位電路作co-sim
應徵
09/20
新竹市3年以上碩士以上
1. Main responsibility is to design analog IPs in MCU such as adc/dac, pll, osc, por, ldo 2. 具備DC-DC Converter, Buck相關電路設計 2. Responsible for analog IP design, verification plan, test plan, document 3. Communicate with system, layout and digital engineer to ensure high quality --------------------------------------------------------------------------------------- 雅特力科技創立於2016年,為智原科技子公司。 【Artery雅特力】即將在台上市的IC設計公司,主要產品為32bit ARM core base MCU 公司網址:https://www.arterychip.com 關於雅特力:https://www.104.com.tw/company/1a2x6blojm
應徵
10/13
鋒迪亞股份有限公司其他半導體相關業
台中市西屯區1年以上專科
我們專注於能源晶片與深度演算法的融合創新,誠徵類比IC演算法工程師,將傳統的手工類比設計流程轉化為自動化的智慧演算法,讓電路設計更高效、更穩定,推動類比設計的未來。 你將負責: 開發電路拓撲分析演算法 設計 sizing 最佳化演算法(基於 gm/Id methodology 等) 將手工設計流程轉化為程式化流程 協助建立類比IC設計自動化工具 與軟體團隊合作進行演算法驗證與優化 熟練使用 Vibe Coding 工具(Cursor、Github Copilot、Claude… 等)更佳 我們期待你具備: 類比IC設計實務經驗 熟悉運算放大器、ADC/DAC、電源管理電路等拓撲設計 精通 SPICE 模擬與電路參數萃取 深度理解 sizing methodology(如 gm/Id 設計法) 能清楚闡述設計 trade-off 與電路原理 加分條件: 具備 Python 程式能力 有將手工設計方法轉換為程式實現的經驗 具備統計分析能力(Monte Carlo / corner analysis) 有 EDA 工具 API 開發經驗 熟悉圖論演算法與資料結構 如果你熱愛把設計方法變成程式,並用演算法重新定義類比IC設計的可能性,歡迎加入我們!
應徵
10/09
瑞利光智能股份有限公司其他半導體相關業
新竹市經歷不拘大學以上
【職位描述】 設計RVI公司新創的光通訊引擎(Optical Engine)類比電路設計工程師,負責設計、開發、測試、優化和調試類比電路及系統,產品矽中介層、玻璃中介層與高階基板。負責從概念到生產的電路設計,確保光引擎達到品質和性能標準。 【主要職責】 1.設計和開發創新的類比電路和系統,應用於光引擎和相關技術領域。 2.測試、優化和調試類比電路,確保其性能符合設計規範和功能需求。 3.與跨部門團隊合作,包括系統工程師、軟體工程師、光學工程師及其他專業人員,共同實現產品開發目標。 4.與客戶密切合作,理解其需求並提供技術支持和解決方案。 5.制定和執行測試計畫,分析測試數據,並提出改進建議。 6.保持對最新技術趨勢的了解,並將其應用於產品設計中以提升競爭力。 Position Description: As an Analog Circuit Design Engineer at RVI, you will be a key contributor to the development of our next-generation Optical Engine. You will be responsible for designing, developing, testing, optimizing, and debugging analog circuits and systems used in advanced optical communication modules, including silicon interposers, glass interposers, and high-end substrates. This role spans from initial concept to mass production, ensuring the performance and quality of the optical engine meet industry standards. Key Responsibilities: 1.Design and develop innovative analog circuits and systems for optical engines and related applications. 2.Test, optimize, and debug analog circuits to ensure performance meets design specifications and functional requirements. 3.Collaborate with cross-functional teams, including system engineers, software engineers, and optical engineers, to achieve product development goals. 4.Work closely with customers to understand their requirements and provide technical support and tailored solutions. 5.Develop and execute test plans, analyze test data, and propose design improvements. 6.Stay updated on emerging technologies and incorporate relevant advancements into circuit design to enhance product competitiveness.
應徵
10/13
新竹市2年以上碩士以上
Digital IC design engineer - Familiar with Verilog RTL coding - Familiar with digital design flow (pre-layout simulation, timing constraint, synthesis, post-layout simulation) - Will be working on high speed Serdes IPs - Experience or interest in all-digital PLLs or clock-data recovery circuits is a big plus
應徵
10/17
台北市內湖區經歷不拘碩士以上
Responsible for developing custom IP for SoC design from specification definition, circuit design to testing, and familiar with component and process characteristics.
應徵
10/13
新竹市經歷不拘碩士以上
Job description Join our innovative team specializing in cutting-edge embedded memory solutions. We are seeking Analog Circuit Engineers to play a key role in the design and development of high-performance embedded DRAM and associated peripheral circuits. In this position, you will be responsible for the complete cycle of DRAM circuit design and simulation verification. Your tasks will involve developing novel circuit topologies, transistor-level design, optimizing performance metrics, and ensuring robust functionality through extensive simulations using industry-standard EDA tools. Required qualifications include a strong technical background in Electrical Engineering, Electronics Engineering, Computer Engineering, Physics, or a closely related field. Candidates must possess demonstrated, significant experience in DRAM circuit design and comprehensive simulation verification methodologies. Ideally, candidates will have proven design experience in specific DRAM-related circuit blocks, including but not limited to: Row and Column Decoder circuits Control path logic DC-DC converters, Charge Pumps, and Bandgap References Delay Locked Loops (DLLs) and Phase Locked Loops (PLLs) Negative voltage generators (NVG) and other critical peripheral circuits This is an excellent opportunity to contribute to state-of-the-art embedded memory designs in a dynamic, collaborative environment. If you are a skilled analog designer passionate about solving complex challenges in DRAM circuitry, we encourage you to apply and help shape the future of embedded memory technology.
應徵
10/13
新竹市2年以上碩士以上
【產品線描述】 高速傳輸 (USB4.0、DisplayPort、PCIe) 電路設計 (High Speed Serdes, Rx/Tx/Clocking, CTLE, DFE, CDR, PLL) 【工作說明】 高速介面、混合訊號類比電路設計 工作內容包含下列項目: 1. CDR architecture design (1/N-rate, DLL-based, PLL-based, PI-based)、DeMux 2. Adaptive CTLE/DFE 3. High speed ADC / Time-Interleaved ADC design 4. RF circuit related / EM related 5. PLL circuit/architecture design 6. High speed transmitter with FFE、P2S 7. High performance oscillator design (Ring/LC) 8. Impedance matching design 9. Circuit calibration techniques & flow 10. SerDes system behavior modeling & analysis 11. Chip Integration & Verification 【必要條件】 1. Master of Science / Above degree in Electrical Engineering, strong mixed-signal design concept. 2. 2-years above experience. 3. Familiar with design and simulation tools (Cadence's design environment, Circuit simulation : Spectre, HSpice, Finesim). 4. Strong debugging and analytical skills. 5. Clear communication skills and team work ability are necessary. 備註:上班地點為「台北」或「竹北」或「竹科」
應徵
10/16
新北市中和區2年以上大學以上
1. 具 0~2年數位晶片設計,或有 0~5年類比晶片設計工作經驗。 2. 具備基本數位和類比電路知識,熟習標準晶片設計流程。 3. 熟習業界常用EDA tools, 或Matlab/ Simulink。 4. 研習過CMOS or BiCMOS 類比設計電路課程,對放大器有基礎認識。 5. Experience in these areas is preferred: * BiCMOS or CMOS high-speed (>20Gb/s) circuit, Linear electrical amplifier & equalizer, High-speed (>25G) CDR/PLL/SerDes. * Linear optical laser driver & receiver (TIA + linear amplifier) 本職位負責類比IC電路的設計、驗證和除錯。這是一個高度技術性的職位,對公司的產品開發至關重要。我們正在尋找一位熱愛類比IC設計並具有相關經驗的人才,以推動公司的技術創新和發展。 如果您對這個職位感興趣,請投遞您的履歷表,我們立即與您聯繫。
應徵
10/14
新竹縣竹北市3年以上大學
analog and digital circuit layout繪製
應徵
08/27
新竹市1年以上碩士
(1) DRAM電路設計與模擬驗證 (2) 具備DRAM ROW/COLUMN/CONTROL/DC/DLL任一或更多電路設計經驗者佳 (3) 具備verilog經驗者尤佳 (4) 了解基本UNIX操作,具備AWK等Programing能力者尤佳 (5) 具備電機電子資訊物理相關背景,無工作經驗可
應徵
10/16
新竹市3年以上大學以上
我們是一家專精於高科技和半導體領域的專業獵頭服務公司, 我們現有客戶包括有歐洲公司、美國公司、台灣公司、日本公司, 有在NASDAQ上市、全球頂尖的公司、也有在台灣上市櫃的公司或是 start-up 公司。 我們手邊有來自多家高科技公司的各種重要職缺, 專長領域涵蓋: Digital IC Design Analog IC Design (SERDES, ADC/DAC, PMIC, PLL, etc) Algorithm Design Design Verification APR DFT SW/FW Physical Verification Testing Quality Production Product Engineering Product Marketing HR Finance Legal
應徵
10/15
新竹縣湖口鄉經歷不拘碩士以上
1.鋰電池管理系統開發 (BMS)之硬體電路研發 2.硬體驗証計劃制定及執行, 並產出實驗報告與結論 3.硬體/軟韌體問題解析, 需具邏輯與分析能力, 4.專案規格可行性評估 5.客戶技術議題對應 6.產品規格及相關技術文件制作 7.協助分析產品品質問題, 並對應產品安規及設計可靠度需求 8.新零件選用導入及測試驗証 9.協助工廠導入量產, 10.負責研發階段的客訴分析處理 11.協助分析量產後技術相關的品質及客訴問題 ※工作產品:主要針對Data center、基地台與其它高功率鋰電池模組的開發
應徵
10/13
新竹市2年以上碩士以上
We are seeking a skilled Analog IC Design Engineer with expertise in MIPI TX/ PLL design and sensor readout circuits. The ideal candidate will possess a strong foundation in analog design and a passion for developing cutting-edge solutions in a collaborative environment. 1.Design and implement MIPI TX and PLL circuits for high-speed data transmission. 2.Develop charge pump and LDO (Low Dropout Regulator) circuits to ensure efficient power management. 3.Design and optimize oscillator (OSC) circuits for precise timing applications. 4.Create sensor readout circuits, including CDS (Correlated Double Sampling), TDC (Time-to-Digital Converter), ramp circuits, DAC (Digital-to-Analog Converter), and comparators. 5.Collaborate with system engineers to define specifications and ensure alignment with overall project requirements. 6.Perform circuit simulations and analyses using tools such as Cadence, Spectre, or HSPICE. 7.Conduct design verification and validation through prototyping and testing. 8.Optimize designs for performance, power efficiency, and reliability. 9.Participate in design reviews and contribute to project documentation. 10.Provide support during the layout and fabrication process. Preferred Qualifications: 1.Familiarity with IP design principles. 2.Experience with mixed-signal circuits. 3.Knowledge of low-noise and high-speed design techniques.
應徵
10/09
新北市新店區經歷不拘碩士以上
1. MSEE is required. 2. Solid background in analog integrated circuits. 3. Knowledge of high speed serial link technology. 4. Familiar with SerDes PHY (USB, PCIE Express, SATA and Thunderbolt) and building block (DFE, CTLE, CDR, PLL and FFE transmitter). 5. Experience in design and simulation high speed transceiver is a plus.
應徵
10/13
新竹市經歷不拘碩士以上
Job desicription: Our Design Team specializes in the challenging field of Non-Volatile Memory (NVM) IC circuit design. We are actively seeking an experienced Analog Circuit Design Engineer to contribute to our cutting-edge developments in embedded NVM solutions and surrounding circuitry. As a key member of our team, you will be responsible for the design, verification, and debugging of essential analog building blocks like Bandgap references, LDOs, and Charge Pumps. A significant part of your role will involve designing critical memory peripheral circuits for NVM IP and test chips, including Array interfaces, Decoding logic, and Sense Amplifiers. Your responsibilities will span the design lifecycle, from contributing to IP specifications and core circuit design to ensuring performance through layout optimization and comprehensive corner simulations of NVM IPs. We are looking for candidates with proven expertise in analog circuit design, ideally with prior experience in embedded memory or NVM technologies. If you are an experienced analog designer eager to tackle complex challenges in non-volatile memory, we encourage you to apply and help shape the future of memory technology.
應徵
10/13
巧品珠寶_皇家翡麗有限公司首飾及貴金屬零售業
台北市大安區經歷不拘學歷不拘
【強力徵才】 臉書珠寶銷售直播主 常常有飲料 有餐點可以被餵食 地點:台北市大安區珠寶店 全新裝潢、無勞力活、有冷氣吹 幾乎每天都有東西可以吃餅乾、外送飲料 我們正在尋找珠寶直播主/珠寶業務/珠寶拍賣官/臉書直播珠寶拍賣官 並為您提供以下福利: - 我們也提供相關的珠寶知識與專業技能訓練,使您直播有線上話語權。 - 我們將為您與珠寶業建立良好的合作關係。 - 我們高層經驗豐富的教育講座,為您提供有效的專業的提升。 - 我們將為您提供專業的直播口才技巧訓練,讓您成為網絡上的亮眼之星。 - 我們會助您協調社交媒體平台,建立專屬圈子,與您的粉絲分享您的經驗。 - 我們專業的經理人會量身製作直播生涯規劃,助您更好地打造成功之路。 - 如果您的銷售表現優異,我們將提供優厚的獎勵。 - 我們提供高標準的直播室環境,為您打造理想的直播環境。 - 公司全天候提供免費咖啡、點心,讓您盡情享受工作的樂趣。 1.薪資滿三個月(依照工作表現能力)再調整 2.抽成超級高!不想賺錢不要來面試,會浪費彼此時間。 3.享有高底薪 加 高抽成 !! 4.排休制 勞退6% 排班制 想休哪天就休哪天 5.享有勞健保一切合法合規 無憂無慮上班趣 6.協助申請良民證,有其他證照額外加分 7.沒業務時想辦法做業績,可提供團隊協助,可提供公司協助 8.時不時訊息跟店面都有天降業績!! 用心經營薪水看得見! 9. 配合度高,排班、協助業務相關事宜 工作態度需積極 老闆不喜歡管人,需要自己管自己,輕鬆自由不擺爛
應徵
10/13
新竹市經歷不拘碩士以上
1. 觸控IC、TDDI或指紋辨識 IC 開發經驗 2. ADC或sensor IP 開發經驗 3. TFT-LCD或OLED Display driver IC 開發經驗 4. Charge pump、LDO、Source driver、Gate driver、High speed interface、OSC、BGR 相關開發經驗 5. 工作地點:【台南、新竹、台北】 以上其中任何一項相關者佳。