「HW Applications Engineer, Digital/Baseband (Taipei)(3069097)」的相似工作

【本職缺優先審核至高通官網投遞人選】請至高通官網上傳英文履歷表：https://qualcomm.wd12.myworkdayjobs.com/External/job/Taipei-TWN/Senior-Network-Engineer_3079323 【Talents who apply job through Qualcomm Career Website will be reviewed and considered as top priority】 • Collaborate with IT team members and end users effectively. • Ability to work as part of a virtual global/regional team, navigating cultural and language differences. • Capable of handling ambiguity and working independently with minimal supervision and guidance. • Prepare incident reports, including detailed analysis of troubleshooting findings. • Provide first and second level network operations support during escalations. • Independently or collaboratively troubleshoot and resolve network-related issues, including LAN, WAN, and WLAN. • Strong knowledge of networking technologies such as SD-WAN, QoS, DNS, LAN, and WLAN security including NAC, VLANs, VxLAN, and IPsec. • In-depth understanding of network routing and switching technologies and protocols like OSPF and BGP. • Knowledge of Ansible, Python, and Splunk is advantageous. • Proficient understanding and participation in RFC processes, including documenting and resolving network-impacting changes. • Hands-on experience with products such as Cisco, Arista, and F5 LTM is beneficial. • Bachelor's or higher degree in Computer Science, Information Systems, or Telecommunications. • Minimum of five years of experience in network support and administration. • Current CCNP certification with relevant professional experience; CCIE, Cisco DevNet certification would be an advantage. • Excellent written and verbal communication skills in English; proficiency in Mandarin is a plus.

請務必投遞官網(12475): https://careers.synopsys.com/job/hsinchu/applications-engineering-sr-staff-engineer/44408/85440860528 You Are: You are an innovative and resourceful engineer with a deep curiosity for solving complex technical challenges at the intersection of hardware and software. With a strong foundation in Electronic Engineering, Computer Science, or a related field, you are adept at leveraging your programming expertise—whether in Python, Tcl, Perl, or similar languages—to streamline and enhance engineering workflows. Your experience within UNIX/Linux environments equips you to navigate high-performance computing scenarios with ease. You thrive in collaborative, cross-functional teams and are energized by the opportunity to work closely with top-tier foundry partners and leading fabless companies. Your keen understanding of physical verification flows—such as DRC, LVS, PERC, FILL, and DFM—sets you apart, and you are eager to deepen your expertise in SoC physical design enablement, process effect analysis, and signoff. You are detail-oriented, capable of producing clear technical documentation, and communicate with clarity and empathy across diverse audiences. What You’ll Be Doing: 1.Delivering advanced physical verification solutions (DRC/LVS/PERC/Fill) for top-tier foundries and key fabless customers, ensuring high-quality silicon signoff. 2.Developing and validating process design kits (PDKs) and verification methodologies in collaboration with R&D and customer teams. 3.Partnering with R&D to innovate and improve Synopsys tools and flows, contributing to the evolution of physical verification technologies. 4.Providing hands-on customer support, troubleshooting issues, and delivering timely resolutions that enhance customer satisfaction and product adoption. 5.Coordinating with internal teams, including product managers and end-users, to align on best practices and ensure seamless integration of new technologies. 6.Documenting technical solutions, validation methods, and customer workflows for knowledge sharing and process improvement. 7.Staying up to date on industry trends and applying new insights to continuously optimize verification processes and tools. The Impact You Will Have: Accelerate the adoption and success of Synopsys physical verification products in leading-edge semiconductor manufacturing processes. Drive the development of robust PDKs and methodologies that enable customers to achieve first-time-right silicon. Enhance the quality and reliability of Synopsys verification tools through direct feedback and collaborative innovation with R&D teams. Strengthen Synopsys’ reputation as a trusted partner to top-tier foundries and fabless customers worldwide. Facilitate faster product cycles and reduced time-to-market for customers by delivering efficient and effective signoff solutions. What You’ll Need: BS or MS degree in Electronic Engineering, Computer Science, or a related field. Proficiency in at least one programming language, such as Python, Tcl, or Perl. Hands-on experience with UNIX/Linux environments and command-line tools. Familiarity with physical verification flows (DRC, LVS, PERC, FILL, DFM) and understanding of complex layout/electrical design rules. Strong investigative, analytical, and problem-solving abilities, with a passion for learning new technologies. Ability to produce clear, concise technical documentation and validation reports. Prior knowledge of tool/runset development/support and experience with SoC physical design is a plus.

【本職缺優先審核至高通官網投遞人選】請至高通官網上傳英文履歷表https://careers.qualcomm.com/careers/job/446705989572 【Talents who apply job through Qualcomm Career Website will be reviewed and considered as top priority】 https://careers.qualcomm.com/careers/job/446705989572 【General Summary】 As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm CPU Engineer, you will lead innovative Central Processing Unit (CPU) design efforts that have a critical impact on industries across the world. Qualcomm Engineers collaborate with cross-functional teams to design, verify, and implement multi-core CPU operations for all Qualcomm Business Units. 【Roles and Responsibilities】 • Collaborate with cross-functional teams (RTL, Physical Design, Circuits, CAD) to address critical physical design challenges in CPU implementations. • Develop innovative techniques within Physical Design and optimization space to meet stringent PPA targets. • Coordinate with CPU Software, Architecture, and RTL teams to understand various CPU use cases and propose impactful PPA optimizations. • Engage with external CAD tool vendors and internal CAD teams to identify and enhance optimization issues related to CPU designs. • Partner with all block-level implementation teams to analyze, implement, and improve optimization methods relevant to the designs. • Partner with Process, SoC and Post-silicon teams to analyze, improve design implementations. 【Must have skill/experience】 • Experience with Synthesis, place and route and signoff timing/power analysis. • Knowledge of high performance and low power implementation techniques • Proficiency in scripting (TCL, Python, Perl) 【Minimum Qualifications】 • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of Hardware Engineering, Electrical Engineering, or related work experience. OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of Hardware Engineering, Electrical Engineering, or related work experience. OR PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 3+ years of Hardware Engineering, Electrical Engineering, or related work experience.

We are seeking a highly experienced and detail-oriented Senior Hardware Board Development Engineer with 10–15 years of hands-on experience in hardware system design. This role focuses on the development of evaluation boards (EVBs) and customer reference boards (CRB) for advanced SoC/ASIC platforms, including board-level architecture, high-speed signal design, and system bring-up. You will work closely with SoC/ASIC design teams, firmware engineers, and validation teams to deliver robust reference platforms for internal and customer use. The ideal candidate has deep expertise in DDR4/DDR5, PCIe Gen4/5/6, high-speed SerDes, and power delivery networks, along with strong debugging and lab skills. Responsibilities * Lead the design and development of SoC/ASIC evaluation boards, including schematic capture, PCB layout review, and component selection. * Perform board bring-up, signal integrity validation, and system-level debugging. * Collaborate with cross-functional teams to support SoC/ASIC validation and customer reference designs. * Conduct SI/PI simulations and optimize high-speed interfaces (DDR, PCIe, Ethernet). * Generate technical documentation including schematics, BOMs, test procedures, and design guides. * Interface with vendors and manufacturing teams for prototype builds and production support.

Overview: Responsible for designing evaluation boards, performing product verification, and providing technical support to global customers. Key Responsibilities: • Design and develop evaluation boards (EVBs) for product validation. • Conduct product testing and verification using lab equipment. • Prepare application-related documentation. • Review customer schematics and PCB layouts. • Provide technical support to worldwide customers. Qualifications: • Strong debugging and problem-solving skills. • Experience in prototype board design and troubleshooting. • Proficient in lab equipment usage (oscilloscope, logic analyzer). • Skilled in schematic and PCB layout tools (Cadence OrCAD, Altium, PADS). • Familiarity with analog and digital IC applications. • Knowledge of high-speed interface applications and compliance standards is a plus. • Excellent verbal and written communication skills. • Team-oriented with strong cross-functional collaboration abilities.

Welcome to apply from NVIDIA Career page: Server: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Taiwan-Taipei/Senior-System-Application-Engineer_JR1996786-1 Notebook: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Taiwan-Taipei/Senior-System-Application-Engineer_JR1996805 We're Application Engineering team and searching for System Engineer to engage for partner development in ARM-based (Grace CPU) and X86-based servers with NVIDIA solutions. NVIDIA is creating the future of computing and looking for passionate, dedicated, and forward-thinking individuals to help make that happen. What you’ll be doing: - System-level tool development/debug from the product segment needed. - Join the partner design review through system architecture, schematics, and layout, thermal and validation plan. - Work with partners for issue analysis and root cause. - Drive with partner's design quality. - Provide tech training to customers. - Overseas travel will be required if needed. What we need to see: - Master's Degree or equivalent experience in Computer Science/Computer Engineering/Electrical Engineering or related field. - 5+ years of server or PC design work experience. - High-Speed Signal design/ Strong knowledge of GPU Server System Architecture includes X86 and ARM-based. - Familiar with Linux. Good concept of thermal and mechanical design. - Skills of ARM Server System Architecture are a strong plus. Skills of Python/Perl is a plus - Knowledge of the PCIe architecture with AER (Advanced Error Reporting). - Excellent communication skills, flexibility in task assignments, and working under pressure. - Strong communications skills in English, Innovative, Independent, results-oriented problem solver. Ways to stand out from the crowd: -Strong oral & written communication skill (both English and Chinese). -Development experiences in datacenter design or server product. -Self-motivated and aggressive to learn

- Responsible for EMC system testing. - Assist pre-sales activity of EMC test and measurement instrument. - Online/On-site customer support from pre-sale to post-sale, including presentation, demonstration, training and application cases. - Through providing technical expertise in broad range of complexity, contribute to build a long-term, trustworthy relationships with customers.

1. 主動式電子掃描陣列 (相控陣列) 射頻元件及電路板佈局設計。 2. 評估與天線、熱控、電源、及機構之整合相容性，並進一步除錯和優化。

1. 協助客戶問題釐清及解決, 處理客戶訴願 2. 協助業務推展 3. USB/SATA/PCIe/Ethernet/Serdes電器特性量測

1. In-depth knowledge of PCB layout, OrCAD/Allegro tools, circuit design, and PCB structure. 2. Prepare technical documentation including product specifications, layout instructions, test procedures, etc. 3. Transfer products to manufacturing with clear documentation and help C.M. and technical support to solve problems. 4. Hardware engineer need co-working with PM, BIOS, IPMI, EMI, Thermal, ME RD friendly. Need have good team work. Need to have the concept of project ownership. 5. Need have power VR and component design knowledge 6. Resolve complicated issues and drive to root cause on critical engineering problems

Welcome to apply here: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Taiwan-Taipei/System-Design-Validation-Engineer_JR1995771 We are looking for Design Validation Engineer in Taipei for board/system power qualification and function test, responsible for NVIDIA Data Center platform, Graphics board, ARM Based platform and Autonomous Driving Platform. If you're creative and autonomous, we want to hear from you! What you'll be doing: - Server/Motherboard/Mobile system functionality test. - Clock/Sequency/GPIO signal measurement and verification. - WAT (wide area test) function test. - Gaming test. - High/Low speed interface SI test. - Co-work with hardware design engineers on debug and FA. - Co-work with mechanical/thermal engineers for cooler/heatsink design. What we need to see: - Bachelor/Master in EE, computer science, or relative majors. - Proficient with Linux system and GPU setup. - Capable of writing simple shell scripts and analyzing test results using commands. - Familiar with PC and Datacenter system hardware assembly, MB BIOS upgrade, and network troubleshooting - Proficient with a programming language (C/C++, Python, Java, or Perl) - Understand UEFI boot OS startup process and out-of-band (OOB) management using BMC, ipmitool, and redfish. - Good English communication skills - 3 years’ experience or above Ways to stand out from the crowd: Experience in measuring DC-DC power solution. Proactive personality. Good team player. Strong desire on creativity. Quick thinking.

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU & SOC acts as the brains of computers, robots, and self-driving cars that can understand the world. We are looking for System Power Validation Engineer in Taipei for board/system power qualification and function test, responsible for NVIDIA Data Center platform, Graphics board, ARM Based platform and Autonomous Driving Platform. If you're creative and autonomous, we want to hear from you! What you'll be doing: • DC-DC Power measurement. • DC-DC Power solution testing and debugging. • Co-work with hardware design engineers on debug and FA. • Co-work with mechanical/thermal engineers for cooler/heatsink design. What we need to see: • Bachelor/Master in EE, computer science, or relative majors. • Familiar with Linux OS. • Good English communication skills. • Good PC system/platform knowledge. Ways to stand out from the crowd: • Proactive personality. • Good team player. • Strong desire on creativity. • Quick thinking.

##職務說明 - 相控陣列系統(通訊/雷達)射頻電路(PA/LNA/Mixer/Filter/PLL)架構規劃、模擬及電路設計。 - 根據系統規格進行電子元件評估與選用。 - 與Layout工程師、結構工程師溝通、協調並完成電路、佈局設計及確認 - 電路板及系統層級效能測試、驗證、除錯並將產品導入量產。 - 執行產品研發流程及技術文件產出 ##技能需求 - 具電路 RF / Analog / Digital 電路三年以上設計經驗 - 熟悉量測儀器使用 - 具備基礎焊接能力

1. 無線通訊RF電路的設計、優化、驗證(LTE, WiFi, BT, NFC, GPS等) 2. 設計規格評估、線路圖與電路佈局設計 3. 射頻系統共存Co-existence分析、De-sense對策、EMC射頻法規問題改善 4. 協助產品導入生產線量產

[ Job Summary ] We are seeking a skilled Hardware Engineer to lead the design, development, and validation of AIoT embedded hardware systems. The ideal candidate will possess strong circuit design capabilities and hands-on experience with validating and debugging, including the ability to critically analyze vendor-supplied electronic schematics to identify potential improvements in performance, power efficiency, and signal interference mitigation. [ Key Responsibilities ] Hardware Development: • Design and develop AIoT embedded hardware system, including MCU integration, power management, and communication interfaces • Create schematic diagrams and collaborate with suppliers’ engineers for PCB design and circuitry review • Conduct hardware validation and debugging using oscilloscopes, logic analyzers, spectrum analyzers, and other lab equipment • Prepare technical documentation, including design specifications, test reports, and production guidelines Collaboration & Leadership: • Provide technical leadership in hardware design and collaborate closely with ODM suppliers’ engineering teams to optimize circuit architecture. • Collaborate cross-functionally with firmware, mechanical, validation, and manufacturing teams to ensure seamless product development • Conduct circuit reviews, testing, and validation to ensure high-quality and high-performance, low-power solutions. • Audit, manage, plan, and review the electric design the ODM supplier does from professionalism and process. Required Qualifications: • Bachelor's or Master's degree in Electrical Engineering, or a related field. • 3+ years of experience in hardware development for IoT products. • Solid understanding of analog and digital circuit design principles • Well known in schematic capture tools and familiarity with PCB layout workflows • Hands-on experience with hardware debugging and lab instrumentation • Meticulous ability to uncover latent hardware issues, such as identifying potential leakage currents, malfunction circuit or anything may impact performance. • Strong analytical and problem-solving skills Preferred Qualifications: Bonus points • Experience with RF systems (e.g., Sub-GHz, LoRa) • Experience with antenna design, impedance matching, and field pattern analysis • Familiarity with STM32, NXP, or TI MCU platforms • Knowledge of regulatory standards such as FCC, CE

1.類比訊號分析及電路設計。 2.小信號低雜訊放大線路的設計、模擬、量測及驗證。 3.熟悉OPAMP, Filter, ADC/DAC,… 規格, 性能特性及應用。 4.電子電路硬體的設計、驗證，失效分析和故障排除 5.萬潤熱烈招募有意投入設備產業的菁英，如未具備本項職缺所需相關技能與工作資歷者 亦歡迎投遞，薪資另議。 6.上班地點 新竹：新竹市工業東四路24-2號2樓 /新竹縣竹北市保泰三路 78 號 台中：台中市西屯區工業區37路18號 高雄：高雄市路竹區路科十路1號

The Hardware Test Engineer provides crucial hands-on technical support for production test systems. This role is responsible for independent execution of issue triage and in-depth troubleshooting of production fallouts. This engineer will also actively contribute to yield improvement initiatives and assist with the development, validation, and maintenance of tester stations and fixtures. Minimum Qualifications: ● BS or MS degree in Electrical Engineering, Electronics Engineering, or a related field. ●0-1 years of practical experience in electronic manufacturing or related hardware testing environments. ● Proficiency in digital and analog circuit analysis, PCBA bring-up, and systematic troubleshooting of test failures. ● Solid command of EE lab instruments (e.g., oscilloscopes, DMMs, power supplies) and proven ability to apply these skills to solve production problems. ● Demonstrated ability to work independently on assigned tasks and communicate technical findings clearly. Preferred Qualifications: ● Foundational experience with PCBA and module failure analysis (FA) techniques. ● Familiarity with production data analysis and simple process improvement methodologies. ● Experience with Linux operating systems in a testing or manufacturing environment. Responsibilities: ● Execute and own the PCBA and module troubleshooting, bring-up, and rework processes from start to finish. ● Maintain and update product troubleshooting procedures and guides as needed. ● Analyze failure data to provide detailed failure analysis findings and clear root cause hypotheses to the test development team. ● Serve as the primary on-site technical contact for manufacturing partners, rapidly triaging production line issues and driving immediate containment actions. ● Collaborate with cross-functional teams (e.g., HW Design, Manufacturing) to ensure test integrity and high product yield.

1. 主動式電子掃描陣列 (相控陣列) 雷達系統之硬體電路設計。 2. 熟悉RF PCB Layout Guideline與PCBA廠商管理。 3. 理解SI/PI的觀念。

1. Architecture design and RTL implementation of Automotive/Smartphone chipset 2. SoC system power and performance analysis 3. SoC system bus and memory subsystem design, integration, and modeling 4. SoC low power design, integration, and modeling 5. SoC functional safety analysis, design, integration, and modeling 6. SoC cyber security analysis, design, integration, and modeling

Overview: Basic knowledge of power electronics, including DC/DC, AC/DC converter, power devices, and magnetic components. Participate in the product development discussion and communicate with PM/PE teams to define new product’s features. Responsible to design the evaluation boards, product verification and provide technical support for customers. Responsibilities: -Design EVB board, Layout check & Debug PCB board -Product testing and verification -General application related document -Review customer’s circuit and provide technical support for worldwide Qualifications: -Knowledge in oscilloscope operation -Familiarity with Altium