「FPGA 研發工程師」的相似工作

1. 主FPGA與CPLD專案開發與維護 2. 熟RTL coding, 具Xilinx ISE/Vivado或Altera Quartus II專案設計經驗 3. 能與軟,韌,硬體等相關部門co-work 4. 具Xilinx PCIe 與 MIG DDR3/4系統整合經驗者佳

1. 熟Verilog及C/C++語言設計。 2. 規劃執行產品韌體之撰寫。 3. 執行、協助或配合韌體新技術之研發、導入。 4. 執行產品韌體測試。

我們正在尋找一位資深人員，帶領FPGA專案開發，包含主機板時序控制、客戶FPGA專案需求開發設計，及FPGA實作上必要時需與軟硬體研發團隊成員進行協作。 工作內容： 1. 數位邏輯設計並熟悉RTL Coding架構。 2. 熟悉並使用Altera Quartus或Xilinx Vivado開發FPGA系統。 3. 熟悉主機板CPU power sequence control。 4. 熟悉影像方面的高速介面(SDI/HDMI)、DDR高速介面、PCIe、I2C、UART、SPI等介面應用。 5. SoC FPGA系統整合。 6. FPGA IP 整合及驅動程式開發。

Overview We are seeking a highly skilled FPGA Engineer to architect and implement high-performance digital logic for next-generation camera platforms. This role is pivotal in enabling real-time video processing and efficient sensor integration. Key Responsibilities Design & Implement Camera Interfaces: Develop FPGA logic to handle high-speed camera data streams (e.g., MIPI, LVDS, CSI). Real-Time Image Processing: Integrate or design FPGA IP cores for image signal processing, filtering, and feature extraction. Sensor Synchronization: Ensure precise timing between multiple camera modules and other sensor inputs. Latency Optimization: Optimize FPGA architectures for low-latency video capture and data throughput. Verification & Testing: Create simulation testbenches and perform hardware-in-the-loop testing for camera pipelines. Collaboration: Work closely with camera hardware and system integration teams to define requirements and validate performance.

1.Work with Hardware, BIOS ,BMC, and Firmware team for CPLD design, validation, and maintenance 2.Develop Server production power on sequence control logic by CPLD / FPGA 3.Implement new technology and design concept in CPLD / FPGA Design test plan, development specification, and issue tracking.

工作內容： 1. 作為產品工程設計團隊的一員，FPGA 算法工程師，須與大家一起驅動新產品的開發。 2. 工作重點放在 FPGA 影像處理與分析。 3. FPGA 算法工程師將研究，開發和設計次世代視覺演算法及程式。 主要負責： 1. FPGA 電腦視覺演算法開發。 2. 研究最新影像處理技術。 3. 將最新技術的算法以 FPGA 實現，實驗並分析其結果。

1. 主動式電子掃描陣列 (相控陣列) 雷達系統之數位控制。 2. 熟悉Verilog與FPGA開發流程，了解High-Level Synthesis開發技術。 3. 具有實作數位訊號處理與數位架構設計於FPGA之經驗。

(1) FPGA軟硬體開發 (2) Verilog程式開發 (3) 軟硬體除錯

1.影像應用或訊號處理 IC 研發 2.對數位影像、訊號處理, Verilog/VHDL, 具FPGA design flow 經驗。

我們專注於打造次世代電路模擬專用硬體加速器，誠徵數位IC設計師，加入我們的行列，透過數位電路設計與驗證實力，推動電路模擬的極致效能與可靠性。 你將負責： ▪️ 設計電力分析專用晶片架構及系統 ▪️ RTL設計與功能驗證，確保系統正確性與效能表現 ▪️ 參與SoC數位區塊的功能設計、整合與驗證 ▪️ 進行綜合、時序分析與低功耗設計優化 我們期待你具備： ▪️ 電子/電機工程學士以上學歷 ▪️ 精通Verilog/SystemVerilog與RTL設計流程 ▪️ 熟悉綜合與時序分析方法 ▪️ 具備DSP演算法硬體實現經驗 ▪️ 理解低功耗設計技術與實務 專業工具： ▪️ Synopsys Design Compiler ▪️ Cadence Genus ▪️ Mentor Graphics 加分條件： ▪️ 具備完整SoC設計專案經驗 ▪️ 熟悉UVM或其他驗證方法學 ▪️ 有28nm以下先進製程設計或量產經驗 ▪️ 具備電力電子或電源管理電路相關背景 如果你熱愛透過數位IC設計挑戰能源晶片的極限，歡迎加入我們，打造更智慧的硬體未來！

DRAM數位邏輯電路設計 『具工作經驗者，薪資另議』

【工作內容】 1. 數位電路邏輯控制程式設計 2. 基本通訊界面控制 (UART/I2C/SPGIO/SPI) 3. CPLD規格評估 4. CPLD規格書規劃、撰寫、維護 5. Verilog/VHDL模擬除錯設計 6. CPLD測試、除錯、驗證及最佳化 7. 維護現有CPLD專案 【其他條件&加分項目】 1. 熟悉 Verilog, 2. 若具有 Altera Quartus II, Lattice Diamond , Modelsim能力佳 3. 具有開創性及解決問題的能力 4. 客戶導向及良好溝通技巧 5. 具備推動團隊完成任務的能力 6. 流程管理能力

The successful candidate will work with team members and apply his/her design techniques to work on different phases of complex logic design for ASIC/SOC project. The role will include working on the following tasks from time to time: HDL coding, documentation, RTL quality check, cooperate with back-end engineer etc. 【Key Responsibilities】 - Responsible for front-end digital logic design in ASIC/SOC projects. - Perform HDL coding (Verilog/SystemVerilog). - Prepare and maintain design documentation (specifications and design documents). - Conduct RTL quality checks (Lint, CDC, power analysis, etc.). - Collaborate with Backend/Physical Design engineers to achieve timing closure. 【Core Requirements】 - Education/Experience: Master’s degree with ≥ 2 years, or Bachelor’s degree with ≥ 3 years of digital ASIC/SOC design experience. - RTL Design: Proficient in RTL coding using Verilog/SystemVerilog or VHDL. - TO / Front-End Flow: Familiar with front-end design flow, including synthesis, Lint, CDC, and STA. - EDA Tools: Experience with tools such as Lint, CDC check, and PrimeTime PX (power analysis). - Documentation: Ability to write design specifications and technical documents. - Collaboration: Work closely with the Design Verification (DV) team on IP verification. 【Preferred Qualifications】 - Familiarity with CPU architectures (x86/ARM/8051). - Knowledge of AMBA bus protocols (AXI/AHB/APB). - Understanding of PCIe protocol.digital IP/SOC design verification.

[Responsibilities] ★ Experienced in ISP (Image Signal Processing) ★ Plan design architecture. ★ Develop high quality digital design. ★ Be familiar with IC design flow. [Minimum Qualifications] ★ Outstanding problem analysis and debugging skills. ★ Experienced in C language. ★ Experienced in Verilog RTL language ★ Experienced in digital IC design front-end flow ★ Experienced in CAD tool usage such as simulation tool, linting tool, synthesis tool, member compiler [Preferred Qualifications] ★ Nice to have experiences in scripting language. ★ Nice to have experiences in FPGA flow

• 負責數位 IC 設計相關工作，包括 RTL 設計、Synthesis、STA、Test Mode 規劃等 • 協助 FPGA 驗證與相關測試 • 撰寫技術文件（如規格書、設計報告等） • Responsible for digital IC design, including RTL design, Synthesis, STA, and Test Mode planning. • Assist with FPGA verification and related testing. • Write technical documents (e.g., specifications, design reports, etc.)

1. 具 0~2年數位晶片設計，或有 0~5年類比晶片設計工作經驗。 2. 具備基本數位和類比電路知識，熟習標準晶片設計流程。 3. 熟習業界常用EDA tools, 或Matlab/ Simulink。 4. 研習過CMOS or BiCMOS 類比設計電路課程，對放大器有基礎認識。 5. Experience in these areas is preferred： * BiCMOS or CMOS high-speed (>20Gb/s) circuit, Linear electrical amplifier & equalizer, High-speed (>25G) CDR/PLL/SerDes. * Linear optical laser driver & receiver (TIA + linear amplifier) 本職位負責類比IC電路的設計、驗證和除錯。這是一個高度技術性的職位，對公司的產品開發至關重要。我們正在尋找一位熱愛類比IC設計並具有相關經驗的人才，以推動公司的技術創新和發展。 如果您對這個職位感興趣，請投遞您的履歷表，我們立即與您聯繫。

- 用Verilog/SystemVerilog撰寫RTL，負責數位電路介面與模擬驗證。 - 參與晶片模組整合與ASIC合成（含DFT、時序收斂）到Tape-out。 - 主導設計專案與SoC整合。 - 帶領小團隊（3人），負責任務分配與技術指導。

(1) 自動化設備嵌入式系統開發 (2) 研發設計FPGA-Based Video/Camera 應用 (3) 熟悉FPGA系統開發、RTL Coding、Altera Quartus II或Xilinx Vivado (4) 協助驗證FPGA電路(Schematic) (5) 具備基礎MS Windows Programming能力者佳 (6) 熟悉I2C、UART、I2S 等protocol 者佳

(1) 自動化設備運動控制晶片研發 (2) 熟悉FPGA系統開發、Altera Quartus II (3) 協助驗證控制晶片週邊電路(Schematic) (4) 具備基礎工業控制知識者佳

About us: VICI Holdings' Hardware team is seeking a skilled FPGA Engineer to join our dynamic group. In this role, you will be pivotal in advancing our trading systems, contributing to the development and enhancement of cutting-edge technologies. We boast the leading software development team in Taiwan and possess FPGA design technology in parallel with wall street trading firms. This expertise enables us to build low-latency, fully automated trading systems. Our trading strategies cover stocks, futures, and derivatives, achieving a daily global trading volume in the hundreds of millions dollars. Roles/ Responsibilities: • High speed IP interface design (such as PCIE gen 3, 4 / Ethernet, DDR etc.) • In charge of FPGA design/ implementation/simulation. • Transmission protocol layer development. • Optimizing hardware for latency. • Proficiency with Xilinx design environment. Candidate Requirements: • BS/MS degree above from EE, CE with 2+ years of relevant work experience • Experience in high-speed interface design or knowledge in PCIE/ Ethernet/MIPI/DDR design or implementation is a plus • Experience using System Verilog and at least two prior RTL design is a required. • Demonstrated ability to tackle complex design challenges and implement effective solutions Other Requirements: • High self-motivated individual with good communication skill. • English level – working level proficiency is a plus. Interview Process: • Resume selection ->Coding Test -> AI Interview (Online) -> F2F Interview -> HR Manager