Marvell_邁威爾科技有限公司 企業形象

公司介紹

產業類別

聯絡人

余小姐

產業描述

IC 設計業

電話

02-87529000

資本額

傳真

暫不提供

員工人數

暫不提供

地址

新竹縣竹北市環科一路3號十樓


公司簡介

At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Progress takes many forms. Sometimes, progress is the breakthrough solution that helps the world leap forward. Other times, progress is the result of unforeseen obstacles that make us pause and think about what we need to do differently in order to do things right. Focused and determined, we unite behind your goals as our own. We leverage our unrivaled portfolio of data infrastructure semiconductor technology to identify the best solution for your unique needs. And we sit shoulder-to-shoulder with your teams to build it. Agile in our thinking, and our partnerships, we look for unexpected connections that deliver a competitive edge and reveal new opportunities. At Marvell, we’re driven by the belief that how we do things matters just as much as what we do. To learn more, visit: www.marvell.com.

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Marvell_邁威爾科技有限公司 商品/服務

https://www.marvell.com/

Marvell_邁威爾科技有限公司 企業形象

福利制度

Marvell hires the best of the best. We are the most innovative company working in the semiconductor industry today. We have an outstanding history of delivering next generation products that are revolutionizing the way the world works, and we’re looking for smart, talented, like-minded people to join us on the adventure. If you want to achieve great things, then we want to talk with you. And we want to reward you for striving for the best. We not only push the envelope in terms of product development, we foster your personal and professional growth by providing an advanced research environment where your work can really make a difference. You’ll be shoulder to shoulder with some of the most talented people in the world and offered the opportunity to help set the standard that other companies want to follow. At Marvell, we attract the top talent in the industry. And we know that top talent expects and deserves stellar benefits. We offer one of the most robust benefits packages available today, designed with your particular needs in mind. Of course you’ll be offered a competitive salary, plus incentive stock options, but that’s just the start. You’ll also be offered: * Insurance Coverage: Labor Insurance, National Health Insurance, Group Insurance * Pension Plan * Incentive Plan * Employee Stock Purchase Plan * Employee Stock Option Plan * Restricted Stock Option Plan * Good Vacation and Leave Plan * Medical/Health Club Reimbursement Plan * Competitive Training and Education Plan * Employee Welfare Committee Benefits * More...

工作機會

廠商排序
8/05
新竹縣竹北市5年以上碩士以上待遇面議
Marvell is seeking an Analog Design Engineer to contribute to the development of multi-tens of GHz Serdes related circuit. These leading edge Serdes IPs are used in multiple products and systems. • Candidate will be responsible for active circuit design. • Design leading edge Serdes related circuits, which circuit performance will need to transcend beyond industry leading products. • Develop transmission line structures to enable higher performance than would normally be achievable. • Design of various other analog circuits including linear regulators, AGC loop, current/voltage sensors, bandgaps etc.
應徵
8/14
新竹縣竹北市5年以上大學以上待遇面議
*Develop and optimize test methodologies for optical/electrical performance validation (e.g., IV, TIA/DRV behavior, MZM control, PD characterization). *Design, set up, and maintain automated and semi-automated optical/electrical test stations. *Cross-functional collaboration with design, packaging, and process teams to define test requirements and ensure design-for-test (DfT) alignment. *Support test readiness for new product introduction (NPI) and mass production ramp. *Interact with external vendors, contract manufacturers, and FA teams to resolve issues and improve test quality. *Document test processes, procedures, and technical learnings in a structured, clear manner.
應徵
7/21
新竹縣竹北市7年以上碩士以上待遇面議
Central Engineering AMS-IP team provides leading-edge SerDes PHY solutions and other Analog Mixed-Signal IPs to support all Marvell products. ASIC design engineer responsible for post-RTL design flow. You will be responsible for block and /or chip-level synthesis, timing closure, DFT generation, and ECOs. The responsibilities include but are not limited to: · Improve the design methodology and flow. · Synthesis, timing closure, and DFT support for various types of SerDes IPs ranging from 10Gbps to 224Gbps data rates for different applications. · Collaborate with Analog/Digital design teams to deliver competitive SerDes IP solutions for all the Marvell product lines. · Provide support to the product teams, for both pre and post-silicon.
應徵
6/04
新竹縣竹北市10年以上大學以上待遇面議
Marvell is seeking an experienced Director of Test Engineering to lead our Taiwan based Test Engineering team. The ideal candidate will have a strong background in Test Engineering and familiarity with test equipment and test manufacturing processes. As a strategic leader, this role is responsible for driving test development, introduction into OSAT, support thru EOL manfuacturing and operational excellence to effectively support Marvell Test and Product teams. The successful candidate has a proven track record in leadership, a deep understanding of test operations, and the ability to collaborate effectively with both internal stake holders (US and Singapore based Product & Test Engineering teams, Supply Chain), external tool vendors and OSAT partners. Key Responsibilities: • Lead and manage the test engineering team, ensuring that new product introduction and production support achieves operational excellence. • Oversee the conversion and development of test programs where required on the Teradyne and Advantest test platforms, ensuring all project milestones and quality deliverables • Lead troubleshooting and problem-solving efforts related to testing of products and ensure timely resolution of issues. • Develop and implement strategies to optimize test processes and enhance operational effectiveness to support Product and Test Engineers located in Marvell global sites. • Partner with stake holders in managing hardware (Load boards, Probe cards, Change kits, Sockets) design, fabrication, testing and deployment to support NPI projects and high volume ramp ups in OSATs. • Collaborate with cross-functional teams, including engineering, quality assurance, and operations, to ensure alignment with business objectives. • Establish and maintain strong relationships with internal and external stakeholders, including equipment vendors, service providers and OSATs for high volume ramp up projects. • Drive continuous improvement initiatives, utilizing data and feedback to optimize test operations and reduce downtime. • Maintain up-to-date knowledge of industry trends and emerging technologies related to test engineering, test equipment and operations.
應徵
6/27
新竹縣竹北市10年以上大學以上待遇面議
As a Principal Product Engineer at Marvell's Hsinchu office, you will play a crucial role in enhancing and maintaining our optical module production lines with contract manufacturers in Asia. This position offers the opportunity to immerse yourself in and drive the success of Marvell's cutting-edge optical products, including Silicon Photonic Light Engines, pluggable modules, and co-packaged optics. Ideal candidates will possess extensive experience in high-volume manufacturing of opto-electrical devices, preferably optical transceivers, and have multidisciplinary knowledge encompassing optics, mechanical, electrical, and firmware engineering. Responsibilities: *Collaborate with the US team to receive and learn about NPI products, and work with both internal and CM teams to transition them to volume production. *Sustain and continually improve production yield. *Proactively manage production line risks in collaboration with PTE, SQE and planning groups. *Work closely with the US module PE team to collaboratively own the products across product lifecycle. *Implement automatic in-process controls and monitor production line yield on a regular basis. *Production line failure analysis (FA) and failure disposition.
應徵
8/14
新竹縣竹北市6年以上碩士以上待遇面議
1. Responsible of preparing, coordinating and technical supporting Marvell SoC/ASIC projects using IPs developed by Marvell Central Engineering. 2. Preparation includes kick-off with BU and customer (if needed) about IP usage, risk assessment and IP/package/test board/test plan review, etc in pre-silicon phase as well as providing regular interlock and training to Marvell internal BUs. 3. Coordination includes driving the best engineering resources for SoC bring-up and issue debug until stable production is achieved. 4. Technical support is essentially using the knowledge and experience about Marvell PHY and supporting analog IPs to resolve any system and IP level issues observed from SoC bring-up to production. 5. The IPs are mostly Marvell multi-data rate high-speed SerDes as well as supporting analog IPs like analog bias, clock buffer and generator, process monitor, temperature sensor, etc. 6. The high-speed interface applications of interest are Ethernet single channel 10G/25G/50G/100G/200G KR/CR/C2M/C2C, PCIe Gen1-Gen6, CPRI, JESD, CEI, etc.
應徵
8/04
新竹縣竹北市8年以上碩士待遇面議
ASIC design verification engineer responsible for the design, verification, and evaluation of digital circuits in high-speed data communication ICs. The candidate will be involved in verification plan development, test environment setup, modeling, test case development, and execution. As a senior member in the team, he/she will focus on improving the design verification methodology and flow. Work cross-function with analog and DSP teams to achieve high-quality analog mixed-signal verification. The responsibilities include but not limited to: (1) Architect and develop UVM-based testbenches for complex IP and SoC verification. (2) Define and drive verification plans, test strategies, and coverage goals. (3) Collaborate with design, AMS, and validation teams to ensure functional correctness. (4) Lead debug efforts, root cause analysis, and regression triage. (5) Guide and mentor junior DV engineers in UVM methodology and best practices. (6) Contribute to the development of reusable verification components and infrastructure. (7) Continuously improve verification processes, tools, and automation frameworks
應徵
8/05
新竹縣竹北市7年以上大學待遇面議
As a test development staff engineer in the Operations business group, you will test features on the silicon semiconductor chips Marvell produces for internal and external customers. You will make sure we don’t ship out any underperforming units. You’ll work closely with design to make sure their chip features are testable and that the results meet the customer’s specifications. You may even have to write new code or develop new testing strategies when our chips outpace the capabilities of current testing equipment. Key Responsibilities: • Develop production and characterization ATE test programs and hardware. Understand test requirements, test methodologies and test strategies. • Collaborate with Design teams on new products from debug, characterization to full production. • Manage production test programs at various manufacturing sites. Support new product qualification and transfer. • Identify & drive test cost reduction and yield improvement projects. • Align test engineering systems/processes for various manufacturing sites
應徵
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