「資深類比IC設計工程師 (NB)」的相似工作

Job desicription: Our Design Team specializes in the challenging field of Non-Volatile Memory (NVM) IC circuit design. We are actively seeking an experienced Analog Circuit Design Engineer to contribute to our cutting-edge developments in embedded NVM solutions and surrounding circuitry. As a key member of our team, you will be responsible for the design, verification, and debugging of essential analog building blocks like Bandgap references, LDOs, and Charge Pumps. A significant part of your role will involve designing critical memory peripheral circuits for NVM IP and test chips, including Array interfaces, Decoding logic, and Sense Amplifiers. Your responsibilities will span the design lifecycle, from contributing to IP specifications and core circuit design to ensuring performance through layout optimization and comprehensive corner simulations of NVM IPs. We are looking for candidates with proven expertise in analog circuit design, ideally with prior experience in embedded memory or NVM technologies. If you are an experienced analog designer eager to tackle complex challenges in non-volatile memory, we encourage you to apply and help shape the future of memory technology.

Job description Join our innovative team specializing in cutting-edge embedded memory solutions. We are seeking Analog Circuit Engineers to play a key role in the design and development of high-performance embedded DRAM and associated peripheral circuits. In this position, you will be responsible for the complete cycle of DRAM circuit design and simulation verification. Your tasks will involve developing novel circuit topologies, transistor-level design, optimizing performance metrics, and ensuring robust functionality through extensive simulations using industry-standard EDA tools. Required qualifications include a strong technical background in Electrical Engineering, Electronics Engineering, Computer Engineering, Physics, or a closely related field. Candidates must possess demonstrated, significant experience in DRAM circuit design and comprehensive simulation verification methodologies. Ideally, candidates will have proven design experience in specific DRAM-related circuit blocks, including but not limited to: Row and Column Decoder circuits Control path logic DC-DC converters, Charge Pumps, and Bandgap References Delay Locked Loops (DLLs) and Phase Locked Loops (PLLs) Negative voltage generators (NVG) and other critical peripheral circuits This is an excellent opportunity to contribute to state-of-the-art embedded memory designs in a dynamic, collaborative environment. If you are a skilled analog designer passionate about solving complex challenges in DRAM circuitry, we encourage you to apply and help shape the future of embedded memory technology.

USB Type-C PD/E-marked IC design

Hands-on experience in the design and development of at least one of the following analog circuits: ADC, DAC, PGA, high-speed analog driver, PLL, or SerDes.

We are seeking a skilled Analog IC Design Engineer with expertise in MIPI TX/ PLL design and sensor readout circuits. The ideal candidate will possess a strong foundation in analog design and a passion for developing cutting-edge solutions in a collaborative environment. 1.Design and implement MIPI TX and PLL circuits for high-speed data transmission. 2.Develop charge pump and LDO (Low Dropout Regulator) circuits to ensure efficient power management. 3.Design and optimize oscillator (OSC) circuits for precise timing applications. 4.Create sensor readout circuits, including CDS (Correlated Double Sampling), TDC (Time-to-Digital Converter), ramp circuits, DAC (Digital-to-Analog Converter), and comparators. 5.Collaborate with system engineers to define specifications and ensure alignment with overall project requirements. 6.Perform circuit simulations and analyses using tools such as Cadence, Spectre, or HSPICE. 7.Conduct design verification and validation through prototyping and testing. 8.Optimize designs for performance, power efficiency, and reliability. 9.Participate in design reviews and contribute to project documentation. 10.Provide support during the layout and fabrication process. Preferred Qualifications: 1.Familiarity with IP design principles. 2.Experience with mixed-signal circuits. 3.Knowledge of low-noise and high-speed design techniques.

1. 類比電路設計 2. 主要開發電源管理IC產品 3. DC-DC, Charger-Pump, LDO, PWM, OP相關電路設計 4. Layout 設計規劃

******以下有兩個不同的職位****** 【Analog IC Designer (DRAM IO) - 竹北】 工作內容 1. IO 設計. 2. DDR RX/TX 設計. 3. DDR 類比. 4. 擁有 DRAM IO 設計經驗，有 DDR5 以上經驗者尤佳。 擅長工具: HSPICE、Python、Laker、ADP、Custom Compiler 1. 學習過電子學、電磁學、電路學、工程數學等基本課程且成績優良。 2. Familiar with Analog Circuit Design 【 Analog IC Designer (Integration) - 竹北】 工作內容 1. Analog IP top integration, including projects of SSD/UFS/eMMC/SD 等。 2. 基本類比電路設計概念，例如 LDO、DCDC、BANDGAP、Voltage Detector 或 PLL、ADC 等。 3. 協助故障樣品分析與 IC 測試。 其他條件 1. 熟悉量產相關知識與經驗者佳。 2. 類比設計經驗超過 3 年。

1. 有USB3.1 TX/RX PHY, CDR, PLL, CTLE, DFE, FFE 的經驗 2. MIPI PHY IP 設計經驗 3. Tapeout experience on 28nm or below 4. 技術指導及專案管理 *第1、2項經驗擇一即可

類比電源IC設計、電路模擬、IC驗證、熟悉佈局規劃及良率提升。 熟悉下列產品的開發及設計: 1.Buck/Boost/Buck-Boost controller/converter 2.LDO/ Power Switch/ OPAMP/ 3.Switching Charger IC 4.High voltage Gate Driver for Motor 5.Low voltage Gate Driver 可依應徵者居住地決定上班地點，分為 1.新北汐止辦公室(台灣科學園區T3館) 2.新竹竹北辦公室(富翼大樓)

1. 具有類比IC設計經驗或相關科系/所畢業 2. Familiar with High-Speed Transceiver Designs, CDR/PLL, ADC/DAC, Delta-Sigma Modultors, DC-DC Converters, or Linear Regulators. 3. USB, DP, HDMI, PCIe or SATA experience is a plus.

Analog IC design (A) Power Management(SMPS, Buck, Boost, LDO, Battery Charger)， (B) Analog Circuit Design

1、Mixed signal IC design and verification 2、Familiar with analog circuit designs including OPAMP/PGA, Analog active filter, ADC, DAC, level shifter, CDR, charge pump, PLL, bandgap reference 3、Co-work with board-level designers to analyze power and signal integrity of PCB. 4、Transmit signal & Noise characterization and analysis 5、Experience Preferred： 3-year work experience in the following fields High-speed serdes TX/RX application Pipeline ADC / SAR ADC 6.、Master or Ph.D. degree in EE

Digital IC design engineer - Familiar with Verilog RTL coding - Familiar with digital design flow (pre-layout simulation, timing constraint, synthesis, post-layout simulation) - Will be working on high speed Serdes IPs - Experience or interest in all-digital PLLs or clock-data recovery circuits is a big plus

【成為円星人】 円星科技由一群專業與充滿熱情的夥伴創立於2011年，為積體電路矽智財設計服務業之新秀，秉持著『成為半導體業最值得信賴之IP公司』的願景，追求永續經營與成長。 誠摯歡迎您成為円星人，加入我們，站上國際舞台！ 一起共同打拚，以精品文化之精神，創造價值，追求卓越！ 【職務簡介】 M31主要業務為向 IC 設計業者和晶圓代工廠授權 IP，此職務為負責高速介面 IP（High Speed Interface IP）, 包含USB. PCIE, MIPI MPHY, CPHY, DPHY等SERDES IP和類比 IP（Analog IP）, 包含ADC, DAC, PLL, PVT sensor的類比IC設計工程師職缺。 【將負責的工作內容】 1. Mixed-Signal & Analog Circuits Design (LDO, OPA, Bandgap, ADC/DAC, etc) 2. High Speed Interface Analog Design (TX, RX, etc) 3. Clocking related：PLL/CDR 【條件與特質】 1. 有類比IC設計工程師相關工作經歷3年以上 2. 電機電子/資訊工程碩士畢業 如果您有以上相關經驗且對此職缺有興趣，歡迎投遞您的履歷！

【工作職責 (Responsibilities)】： ★ Build & innovate on high-speed analog/mixed-signal circuits such as PCIe/DDR/HDMI... transmitter and receiver in deep sub-micron CMOS technology for integration in SoC products. ★ Work with digital team on specification definition ★ Create behavior model for analog/digital evaluation ★ Compliance test for SerDes IP 【符合條件 (Qualifications)】： ★ Familiar with high speed SerDes specification ★ Familiar with IC/SoC design flow ★ Familiar with analog simulation flow ★ Experience SerDes analog blocks design ★ Must be good team player 【必須條件 (Minimum Qualifications)】： ★ Familiar with Audio analog IP design, such as Preamp/DAC/ADC (including SAR and DSM) 【優秀條件 (Preferred Qualifications)】： ★ Familiar with controller integration ★ Familiar with other baseband analog IP design, such as BGAP/LDO/XTAL/PLL, etc. ★ Familiar with ESD, Latch up, I/O ★ Familiar with layout flow

具備1~4之中1種以上的設計經驗。 1. 放大器應用電路; band-gap, op-amp, filter, etc. 2. 電源類比電路: DCDC, LDO, charge-pump, etc. 3. 信號處理電路: SAR ADC, sigma-delta ADC, DAC, etc. 4. 時脈產生電路: PLL, DLL, frequency synthesizer, etc.

【產品說明】 TDDI顯示觸控整合產品 【工作內容】 1. Touch IC設計-類比AFE/ADC電路設計 2. 週邊電路設計 【必要條件】 研究所以上相關課系畢業. 熟悉類比電路設計,混合信號處理, 對類比電路設計充滿熱忱者.

We are looking for a proactive and challenge-driven engineer to join our memory design team. This role primarily focuses on gate-level simulation and functional verification to ensure product quality and alignment with specifications. 【Key Responsibilities】 1. Memory circuit design and verification. 2. Gate-level verilog simulation against to the datasheet. 3. Failure mode analysis. 【Qualifications】 1. Experience in SRAM, DRAM, or other memory product design. 2. Solid understanding of digital circuit design and Verilog HDL. 3. Experience with simulation and debugging, able to work independently. 4. Hands-on experience in failure mode analysis is a plus. 5. Deep RTL design experience is not required, but strong gate-level simulation and verification skills are essential.

1. 從事以下其中一種電路的設計/模擬/除錯工作: a. Touch Sensor, ADC circuit design. b. Charge Pump include flying cap & capless circuit design. c. Memory circuit design. d. High Speed Interface, PLL circuit design. e. Band Gap, LDO circuit design. f. Source & Gate Driver circuit design. 2. 熟悉類比子電路專業知識如OP-AMP的設計。 3. 熟悉工作站與EDA軟體的使⽤。 4. 個性主動積極、樂觀、熱誠。

負責類比電路創新及設計。 專長: 1.專精DC/DC converter 相關電路設計。 2.熟知 DC/DC系統架構，並可使用simplis驗證者佳。