「技術工程類-研發工程師Package designer(記憶體封裝)」的相似工作

This role will lead the Package Design Project with R&D team members and deliver advanced and innovative packaging resolutions to clients. (Flip-Chip) 1.Package RFQ and structure & BOM selection. 2.Direct material evaluation and survey. 3.FA and Reverse Engineering. 4.Package design rule maintain & update. 5.Advance products design / NPI projects development. 6.Research & setup package roadmap / material roadmap.

【Customer Engineering Account Management】 (1)Meet and exceed customer’s expectation of advanced package engineering in terms of quality, cost and delivery (2)Offer industrial leader’s advanced package solutions and services through integration of package and process development 【Project management】 (1)Project phase in schedule arrangement and follow up (2)SWR arrangement ,schedule follow up, negotiation…etc. (3)PKD/PMD creation (PLM) (4)Reliability arrangement 【Team Work】 (1)To optimize resource allocation (2)Enhance teamwork in 360° including customer, supplier and our colleagues (3)Develop self and others

【Customer Engineering Account Management】 (1)Meet and exceed customer’s expectation of advanced package engineering in terms of quality, cost and delivery (2)Offer industrial leader’s advanced package solutions and services through integration of package and process development 【Project management】 (1)Project phase in schedule arrangement and follow up (2)SWR arrangement ,schedule follow up, negotiation…etc. (3)PKD/PMD creation (PLM) (4)Reliability arrangement 【Team Work】 (1)To optimize resource allocation (2)Enhance teamwork in 360° including customer, supplier and our colleagues (3)Develop self and others 1. 薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘； 2. 資深人員薪資另議。

1. Electrical package warpage and component stress simulation and analysis (FBGA, FCBGA, FOWLP, FOPLP, 3D IC CIS CSP, TSOP, QFN, QFP......). 2. Electrical package thermal simulation and analysis (JESD51 standard). 3. Electrical package mold flow and wire sweep simulation and analysis. 4. Board level drop test experiment and analysis (JESD22-B111 standard). 5. Warpage measurement by shadow moire (JESD22-B112 standard). 6. Database establishment and utility development. 7. New simulation capability development. ＊實際薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 ＊資深人員薪資另議。

Main work content: 1. Fan-out structure/ material/ process flow design 2. Fan-out RDL layout drawing review 3. Packaging direct material survey, evaluation, improvement & qualification 4. Design rule establishment & maintenance 5. Package failure analysis 6. Coordinate & lead project in design portion & co-work with process, integration & simulation teams 7. Direct communication with customers * 薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 * 資深人員薪資另議。

負責ATE測試程式開發及測試資料分析。 需求條件： 1.有電子學電路學基礎觀念。 2.熟悉 C / C++ 程式語言。 3.熟悉Windows / Linux 操作環境。 4.有ATE (Chroma/V50/Advantest...etc)測試程式開發經驗者佳。 ＊實際薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 ＊資深人員薪資另議。

1. 封裝固晶(Die-Bond)製程作業。 2. 固晶(Die-Bond)相關設備保養維護、異常排除、效能改善、改機調機。 3. 封裝固晶(Die-Bond)製程改善與開發。 【本職缺可透過104應徵，也歡迎直接至穩懋官方網站投遞，增加履歷曝光度】請至穩懋官方網站投遞個人履歷表，此職缺履歷登錄網址：https://www.winfoundry.com/WinTalentPool/JobRequirement/Edit/1047

This position is responsible for resolving customer quality related issues and acting to resolve quality problems.This team will act as a key point of communication with customers on subjects as examples but not limited to customer complaints, customer requests. If have over 1 years quality related experience will be preferred. 【Key Responsibilities】 1.Customer claim and CAR disposition & follow-up. 2.Customer audit arrangement and finding follow-up. 3.Regular audit report preparation and meeting with customer. 4.Interface between PTI & customer on quality issue. 5.Strengthen customer relationship. 6.Satisfy customer on quality service. 【Problem Solving】 Recognizes and solves typical problems that can occur in own work area; evaluates and selects solutions from established options 【Interpersonal Skills】 Uses communication skills to exchange information; fluent English skill is perfect. TOEIC at least 600.

※具封裝前段、後段第一線製程經驗者優先面談 1.新產品製程開發及實驗計畫進行 2.新產品規格建立 3.新製程的資料建立 4.新產品樣本製作並通過量產認證 1. New product process development and experimental planning are carried out 2. New product specifications establishment 3. Data establishment of new processes 4. New product sample production and mass production certification ＊實際薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 ＊資深人員薪資另議。

1. 先進封裝製程(MEOL/BEOL)優化、產品良率提升及異常產品分析 2. 新產品製程開發及實驗計畫進行 ＊具備Flip Chip Bond/Die Bond/CoWoS/ HBM/ CIS經驗者佳 ＊實際薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 ＊資深人員薪資另議。

執行晶圓級封裝AOI製程專案開發、製程整合、良率改善及缺陷分析 詳細職責如下： 1. Maintaining process flow and recipes on MES, and tools and recipes on RMS. 2. Handling abnormal cases on MES and conducting daily yield analysis. 3. Supporting New Product Introduction (NPI) and Design of Experiments (DOE), and preparing summary reports. 4. Developing and implementing process improvements to enhance yield and productivity. 5. Conducting root cause analysis for defects and collaborating with cross-functional teams to resolve process-related issues. 此職務需日夜輪班 (做二休二，約每三個月日夜輪調一次) 日班上班時間：07:20~19:30 (中間休息2小時10分，實際工時10小時) 夜班上班時間：19:20~07:30 (中間休息2小時10分，實際工時10小時) * 熟悉半導體晶圓級製程或具備跨部門溝通經驗尤佳。 ＊實際薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 ＊資深人員薪資另議。 　 　 　 　

1.封裝後段製程良率提升 2.制訂製造程序與產品標準 3.評估製程專案計劃，訂出最適化的製造流程 4.負責新產品製程的導入、檢測，使新產品能夠穩定生產且符合相關標準 具封裝後段(Molding、Marking、植球、切割、AOI...)製程經驗者優先面試。 歡迎理工科系之應屆畢業生、兵役屆退者、半導體相關產業製程經驗一年以上人士加入。 ＊實際薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 ＊資深人員薪資另議。

1. 先進封裝後段製程(BEOL)優化、產品良率提升及異常產品分析 2. 新產品製程開發及實驗計畫進行 ＊具備Flip Chip Bond/Die Boning/CoWoS經驗者佳 ＊實際薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 ＊資深人員薪資另議。

1.Communicate with customer/partner and subcontractor to define the package design requirements, or specifications. 2.Propose the package size, structure according to requirements and specifications from customer. 3.Design the package and optimize to meet product specifications, coworking with related layout, electrical and thermal engineering teams. 4.Prototyping document preparation 5.Link with suppliers and follow up the development trend.

1. Customer Engineering Account Management -Meet and exceed customer's expectation of advanced package engineering in teams oof quality,cost and delivery. -Offer industrial leader's advanced package solutions and services through integration of package and process development. 2.Team work -To optimize resource allocation. -Enhance teamwork in 360。 including customer,supplier and our colleagues. -Develop self and others. 3. New product introduction 4. Implement and coordinate NPI plans 5. Process integration data analysis and reporting 6. Abnormal analysis and experimental DOE Plan 7. New materials and process evaluation plan ＊實際薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 ＊資深人員薪資另議。 　 　 　 　

1. Flip chip package substrate design, and 2.5D experience is a plus. 2. Provide optimization design proposal.  3. Co-work closely with substrate suppliers/SIPI team directly.  4. Design rule maintenance.

1.製程整合數據分析 2.製程程式、參數的設定及維護 3.產品品質、良率提升及控管 4.異常產品處置、分析 * 此職務須配合公司二二輪值日、夜班，輪班另有額外津貼。 * 歡迎理工科系新鮮人應徵挑戰 ＊實際薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 ＊資深人員薪資另議。 　 　 　 　

**Job Duties & Responsibilities** • Process flow design for CIS / HBM / FOPLP NPI products. • Coordinator for issue analysis and progress follow-up with internal cross-functional teams. • Regular meetings with customer and end customer to provide issue explanation and root cause analysis. • Serve as the interface between the PE team and customer for engineering-related discussions; work with customers and lead internal teams for all NPI phase-related activities such as setup reports, FACA, and PFMEA. • Lead new process development, machine surveys, and material evaluations in collaboration with internal cross-functional teams and vendors. **Candidate Requirements** • Passion for learning new processes across different fields. **Preferred Qualifications** • Fluent in English speaking (TOEIC 650+). • 2+ years of experience in customer interaction. • 2+ years of experience in project handling, such as CIP, cost reduction, or yield improvement. • Familiar with wafer-level assembly processes (CIS / HBM / FOPLP). * 熟悉半導體MEOL/BEOL各製程或具備跨部門溝通經驗尤佳。 ＊實際薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 ＊資深人員薪資另議。 　 　 　 　

1.整合模組品質相關改善報告，定期追蹤狀況與協調相關單位以達成客戶要求。 2.整合客戶稽核與參訪的相關內容，如產品生產管理方式、各項製程介紹、品質管理手法、及其他相關客戶稽核要求事項，並於稽核後之改善專案管理。 3.整合模組生產相關國際標準化組織認證，持續維護相關內容，並執行後續查檢措施與內部稽核活動。 4.整合模組發生之人為品質異常案例，依其分析工程單位與生產之品質異常案例的真因與改善措施，分別教授工程單位與產線單位之同仁之不同領域應具備之品質注意事項，並累積過往之案件持續追蹤並定期重新對同仁上課。 5.需協助客戶稽核相關活動與客戶要求之所有窗口必備之專業技術知識，將客戶指定之課程教授模組營運之工程師與產線主管，並提供訓練之成果與分析給客戶。 6.規劃模組營運所有含工程師產線主任等教育訓練課程含新進同仁、在職人員基礎課程、各層級職稱之對應專業訓練。 7.建構並管理模組營運教育訓練流程與系統架構，導入以資訊系統之模式，分析模組營運各單位人力資源，建立直接與間接人員生產力指標與技術力指標並持續改善。 8.除實體教師授課課程，將新人培訓課程、專業工程師課程、認證培訓課程等建構為E-Learning & Testing與Video Training及體驗課程，減少講師成本並加速教育訓練效率。 9.模組教育訓練辦法制定與修改與各項訓練教材之製作與收集，人員授證作業與紀錄建檔分析，授證試卷之制定與修改 ＊實際薪資依學歷、科系、相關工作經驗、專業證照、特殊專長與語言能力綜合核敘。 ＊資深人員薪資另議。

1.參與半導體製造前段製程中蝕刻液（Etchant）的開發與優化。 2.改良並調整蝕刻液的化學組成。 3.計畫並執行實驗，收集與分析實驗數據以進行組成配方的優化調整。 4.與台灣與日本的研發團隊討論實驗結果與改良方向。 ------------------------------------------------------------------- 1.半導体製造プロセス前工程のエッチャント開発業務。 2.エッチャント組成の改善、チューニング。 3.実験を計画して実行し、取得したデータをまとめ、組成改善のチューニングを行う。 4.実験結果や改良方針について、台湾/日本のRDチームと議論を行う。