【Job Description】
1. Working directly with HW/Layout design teams to evaluate design tradeoffs and optimize design performance/risk/cost/manufacturability.
2. Driving next generation compliance specification studies
3. Perform signal integrity validation of Server/Storage/Switch products
4. Analysis of multi-gigabit serial links and DDR4 and their compliance to standards
5. Driving physical measurements to collect data for design validation and simulation correlations
6. Driving validation flow enhancements and automation - improving performance and efficiency
【Other Qualifications】
Self-motivation, Strong teamwork, Strong communication skills and Out of the box thinking with the strong desire to innovate are essential.
1 5G Small Cell/O-RAN product development:
a). Product Spec definition/Review
b). Product Solution Evaluation: Architecture assessment, component survey, EVB verification
c). ME/Thermal solutions Analysis & Verification
d). Baseband Circuit design (power, digital and RF integration), including Schematic drawing, BOM creation, layout and test plan
2. MFG supporting from NPI to MP stages
3. HW quality verification (Compliance, SI/PI, thermal, reliability)
4. System quality verification with SW/Q
5. Product trouble shooting supporting for NPI, MFG and Customer site failure
6. Customer support, include RFQ response, field try or on-site support, failure analysis
7. Optimization for sustained products
8. Resource coordination and Schedule control for on-hand project
Purpose of this Position
深入研究高速訊號,在高速硬體電路Signal Integrity上提供最佳設計且確保生產品質
Major Areas of Responsibility
專案研發
- Perform high speed signal integrity simulation including 10G/40G、25G/100G、PCIE、SATA、DP、USB、DDR3/DDR4/DDR5.
- Perform pre-layout, layout constraint, and post-layout simulation processes.
- PCB stackup design and layout review for high speed signal and PDN.
- Build component models to ensure the correlation between SI/PI simulation and measurement.
- Solid SI experience in resolving technical issues and performing detailed analysis.
團隊合作
- Collaborating with EE teams to refine high-speed signal performance.
- Collaborate with the layout engineer to provide clear layout guidelines and enhance footprint optimization.
(1) Google Android Auto, AAOS, Fast Pair certification testing and status report
(2) Well control in schedule, testers scheduling.
(3) Identify risk item and track mitigation/ contingency plan timely.
(4) Track failure issues, as the coordinator working between customers and testing team
(5) Willing to do hands-on testing and multi-work at the same time.
(6) Be with leadership, responsible, detailed , organized and strong stress resistance
(7) Familiar with Microsoft Office , python, Google Drive
(8) Familiar with Android OS, Android Auto, Fastpair is preferred.
(9) Valid driving license is mandatory.
(10) Total around 2-4 months travel a year