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「Mixed-signal 類比IC設計工程師」的相似工作

聯發科技集團_達發科技股份有限公司
共500筆
10/17
台北市內湖區經歷不拘碩士以上
Responsible for developing custom IP for SoC design from specification definition, circuit design to testing, and familiar with component and process characteristics.
應徵
10/20
新竹市2年以上碩士以上
Digital IC design engineer - Familiar with Verilog RTL coding - Familiar with digital design flow (pre-layout simulation, timing constraint, synthesis, post-layout simulation) - Will be working on high speed Serdes IPs - Experience or interest in all-digital PLLs or clock-data recovery circuits is a big plus
應徵
10/20
新竹市經歷不拘碩士以上
1. 觸控IC、TDDI或指紋辨識 IC 開發經驗 2. ADC或sensor IP 開發經驗 3. TFT-LCD或OLED Display driver IC 開發經驗 4. Charge pump、LDO、Source driver、Gate driver、High speed interface、OSC、BGR 相關開發經驗 5. 工作地點:【台南、新竹、台北】 以上其中任何一項相關者佳。
應徵
10/20
新竹縣竹北市1年以上碩士以上
Analog IC design (A) Power Management(SMPS, Buck, Boost, LDO, Battery Charger), (B) Analog Circuit Design
應徵
10/20
新竹市經歷不拘碩士以上
Job description Join our innovative team specializing in cutting-edge embedded memory solutions. We are seeking Analog Circuit Engineers to play a key role in the design and development of high-performance embedded DRAM and associated peripheral circuits. In this position, you will be responsible for the complete cycle of DRAM circuit design and simulation verification. Your tasks will involve developing novel circuit topologies, transistor-level design, optimizing performance metrics, and ensuring robust functionality through extensive simulations using industry-standard EDA tools. Required qualifications include a strong technical background in Electrical Engineering, Electronics Engineering, Computer Engineering, Physics, or a closely related field. Candidates must possess demonstrated, significant experience in DRAM circuit design and comprehensive simulation verification methodologies. Ideally, candidates will have proven design experience in specific DRAM-related circuit blocks, including but not limited to: Row and Column Decoder circuits Control path logic DC-DC converters, Charge Pumps, and Bandgap References Delay Locked Loops (DLLs) and Phase Locked Loops (PLLs) Negative voltage generators (NVG) and other critical peripheral circuits This is an excellent opportunity to contribute to state-of-the-art embedded memory designs in a dynamic, collaborative environment. If you are a skilled analog designer passionate about solving complex challenges in DRAM circuitry, we encourage you to apply and help shape the future of embedded memory technology.
應徵
10/23
新竹縣竹北市3年以上碩士以上
【成為円星人】 円星科技由一群專業與充滿熱情的夥伴創立於2011年,為積體電路矽智財設計服務業之新秀,秉持著『成為半導體業最值得信賴之IP公司』的願景,追求永續經營與成長。 誠摯歡迎您成為円星人,加入我們,站上國際舞台! 一起共同打拚,以精品文化之精神,創造價值,追求卓越! 【職務簡介】 M31主要業務為向 IC 設計業者和晶圓代工廠授權 IP,此職務為負責高速介面 IP(High Speed Interface IP), 包含USB. PCIE, MIPI MPHY, CPHY, DPHY等SERDES IP和類比 IP(Analog IP), 包含ADC, DAC, PLL, PVT sensor的類比IC設計工程師職缺。 【將負責的工作內容】 1. Mixed-Signal & Analog Circuits Design (LDO, OPA, Bandgap, ADC/DAC, etc) 2. High Speed Interface Analog Design (TX, RX, etc) 3. Clocking related:PLL/CDR 【條件與特質】 1. 有類比IC設計工程師相關工作經歷3年以上 2. 電機電子/資訊工程碩士畢業 如果您有以上相關經驗且對此職缺有興趣,歡迎投遞您的履歷!
應徵
10/09
新北市新店區經歷不拘碩士以上
1. MSEE is required. 2. Solid background in analog integrated circuits. 3. Knowledge of high speed serial link technology. 4. Familiar with SerDes PHY (USB, PCIE Express, SATA and Thunderbolt) and building block (DFE, CTLE, CDR, PLL and FFE transmitter). 5. Experience in design and simulation high speed transceiver is a plus.
應徵
10/20
新竹市經歷不拘碩士以上
Job desicription: Our Design Team specializes in the challenging field of Non-Volatile Memory (NVM) IC circuit design. We are actively seeking an experienced Analog Circuit Design Engineer to contribute to our cutting-edge developments in embedded NVM solutions and surrounding circuitry. As a key member of our team, you will be responsible for the design, verification, and debugging of essential analog building blocks like Bandgap references, LDOs, and Charge Pumps. A significant part of your role will involve designing critical memory peripheral circuits for NVM IP and test chips, including Array interfaces, Decoding logic, and Sense Amplifiers. Your responsibilities will span the design lifecycle, from contributing to IP specifications and core circuit design to ensuring performance through layout optimization and comprehensive corner simulations of NVM IPs. We are looking for candidates with proven expertise in analog circuit design, ideally with prior experience in embedded memory or NVM technologies. If you are an experienced analog designer eager to tackle complex challenges in non-volatile memory, we encourage you to apply and help shape the future of memory technology.
應徵
10/20
新竹市3年以上碩士以上
1. Main responsibility is to design analog IPs in MCU such as adc/dac, pll, osc, por, ldo 2. 具備DC-DC Converter, Buck相關電路設計 2. Responsible for analog IP design, verification plan, test plan, document 3. Communicate with system, layout and digital engineer to ensure high quality --------------------------------------------------------------------------------------- 雅特力科技創立於2016年,為智原科技子公司。 【Artery雅特力】即將在台上市的IC設計公司,主要產品為32bit ARM core base MCU 公司網址:https://www.arterychip.com 關於雅特力:https://www.104.com.tw/company/1a2x6blojm
應徵
10/23
新竹市經歷不拘碩士
1.類比/電源管理 IC電路設計. 2.參與LCD PMIC, LED Driver專案. 3.DC-DC, Charger-Pump, LDO, OP, DAC,ADC相關電路設計
應徵
10/16
新竹市經歷不拘碩士以上
(1)Circuit Design. (2)Circuit Simulation. (3)Layout Verification. (4)Silicon verification and debugging. (5)Transfer design to production.
應徵
10/23
新竹縣竹北市3年以上碩士以上
【成為円星人】 円星科技由一群專業與充滿熱情的夥伴創立於2011年,為積體電路矽智財設計服務業之新秀,秉持著『成為半導體業最值得信賴之IP公司』的願景,追求永續經營與成長。 誠摯歡迎您成為円星人,加入我們,站上國際舞台! 一起共同打拚,以精品文化之精神,創造價值,追求卓越! 【職務簡介】 M31主要業務為向 IC 設計業者和晶圓代工廠授權 IP,此職務為負責IO電路設計相關之職缺。 【將負責的工作內容】 1. ESD/Latch-up防護設計與驗證 2. I/O電路設計 (Fail safe, Tolerant, Cascade) 3. 高速IO 電路設計 (DDR, ONFI, SDIO) 4. LDO/POR/VDT 電路設計 5. XTAL oscillator 電路設計 6. Analog circuit, IO, PISI, ESD Basic/Advanced Knowledge 【條件與特質】 1. Analog circuit, IO circuit design and simulation 2. 擅長工具-SPICE, Virtuoso 3. 有IO 相關工作經歷3年以上, Analog/IO Basic/Advanced Knowledge 如果您有以上相關經驗且對此職缺有興趣,歡迎投遞您的履歷!
應徵
10/23
新竹市經歷不拘碩士
We are currently seeking a talented Analog Design Engineer to join our team and participate in the development of Power IC for High-Performance Computing (HPC). The role will primarily involve working on the design and development of the following components: 1. PMIC (Power Management Integrated Circuit) 2. Multiphase VR (Voltage Regulator) 3. Buck/Boost/Buck-Boost Converters 4. eFuse (Electronic Fuse)
應徵
10/20
台北市內湖區經歷不拘碩士
1. High speed ADC/DAC design(具備Ethernet PHY RX/TX 設計經驗佳) 2. ADC/DAC IP test 3. Familiar with behavior model simulation
應徵
10/20
新竹市2年以上碩士以上
【產品線描述】 高速傳輸 (USB4.0、DisplayPort、PCIe) 電路設計 (High Speed Serdes, Rx/Tx/Clocking, CTLE, DFE, CDR, PLL) 【工作說明】 高速介面、混合訊號類比電路設計 工作內容包含下列項目: 1. CDR architecture design (1/N-rate, DLL-based, PLL-based, PI-based)、DeMux 2. Adaptive CTLE/DFE 3. High speed ADC / Time-Interleaved ADC design 4. RF circuit related / EM related 5. PLL circuit/architecture design 6. High speed transmitter with FFE、P2S 7. High performance oscillator design (Ring/LC) 8. Impedance matching design 9. Circuit calibration techniques & flow 10. SerDes system behavior modeling & analysis 11. Chip Integration & Verification 【必要條件】 1. Master of Science / Above degree in Electrical Engineering, strong mixed-signal design concept. 2. 2-years above experience. 3. Familiar with design and simulation tools (Cadence's design environment, Circuit simulation : Spectre, HSpice, Finesim). 4. Strong debugging and analytical skills. 5. Clear communication skills and team work ability are necessary. 備註:上班地點為「台北」或「竹北」或「竹科」
應徵
10/20
新竹縣竹北市經歷不拘碩士以上
5G手機,AR,VR 顯示技術,AI 人機介面的3D觸控顯示技術,整合生物特徵的全面屏顯示技術。 【工作說明】 1. 高速介面的電路評估,規劃,設計與驗證. 2. 低功耗,高速的SRAM電路評估,規劃,設計與驗證. 3. 高精度,低溫漂的時脈電路評估規劃,設計與驗證. 4. 低功耗,快速嚮應的regulator 電路評估,規劃,設計與驗證. 5. 非揮發性記憶體電路評估,規劃,設計與驗證. 6. 高效率 DC/DC circuit design評估,規劃,設計與驗證. 7. 低功耗,低偏移的OPAMP電路評估,規劃,設計與驗證. 8. 低雜訊的DAC/ADC電路評估,規劃,設計與驗證. 【必要條件】 研究所以上相關科系畢業 熟悉類比電路設計,混合信號處理, 對類比電路設計充滿熱忱者
應徵
10/20
台北市內湖區8年以上碩士以上
※實際任用職稱依個人相關經歷敘薪。 1. 熟悉Display Driver IC 原理. 2. 可獨立完成Charge Pump design. 3. 可獨立完成Band Gap, Regulators , LDO circuit design. 4. 熟悉類比電子電路專業知識如OP-AMP的設計 5 .個性主動積極、熱誠 、樂觀 . 6. 8~10年經驗 7. mipi. lvds frontend 設計與 debug 經驗尤佳
應徵
10/15
新竹縣竹北市經歷不拘碩士以上
【產品範疇】 1.Touch panel controller 2.TDDI 【工作內容】 1.Analog front-end design 2.ADC design 3.Switched-capacitor circuit design 4.負責layout floorplan規劃,與layout工程師合作完成相關驗證 【需求條件】 1.Device physics knowledge applied to analog IC design 2.Familiar with analog IC design flow 3.Familiar with Hspice or Spectre
應徵
10/22
新竹縣竹北市3年以上碩士以上
1. 顯示驅動IC 類比電路設計 2. 電源管理IC 類比電路設計 3. 高速介面 類比電路設計 4. 觸控類比前端感測類比電路設計
應徵
10/21
台北市內湖區經歷不拘碩士以上
• 進行類比/混合訊號電路模擬(Spice, Spectre...) • 指導及協助Layout規劃佈局 • 撰寫設計、測試規格文件與書寫模擬報告 • 與測試工程師合作測試、驗證、Debug IC • Perform analog/mixed-signal circuit simulations (Spice, Spectre, etc.) • Provide guidance and assistance with layout planning • Write design and test specification documents and simulation reports • Collaborate with test engineers to test, verify, and debug ICs
應徵