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英屬開曼群島商世芯股份有限公司台灣分公司
共503筆
精選
科爾迪股份有限公司電腦軟體服務業
台北市松山區5年以上大學以上
・協助研發軟體新技術與新工具 ・金融系統開發 ・負責軟體之分析、設計以及程式撰寫 ・進行軟體之測試與修改
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動力安全資訊股份有限公司電腦系統整合服務業
台北市內湖區經歷不拘大學
想打造能支撐企業研發與部署的自動化平台? 加入我們的雲端架構團隊,從 API 設計到 CI/CD 整合, 讓你的程式設計與系統整合能力真正落地。 【你要做什麼|What You’ll Do】 ● 開發自動化平台後端服務,包含 API 設計、資料流處理、任務排程模組。 ● 使用 FastAPI 建立 RESTful API,整合前端與 CI/CD 工具(GitLab CI、Jenkins)。 ● 撰寫與維護 資料庫模型,並以 ORM(SQLAlchemy) 封裝業務邏輯。 ● 建立 自動化測試腳本,維護 API 文件與技術規格說明。 ● 與平台、DevOps、前端團隊協作,確保系統穩定性與可擴充性。 【我們希望你具備|What We’re Looking For】 ● 大學或碩士學歷,資訊工程、資管或相關科系。 ● 熟悉 Python 語言 與 FastAPI/Flask 等 Web Framework。 ● 熟悉 RESTful API 設計原則與實作。 ● 熟悉 Linux 環境操作與自動化腳本(Bash/PowerShell/Python)。 ● 具資料庫設計與開發經驗(SQL Server),了解 SQL 語法與效能優化。 ● 熟悉 Git 操作與 CI/CD 基礎概念。 ● 具備良好的 問題分析與團隊協作能力。 【加分項目|Nice to Have】 ● 熟悉 SQLAlchemy/Alembic 等 ORM 與 Migration 工具。 ● 具 Docker/Kubernetes 實務操作經驗。 ● 理解 Jenkins/GitLab CI/CD Pipeline 建置流程。 ● 熟悉 IaC 工具(Ansible/Terraform)。 ● 有自動化平台或 DevOps 架構建置經驗。 【你會喜歡這份工作的理由|Why You’ll Love It】 ● 系統級挑戰:參與自動化平台核心開發,從 API 到基礎架構全面實作。 ● 技術深度成長:橫跨 Backend、CI/CD、Cloud Infra 的整合專案。 ● 持續學習文化:內部技術社群、原廠課程與證照補助。 ● 跨團隊合作:與 DevOps、資安、前端團隊共同打造自動化生態系。
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宏穩投資股份有限公司其他投資理財相關業
台北市信義區3年以上大學
【工作內容】 • 參與證券交易相關系統之開發與維護(C# / .NET / C++) • 與交易員合作開發與維運交易策略程式 • 負責功能測試、效能測試、系統穩定性確認 • 協助主管與工程團隊完成日常技術任務 【我們希望你具備】 • 3 年以上軟體開發經驗 • 熟悉 C# or C++ • 對金融或交易系統有興趣 • 能獨立負責任務,同時具備團隊合作能力 • 追求卓越,注重細節,對成果負責。 【加分項目】 • 熟悉股票/期貨的交易流程 • 具股票/期貨策略程式開發經驗(如:接收券商行情/介接券商API下單...等)
10/27
台北市內湖區經歷不拘大學
1. 辦理股務相關作業及股務代理機構溝通窗口 2. 公開資訊觀測站重大訊息(中英文版)及各項公告申報 3. 協助安排董事會、功能性委員會、股東會及相關作業 4. 協助公司治理評鑑及相關作業執行 5. 永續資訊揭露、維護及優化: 彙編年報及股東會議事資料、永續報告書編製及查證作業 6. 其他主管交辦工作事項 1. Handle Employee stock option plan and stock affairs-related operations. 2. File material information and various announcements on the Market Observation Post System (MOPS). 3. Arrange and assist with shareholders’ meetings and other related meetings and tasks. 4. Assist in the implementation of corporate governance evaluations. 5. Disclose, maintain, and enhance sustainability information. 6. Support departmental operations and handle assignments from supervisors.
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10/27
新竹縣竹北市5年以上大學
• Co-work with package design team to complete a substrate layout that will meet the design objectives for performance, cost and quality. • Co-work with SOC team to complete Bump floorplan and RDL routing. • Power mesh/power density flow development and related flow development and enhancement. • Provide power plan result for PR team. • Chip IR signoff : provide the result and solution to APR & package team • Chip level PEM/SEM simulation and fixing plan providing. • SIR/DIR/PEM/SEM result data review and verification. • Familiar with Voltus / Redhawk experience is required.
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10/27
台北市內湖區經歷不拘大學
負責 3D-IC Interposer 與類比 IP 佈局設計 (Virtuoso / Allegro),確保電性與實體規格,優化設計流程。 熟悉 Layout tools、Foundry PDK為佳。
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10/27
台北市內湖區5年以上大學
-Working with IC design team on IC bring up and electrical verifications. -Develop evaluation hardware platforms, reference schematic and PCB board verification. -BOM cost and competition analysis. -Technical support for customer projects along with AE/DE/SW/FW/QC engineers.
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10/27
台北市內湖區經歷不拘大學
1. Knowledgeable in power analysis and IR/EM methodologies, with hands-on experience using Ptpx, Redhawk, or Voltus for power and IREM evaluation. 2. Familiar with the integrated circuit (IC) design flow, capable of performing design, optimization, and verification using tools such as ICC2 or INNOVUS. 3. Experience in developing automation scripts using Python, Perl, TCL, or Shell is a strong plus. 4. Experienced in IO/IP planning, including bump/PAD placement and RDL routing is a plus. 5. Experienced in fundamental circuit structures (e.g., standard cells, IO), with the ability to simulate basic circuits using Hspice or Spectre is a plus.
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10/27
台北市內湖區10年以上大學
1. Plan and execute internal audit assignments in accordance with the annual audit plan, and issue related reports and improvement recommendations. 2. Conduct self-assessments of internal control systems for all departments and subsidiaries. 3. Evaluate the design and operating effectiveness of the internal control system and optimize internal control procedures. 4. Track the progress of audit findings remediation and regularly report on corrective action status. 5. Perform special audits and investigations on significant irregularities. 6. Submit audit reports to the Audit Committee, Board of Directors. 7. Coordinate and communicate to resolve interdepartmental process issues and drive process improvements. 8. Support legal and regulatory compliance and assist in the development and implementation of audit-related policies. 9. Complete tasks assigned by supervisors.
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10/27
新竹縣竹北市5年以上大學
1. Be responsible for setting up and tuning the Linux system corresponding to EDA platform. 2. Be responsible for the daily maintenance of the servers, network equipment and related application components to ensure the reliable operation of the system. 3. Troubleshoot hardware and software errors by running diagnostics, documenting problems and resolutions, prioritizing problems, and assessing impact of issues. 4. Be responsible for collecting data from servers and systems and able to provide various reports based on this data to display operational status.
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10/27
瑞利光智能股份有限公司其他半導體相關業
新竹市2年以上大學以上
你將加入的團隊: 我們是一個重視 協作與知識分享 的團隊,鼓勵開放溝通與跨部門合作。你將有機會參與多樣化的專案,並在導師與資深工程師的指導下快速成長。我們提供技術培訓、職涯發展規劃,以及參與國際合作的機會,幫助你在職涯中持續進步。 【職位描述】 我們正在尋找一位細心且積極學習的 Layout 工程師 加入我們的團隊。此職位將參與 IC 及封裝設計的物理佈局工作,並與設計、製程及驗證團隊密切合作,確保設計品質與時程。 這是一個絕佳的機會,讓你在專業領域中持續成長,並與經驗豐富的工程師一同合作,學習最先進的技術與流程。 【工作內容】 1.協助執行 IC 佈局設計,包括 floorplanning、placement、routing 及驗證。 2.參與 Package Layout 設計,並與封裝工程師合作完成設計需求。 3.使用 Allegro 等工具進行封裝佈局設計與修改。 4.執行 DRC、LVS、ERC 等設計檢查,確保設計符合規範。 5.支援 Tape-out 相關流程與文件準備。 6.撰寫與維護設計流程文件與佈局規範。 7.積極參與團隊討論與技術交流,分享學習成果並協助他人。 【基本資格】 • 電機、電子、資訊工程或相關科系學士學位。 • 具備 2 年以上 Package Layout 設計經驗。 • 熟悉 Allegro 或其他封裝佈局工具。 • 具備基本 IC 佈局知識,並願意學習 Analog/Digital Layout 技術。 • 良好的溝通能力與團隊合作精神。 • 細心負責,能在時程壓力下完成工作。
應徵
10/27
台北市內湖區經歷不拘碩士以上
Responsible for developing custom IP for SoC design from specification definition, circuit design to testing, and familiar with component and process characteristics.
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10/29
台北市中正區3年以上大學以上
1. 與研發團隊合作,支援 VCSEL 元件在研發計畫中的各項特性量測工作。從產品初期構想到量產,與 VCSEL 設計工程師及技術專案經理(PM)協調合作 2. 負責晶圓廠製作完成的 VCSEL 元件的特性量測。測試項目通常包括 DC LIV、光譜、熱阻、光束特性(遠場與近場)、RF S21/S11、RIN、眼圖、BERT、TDECQ 等。進行資料分析,並與研發設計團隊合作,將輸入的設計參數與輸出的測試結果進行對應與分析 3. 管理測試實驗室,包括儀器維護與定期校正,並針對新研發需求(如更高速或不同波長)採購新夾具與零組件。和R&D team 共同負責升級或建立新的研發測試平台,包括所有硬體與軟體的安裝設定。協調規格制定、調查與採購新測試設備,以支援未來研發計畫 4. 在研發計畫中,協調晶圓探針測試(LIV、S21/S11、RIN、近遠場型),制定測試計畫 並提供詳細指令給晶圓廠,包括晶圓測試位址、測試條件及測試各種參數。處理晶圓廠測試資料,並整合到我們公司的資料庫中,以便與設計團隊進行進一步分析 5. 加速老化或可靠度測試。包括雷射失效分析、為測試或客戶樣品進行 chip-on-carrier 組裝、在現場支援特殊測試服務等 6. 向外部客戶與內部團隊提供量測結果更新。彙整資料並以電子郵件更新、對客戶的簡 報、內部新產品導入(NPI)會議,以及正式的性能驗證報告等形式呈現 7. 視過往經驗,可能需要與其他技術相關人員(R&D team)共同協調測試工作
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10/23
新竹縣竹北市3年以上大學
Role Summary/Purpose: Hardware design engineer will closely work with worldwide engineers to perform engineering works for hardware testing solution of next generation semiconductor devices. The work includes requirement analysis, feasibility study, solution evaluation, task planning, project management, design execution, quality control and verification. We are working on cutting edge requirement and future technology. Responsibilities: • Provide global semiconductor interface test hardware solutions of next generation semiconductor devices for world-wide customers • Provide chip test interface HW solution engineering to compare pros and cons of different approaches and recommend best option to customers considering both performance, lead time, cost • Responsible for Testing circuits Design and super high layers PCB design for high complexity ATE device interface board correspond to various device testing, eg. Mobile application processor, High performance computer, AI, RF etc. • Responsible for scheme selection of a SUBSTRATE/MLO design in wafer testing, research for low Cost of Test scheme (considering TDE, Skip DIE, substrate stack-up) • Responsible for power integrity (PI) and signal integrity (SI) simulation at board level or system level, frequency domain or time domain to ensure HW product performance at design stage • Implement complex mechanical design/simulation, cable design, thermal evaluation by collaborating with PCB design to achieve premium quality in hardware solution according to customer device testing ultimate challenges. • Responsible for global end to end hardware project management to ensure best quality and on time delivery -Device testing requirement assessment and Feasibility study -Risk analysis and mitigation planning -Schedule planning and project management -Design execution -Regular review with global internal and external customers -Quality Control and Verification • Work closely with Global supply chain, provide solution to solve manufacture (DFM), assembly (DFA) challenges, ensure hardware products on time delivery and very high first pass rate • New technology research, new products, new materials evaluation for next generation device testing • Deliver hardware design training and seminars to customers
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10/28
台北市信義區10年以上大學
About Nogle Group Nogle Group Services is where financial innovation meets global impact. Over a decade ago, we embarked on a transformative journey that has established us as a dynamic player in the fintech sector. As a venture studio, we are dedicated to nurturing and growing innovative businesses that are redefining the future of finance. Our unique approach allows our team members to collaborate with a diverse array of entities and stakeholders on a global scale, making every day at Nogle an exciting and enriching experience. About the Role As the IT Infrastructure & Operation Lead, you will take ownership of the company’s core IT infrastructure, cloud platforms, enterprise systems, and cybersecurity operations. In this role, you will work closely with the COO as a strategic partner, helping to shape the company’s growth and operational efficiency. This is not a managerial position, but rather a high-impact Individual Contributor (IC) role. You will drive IT operations end-to-end from daily service delivery and vendor management to long-term infrastructure planning and security strategy, ensuring scalability, compliance, and business continuity. Key Responsibilities Infrastructure & Network Management - Design, deploy, and maintain network infrastructure (LAN/WAN, firewalls, VPN, wireless networks, etc.). - Monitor and optimize system and network performance, troubleshoot issues, and ensure high availability. - Manage cloud environments (e.g., AWS, Azure, GCP) with a focus on scalability and cost efficiency. Cybersecurity & Compliance - Develop and enforce IT security policies, including identity access management, endpoint protection, and data encryption. - Conduct risk assessments, vulnerability testing, and incident response. System Administration - Manage enterprise systems such as Active Directory, Microsoft 365, Google Workspace, collaboration tools, and virtualization platforms. - Maintain backup solutions, disaster recovery plans, and business continuity strategies. Project & Vendor Management - Support IT-related projects, including domain management, GWS mailbox administration, and website management. - Assist in evaluating technical solutions, vendor negotiations, and contract management. IT Operations & Help Desk - Provide technical support for Windows and macOS environments, handling user incidents and service requests. - Establish and implement IT service management (ITSM) processes, including incident management, problem management and change management.
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10/28
台北市松山區5年以上學歷不拘
【Please kindly provide your English resume. Thank you.】 ●Bring up new devices, perform debugging and performance tuning exercises that span multiple hardware / firmware / software teams. ●Understand software components from multiple partner teams, lead the integration of those components into the unified product codebase, and drive their continued development. ●Integrate third-party applications / libraries / frameworks on our target platforms, e.g. remote desktop service, web ssh service, web browser, .. etc. ●Collaborate with other developers to design and implement a highly usable and scalable software systems. ●Test and debug to improve the quality and performance of the software systems ●Analyze and evaluate technical tradeoffs for every decision. ●Ensure reliability, availability, and maintainability of the software. ●Architect efficient data structures and interfaces to interact with other modules. ●Conduct and/or participate in technical reviews, API design, and documentation. ●Follow engineering best practices and cooperate with overseas teams. ★Solid object-oriented programming and software architectural design skills ★Strong debugging and troubleshooting skills for embedded systems ★Hands on experience in developing scalable software systems ★Solid OSI (Open System Interconnection) mode knowledge ★Expertise in C, C++, Python, Shell (Bonus: Qt experience) ★Experience with version control, such as Git 1. First interviewing with our RD head in Taiwan through Google Meet. 2. Second interview will be a technical interview, which takes approximately an hour.
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10/28
台北市大同區10年以上大學以上
Role & Respnosibilities 角色與責任 1.負責產品維護跟客戶關係維護 2.規劃並執行管理,提升技術團隊最大營運效率 3.確認自己跟團隊與客戶、業務部門有良好溝通 Key Tasks 關鍵任務 1.協助團隊將產品維運,定期產品功能更新,加強產品穩定性       2.提升團隊的溝通力,信任感,促進團隊向心力 3.提升專案運作效能,進行組別內的溝通 Competency 職能 1. 團隊建造 2. 問題解決(產品) 3. 溝通協調 4. 專案管理 Attributes 特質 1. 對工作目標強烈企圖心 2. 樂意靈活應變、推動執行 3. 對培養人和完成目標,同樣具備高度熱情 Technical Knowledge & Skills 專業知識與技能 1. SQL,PostgreSQL 2. Infra(網路,Linux作業系統,伺服器,日誌,VM,K8s) 3. 資安解決方案 4. 雲端整合應用能力 5. AI整合應用能力 Experiences 經驗 1. 10~15年以上技術及管理經驗 / 大學學歷(含)以上 2. 5年以上專案執行經驗 3. 具備基本英文溝通能力
應徵
10/26
台北市大安區2年以上專科以上
打造能行走、思考、協作的下一代人形機器人。 羅比芯科技正在研發 RoboChip SoC / IPM 智慧驅動晶片 與 人形機器人關節模組, 結合 GaN 功率電子、MCU 控制、AI 感測與機電整合技術, 我們希望找到對機器人、嵌入式控制與創造有熱情的研發夥伴。 這裡不是流水線開發,而是從「實驗桌」到「產品」, 你將親手打造能讓機器人動起來的智慧驅動核心。 【工作內容】 1.開發與整合 人形機器人關節模組 及 智慧驅動晶片(RoboChip SoC / IPM) 2.設計與測試馬達控制、韌體、感測器與電源系統 3.驗證電路性能、除錯程式邏輯,確保系統穩定與高效率 4.撰寫設計規格書與實驗報告,支援原型製作與Demo驗證 5.參與跨領域討論(機構、控制、韌體、AI感測),共同解決研發挑戰 【技術方向可依專長分流】 電力電子方向 → GaN 功率模組、電源拓樸、驅動與保護電路 控制韌體方向 → MCU(STM32)開發、PWM控制、FOC演算法、SPI通訊 機電整合方向 → 馬達 / 編碼器 / 減速器 / 感測器整合與校正 【條件需求】 電機、電子、機械、控制、資工或相關科系畢業 熟悉 C / Python / MATLAB / PCB Layout 任一項尤佳 對機器人控制與智慧驅動系統具高度熱情 具創業精神與解決問題的勇氣,願意從 0 開始實作、測試、調整 【加分條件】 有 STM32 / Jetson / ROS2 開發經驗 曾參與機器人、無人機、AMR 或電控系統專案 具 Startup / Maker 經驗者佳(動手、整合、跨界) 熟悉控制演算法、感測融合或嵌入式通訊架構者尤佳 【我們提供】 可直接參與 RoboChip SoC / IPM 核心研發,見證技術從構想到量產 參與 Prototype 製作、系統測試與整機整合 開放式研發空間(台科大國際大樓育成中心) 彈性上下班、跨領域學習環境 研發獎金、專利獎勵與技術股制度 【工作地點】 台北市大安區基隆路四段 43 號 國立臺灣科技大學國際大樓育成中心 【我們的文化】 在羅比芯,你不只是工程師,而是技術的共創者。 我們相信: 最好的技術不是寫在簡報裡,而是能讓機器人真的「動起來」。 如果你想讓自己的設計出現在未來的人形機器人裡, 這裡,就是你起步的地方。
應徵
10/27
新竹市經歷不拘碩士以上
【產品線描述】 Smart TV Solutions:提供TVSoC、MEMC/FRC及面板相關顯示裝置的控制晶片 ASIC Solutions:提供智能手機、智能電視、電競螢幕、AI Server等產品各種ASIC(包含CoWoS/ChipLet平台)解決方案 【工作說明】 主要負責SoC/ASIC相關: 1. Front-End (Tuner+Demod) 硬體線路設計,Layout review及電性調測 2. 客戶端相關於Front-End的技術支援及PCBA Pre-Test 3. Demod/PCIe/CXL IPs於FPGA及IC的測試平台開發及驗證 4. Analog IP (Demod_ADC. PCIe_PHY..) 相關驗證 5. TCON (CTG, RGB_Capture....) IPs相關驗證 6. PCIe/CXL相關主機/裝置系統相容性測試驗證 【必要條件】 1. 如資工又具備硬體基本技能背景尤佳 2. 相關TV SoC/ASIC開發/驗證/客戶支持工作經驗 3. 熟悉相關射頻(網路/頻譜分析儀)以及R&S SFU/BTC信號產生器, PCIe/CXL協定分析儀..等儀器的使用操作 4. 具自動化程式設計(LabView/MatLab/Python..)開發能力或經驗 5. 具相關TCON 及 PCIe 高速介面及controller(s)驗證經驗者尤佳
應徵
10/17
台北市內湖區3年以上專科
負責帶領跨領域工程團隊,主導企業核心系統的架構設計、開發與雲端平台建置,確保系統在高併發、高可用環境下穩定運作。需要具備技術領導力、專案協調能力,並能引導團隊落實 DevSecOps 與自動化流程。 1. 系統架構設計與關鍵技術決策。 2. ASP.NET MVC / Core 系統開發與維護。 3. 資料庫與快取架構規劃,優化效能。 4. 雲端、容器化與 CI/CD 流程相關規劃與建置。 5. 監督專案進度,協調跨部門資源。 6. 制定技術規範並培育團隊能力,確保程式碼品質與安全。
應徵
10/23
麥森創新股份有限公司其他半導體相關業
台北市信義區2年以上專科以上
1. CP Schematics繪製 2. CP MLO 疊構評估 3. CP MLO Layout 4. 設計成本與交期評估
應徵
10/29
台北市內湖區10年以上碩士
We are seeking a highly experienced and detail-oriented Senior Hardware Board Development Engineer with 10–15 years of hands-on experience in hardware system design. This role focuses on the development of evaluation boards (EVBs) and customer reference boards (CRB) for advanced SoC/ASIC platforms, including board-level architecture, high-speed signal design, and system bring-up. You will work closely with SoC/ASIC design teams, firmware engineers, and validation teams to deliver robust reference platforms for internal and customer use. The ideal candidate has deep expertise in DDR4/DDR5, PCIe Gen4/5/6, high-speed SerDes, and power delivery networks, along with strong debugging and lab skills. Responsibilities * Lead the design and development of SoC/ASIC evaluation boards, including schematic capture, PCB layout review, and component selection. * Perform board bring-up, signal integrity validation, and system-level debugging. * Collaborate with cross-functional teams to support SoC/ASIC validation and customer reference designs. * Conduct SI/PI simulations and optimize high-speed interfaces (DDR, PCIe, Ethernet). * Generate technical documentation including schematics, BOMs, test procedures, and design guides. * Interface with vendors and manufacturing teams for prototype builds and production support.
應徵
10/27
台北市內湖區2年以上大學
1. 新產品電子電路設計、開發、驗證及測試標準之制訂。 2. 編制產品BOM表及製作與發行各類技術文件。 3. 執行硬體和軟體整合,確保產品功能完善。 4. 電子元件選用、驗證。 5. 產品EMC認證問題排除,確保符合法規要求。 6. 持續關注新技術,提出創新應用於產品設計。
應徵