1. Main responsibility is to design analog IPs in MCU such as adc/dac, pll, osc, por, ldo
2. 具備DC-DC Converter, Buck相關電路設計
2. Responsible for analog IP design, verification plan, test plan, document
3. Communicate with system, layout and digital engineer to ensure high quality
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雅特力科技創立於2016年,為智原科技子公司。
【Artery雅特力】即將在台上市的IC設計公司,主要產品為32bit ARM core base MCU
公司網址:https://www.arterychip.com
關於雅特力:https://www.104.com.tw/company/1a2x6blojm
Responsible for developing custom IP for SoC design from specification definition, circuit design to testing, and familiar with component and process characteristics.
Job description
Join our innovative team specializing in cutting-edge embedded memory solutions. We are seeking Analog Circuit Engineers to play a key role in the design and development of high-performance embedded DRAM and associated peripheral circuits.
In this position, you will be responsible for the complete cycle of DRAM circuit design and simulation verification. Your tasks will involve developing novel circuit topologies, transistor-level design, optimizing performance metrics, and ensuring robust functionality through extensive simulations using industry-standard EDA tools.
Required qualifications include a strong technical background in Electrical Engineering, Electronics Engineering, Computer Engineering, Physics, or a closely related field. Candidates must possess demonstrated, significant experience in DRAM circuit design and comprehensive simulation verification methodologies.
Ideally, candidates will have proven design experience in specific DRAM-related circuit blocks, including but not limited to:
Row and Column Decoder circuits
Control path logic
DC-DC converters, Charge Pumps, and Bandgap References
Delay Locked Loops (DLLs) and Phase Locked Loops (PLLs)
Negative voltage generators (NVG) and other critical peripheral circuits
This is an excellent opportunity to contribute to state-of-the-art embedded memory designs in a dynamic, collaborative environment. If you are a skilled analog designer passionate about solving complex challenges in DRAM circuitry, we encourage you to apply and help shape the future of embedded memory technology.
We are currently seeking a talented Analog Design Engineer to join our team and participate in the development of Power IC for High-Performance Computing (HPC). The role will primarily involve working on the design and development of the following components:
1. PMIC (Power Management Integrated Circuit)
2. Multiphase VR (Voltage Regulator)
3. Buck/Boost/Buck-Boost Converters
4. eFuse (Electronic Fuse)
Digital IC design engineer
- Familiar with Verilog RTL coding
- Familiar with digital design flow (pre-layout simulation, timing constraint, synthesis, post-layout simulation)
- Will be working on high speed Serdes IPs
- Experience or interest in all-digital PLLs or clock-data recovery circuits is a big plus
1. MSEE is required.
2. Solid background in analog integrated circuits.
3. Knowledge of high speed serial link technology.
4. Familiar with SerDes PHY (USB, PCIE Express, SATA and Thunderbolt) and building block (DFE, CTLE, CDR, PLL and FFE transmitter).
5. Experience in design and simulation high speed transceiver is a plus.
Job desicription:
Our Design Team specializes in the challenging field of Non-Volatile Memory (NVM) IC circuit design. We are actively seeking an experienced Analog Circuit Design Engineer to contribute to our cutting-edge developments in embedded NVM solutions and surrounding circuitry.
As a key member of our team, you will be responsible for the design, verification, and debugging of essential analog building blocks like Bandgap references, LDOs, and Charge Pumps. A significant part of your role will involve designing critical memory peripheral circuits for NVM IP and test chips, including Array interfaces, Decoding logic, and Sense Amplifiers.
Your responsibilities will span the design lifecycle, from contributing to IP specifications and core circuit design to ensuring performance through layout optimization and comprehensive corner simulations of NVM IPs. We are looking for candidates with proven expertise in analog circuit design, ideally with prior experience in embedded memory or NVM technologies.
If you are an experienced analog designer eager to tackle complex challenges in non-volatile memory, we encourage you to apply and help shape the future of memory technology.
- Responsible for entire analog design implementation that covers design
specification, design creation, integration and optimization to layout review, final
post-layout simulation, silicon characterization and system test and debug.
- Experience in analog IP development that include SERDES, ADC, DAC, Audio
Codec, PLL, IO, memory, analog blocks and high speed PHY for 130nm, 90nm and
below technologies.
- Knowledge in high speed PHY design (PCIE, USB, GbE, DDR, ETHERNET) is an
added advantage.
- Preferably done some test characterization, measurement and compliance in
previous employment
【產品範疇】
1.Touch panel controller
2.TDDI
【工作內容】
1.Analog front-end design
2.ADC design
3.Switched-capacitor circuit design
4.負責layout floorplan規劃,與layout工程師合作完成相關驗證
【需求條件】
1.Device physics knowledge applied to analog IC design
2.Familiar with analog IC design flow
3.Familiar with Hspice or Spectre
• 進行類比/混合訊號電路模擬(Spice, Spectre...)
• 指導及協助Layout規劃佈局
• 撰寫設計、測試規格文件與書寫模擬報告
• 與測試工程師合作測試、驗證、Debug IC
• Perform analog/mixed-signal circuit simulations (Spice, Spectre, etc.)
• Provide guidance and assistance with layout planning
• Write design and test specification documents and simulation reports
• Collaborate with test engineers to test, verify, and debug ICs