「PCB佈局高級/工程師」的相似工作

1. 高速以及高頻訊號多層板(16層)的PCB layout。 2. 電子元件symbol與footprint檔建立，維護資料庫及完成相對應文件，設定layout判斷條件、走線規範、擺件、線路優化。 3. 與硬體設計、機構與熱流工程師討論合作完成佈局修改。 4. 產品相關文件，Gerber產出，EBOM，MBOM。 5. 協助有關PCB設計、生產工藝、PCBA與元件備料等各項工程問題。 6. 併板、Gerber產出，與PCB板廠溝通PCB製作細節。 7. Design Rule以及Layout Review規劃及檢查機制建立。 8. 完成主管交付任務。

1.PCB Layout design, 須專精Allegro軟體 2.熟悉burn in board PCB設計 3.客戶技術溝通協調 4.產出PCB生產文件，建立並維護元器件的零件庫 4.視工作表現而定，額外提供每月點數獎金 5.表現優秀，培養二年後年薪可破百萬

Your Job Molex is seeking a Senior PCB Layout Engineer to join our Optical Solutions Business Unit (OSBU). In this role, the successful candidate will be part of a world-class engineering team, contributing to the design and development of next-generation coherent and PAM4 optical transceivers. The Senior PCB Layout Engineer will be responsible for creating high-speed, high-density PCB layouts that meet stringent signal integrity, power integrity, and thermal requirements. This role involves close collaboration with electrical, mechanical, optics and process integration engineers across global teams to ensure optimal performance, manufacturability, and reliability of our advanced optical transceiver modules. Our Team R&D Optoelectronic Solutions What You Will Do - Lead multi-layer PCB layout design for high-speed optical transceivers (e.g., QSFP-DD, OSFP). - Translate complex schematics into production-ready layouts using EDA tools. - Define layout constraints, stack-ups, and component placement in collaboration with cross-functional teams. - Support board bring-up and debug through layout reviews, lab measurements, and issue resolution. - Ensure compliance with DFM, DFT, and IPC standards; coordinate with vendors to address fab and assembly issues. - Generate and manage all fabrication and assembly outputs (Gerbers, ODB++, BOMs, drawings). - Mentor junior engineers and drive continuous improvement in layout processes and design practices. Who You Are (Basic Qualifications) - Bachelor's degree in Electrical Engineering, Electronics Engineering, or a related field. - More than 8 years of hands-on PCB layout experience in high-speed digital or optical communication products. - Proficient in Allegro PCB design software. - Strong knowledge of high-speed signal integrity, power integrity, PCB stack-up design, and layout best practices. - Experience with interfaces such as SerDes (e.g., 112G/224G PAM4), I²C, SPI, MDIO, and power delivery networks. - Familiarity with EMI/EMC mitigation techniques and thermal design considerations. - Solid understanding of PCB fabrication and assembly processes. What Will Put You Ahead - Experience with 800G & 1.6T optical transceiver PCB layout. - Familiarity with signal and power integrity simulation tools (e.g., Sigrity, Ansys, HyperLynx). - Previous involvement in volume production and high-reliability designs for data center or telecom applications.

1.鋰電池BMS電路layout設計 2.確認電路PCB及FPC layout 3.開發新的軟性PCB及高速PCB的驅動板 4.相關layout文件處理 5.協助處理其他產品設計相關事宜 6.配合電子及機構工程師作業及主管交辦事項

在Gemini (APU) 晶片系列的設計中,做類比與數位IC佈局(Layout)和DRC, ERC, ANT, LVS之驗證, 該系列的晶片可提供高效率且廣泛的AI應用　　　　　

PCB是所有電子產品的最基礎核心，所有電子產品，皆離不開PCB的基礎架構，PCB領域，仍可劃分為一般電子產品設計及半導體測試PCB設計，其設計規則，有所差異，本司目前，主要設計產品，半導體領域80％，一般電子產品10％，太空衛星領域10％ 畢業生，無經驗皆可 本司會由基礎的PCB相關知識教導，從1)基礎電路繪製，2)BOM表整理，3)零件佈排，4)PCB佈線等，全部由零開始教育訓練，在未完成完整教育訓練之前，不會讓員工獨立設計客戶實際案件，此教育訓練時間長短，視個人學習狀態不同，最終經過考核，通過考核，方能接觸客戶實際案件 1.電路圖繪製。 2.BOM表整理。 3.PCB佈線。

IC layout

1.專案管理與排程規劃 (1)進行專案排程並帶領 Layout 團隊依時程完成各項專案板件 (2)與 RD、ME、EE 溝通，統整 layout 需求 (3)制定 Layout 進度表與人力分配 (4)協調跨部門專案排程 2.團隊營運管理及提升 (1)Design Rule 規劃及檢查機制建立 (2)Layout Quality 改善 (3)持續提升PCB Layout團隊繪製效率(有自動化流程規劃經驗、Skill Code撰寫能力者佳) (4)Layout Review (5)設計流程優化 (6)維護設計資料庫準確及設計共用化

1.Analog and mixed mode circuit layout and verification 2.Co-work with designer for layout floor planning,routing and physical verifications 3.command file maintain

analog and digital circuit layout繪製

1.Layout Design 2.協助專案佈線,文字面等後續處理事宜 3.協助零件建立 4.完成工程師、主管交辦事項

1. 與客戶端進行技術/工程規格之討論與需求確認 2. 依客戶需求繪製電路圖 3. 依電路圖需求進行 PCB layout 4. 產出製作檔案給廠商，並討論工程問題 5. 協助專案產品除錯與功能驗證 6. 完成其他主管交辦事務 7. 需視案件時程彈性加班，確保專案進度與品質

1. PCB佈局、擺件、佈線 2. Design Rule & Allegro Constraint 設定 3. CAD/CAM檢查與Gerber輸出 4. 協助解決PCB設計、PCB製造及PCB組裝的各項工程問題

1.對先進製程 IC Layout 有興趣者, 歡迎非本科系 2.熟悉EDA tools：Cadence Virtuoso,Laker,Calibre。 3.曾通過財團法人自強工業科學基金會IC佈局工程師培訓計畫 4.相關科系.有FinFET經驗者佳

負責 3D-IC Interposer 與類比 IP 佈局設計 (Virtuoso / Allegro)，確保電性與實體規格，優化設計流程。 熟悉 Layout tools、Foundry PDK為佳。

振曜研發部門負責世界知名品牌之電子書閱讀器與相關創新之物聯網的硬體開發設計工作 需協同客戶與未來之前期技術研究與新創專利開發工作。 追求真正的研發工作非公板設計工作者。 高級工程師職務需求電子電機相關專業, 具備電腦/網通產業3年以上工作經驗, 可獨立完成設計工作 & 對規劃研發商品開發規劃有興趣者。 歡迎有創新能力與高度執行力夥伴加入。

1.新產品線材設計開發。 2.樣品試作,結構分析.性能測試.異常分析。 ※依學經歷敘薪。

Introduction to the job Do you like challenges and do you want to work in a fast pacing supply chain environment to support some of the biggest semiconductor companies worldwide? Are you familiar with Logistics Operations and like to managing urgent demands on a daily basis?  If this sounds like you and if you have a strong customer oriented mindset, here is your mission. Role and responsibilities For our Global Operations Center in Taiwan we are searching for Supply Chain Professionals. You fulfill the demand of our customers for spare parts and tools for their maintenance activities on some of the most complex machines in the right quantity and at the right time & cost. Time is of the essence to ensure a seamless production of our customers without interruptions on our machines. -Handling of urgent material requests from worldwide customers in a rolling 24/7 shift system with the right customer focus, while meeting all milestones related to communication and execution -Monitoring of worldwide shipments  -Ability to resolve complex issues and drive improvements to further optimize processes -Ability to support escalations and provide communication proposals for review -Constructive and reliable communication with worldwide stakeholders from all departments within ASML -This position requires shift work. Education and Experience Bachelor's Degree in related subject i.e. Supply Chain Management, Information Science, Engineering etc. preferred -Minimum 1 year of relevant experience in an international company, semiconductor industry is preferred -A tactical thinker with strong interpersonal and communication skills -Analytical thinking and ability to organize and prioritize workload Skills Working at the cutting edge of tech, you’ll always have new challenges and new problems to solve – and working together is the only way to do that. You won’t work in a silo. Instead, you’ll be part of a creative, dynamic work environment where you’ll collaborate with supportive colleagues.  There is always space for creative and unique points of view. You’ll have the flexibility and trust to choose how best to tackle tasks and solve problems. To thrive in this job, you’ll need the following skills: -Stress-resistant; act under high pressure -Flexible; willing to go the extra mile for the customer -Excellent professional communication in English, written and oral -Drive for results; does not stop until solution has been found, even when obstacles arise -Team player -Change management competencies -Convincing, pro-active and “can do” mentality -Cultural awareness -Experience with ERP system(s), SAP R/3 knowledge preferred -Ability to prioritize Diversity and inclusion ASML is an Equal Opportunity Employer that values and respects the importance of a diverse and inclusive workforce. It is the policy of the company to recruit, hire, train and promote persons in all job titles without regard to race, color, religion, sex, age, national origin, veteran status, disability, sexual orientation, or gender identity. We recognize that diversity and inclusion is a driving force in the success of our company. Need to know more about applying for a job at ASML? Read our frequently asked questions.

歡迎對象： 1. 擁有電路佈局設計 (IC Layout) 相關經驗一年以上者 2. 對電路佈局設計 (IC Layout) 有興趣者 3. 相關科系，或非本科系都可 職務內容： 1. 熟悉 Layout Edit Tool 的操作 2. 熟悉 Physical Verification Tool 的操作 3. 負責 IC 電路佈局、優化和驗證 4. 確保 IC 佈局符合 Circuit Designer 設計需求及產品、製程等規範

1. Flip chip package substrate design, and 2.5D experience is a plus. 2. Provide optimization design proposal.  3. Co-work closely with substrate suppliers/SIPI team directly.  4. Design rule maintenance.